Patents by Inventor Natsuko TAKASE

Natsuko TAKASE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200126510
    Abstract: A display system with high display quality in which display unevenness is reduced is provided. The display system includes a processing unit and a display portion. The processing unit generates second image data by using first image data. The display portion displays an image on the basis of the second image data. The processing unit includes three layers. The first image data is supplied to the first layer. The first image data contains a plurality of pieces of data. The plurality of pieces of data each correspond to any one of the plurality of pixels. The first layer generates first arithmetic data by making the number of data corresponding to one pixel larger than the number of the first image data by using the first image data. The second layer generates second arithmetic data by multiplying the first arithmetic data by a weight coefficient.
    Type: Application
    Filed: June 14, 2018
    Publication date: April 23, 2020
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masataka SHIOKAWA, Natsuko TAKASE, Hideaki OKAMOTO, Kensuke YOSHIZUMI, Daiki NAKAMURA
  • Patent number: 10606541
    Abstract: A display device or an electronic device with high portability and browsability is provided. A display device which includes two display panels that overlap with each other and in which the area of a portion where the two display panels overlap with each other is variable is provided. The larger the area where the two display panels overlap with each other is, the smaller the display device becomes. The first display panel includes a first region that performs display. The second display panel includes a second region that performs display, and a third region that is adjacent to the second region and transmits visible light. When the third region overlaps with the side of a surface which performs display of the first region, display can be performed using a seamless large display region.
    Type: Grant
    Filed: January 14, 2016
    Date of Patent: March 31, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuichi Yanagisawa, Nozomu Sugisawa, Natsuko Takase
  • Patent number: 10475820
    Abstract: To provide a peeling method that achieves low cost and high mass productivity. The peeling method includes the steps of: forming a first layer with a photosensitive material over a formation substrate; forming a first region and a second region having a smaller thickness than the first region in the first layer by photolithography to form a resin layer having the first region and the second region; forming a transistor including an oxide semiconductor in a channel formation region over the first region in the resin layer; forming a conductive layer over the second region in the resin layer; and irradiating the resin layer with laser light to separate the transistor and the formation substrate.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: November 12, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junpei Yanaka, Kayo Kumakura, Masataka Sato, Satoru Idojiri, Kensuke Yoshizumi, Mari Tateishi, Natsuko Takase
  • Publication number: 20190317374
    Abstract: A liquid crystal display device with a high aperture ratio is provided. A liquid crystal display device with low power consumption is provided. The display device includes a display portion and a driver circuit portion. The display portion includes a liquid crystal element, a first transistor, a scan line, and a signal line. The driver circuit portion includes a second transistor. The liquid crystal element includes a pixel electrode, a liquid crystal layer, and a common electrode. Each of the scan line and the signal line is electrically connected to the first transistor. The scan line and the signal line each include a metal layer. The structure of the first transistor is different from that of the second transistor. The first transistor is electrically connected to the pixel electrode. The first transistor includes a first region connected to the pixel electrode. The pixel electrode, the common electrode, and the first region have a function of transmitting visible light.
    Type: Application
    Filed: November 16, 2017
    Publication date: October 17, 2019
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Yukinori SHIMA, Kenichi OKAZAKI, Natsuko TAKASE
  • Publication number: 20190035820
    Abstract: To provide a peeling method that achieves low cost and high mass productivity. The peeling method includes the steps of: forming a first layer with a photosensitive material over a formation substrate; forming a first region and a second region having a smaller thickness than the first region in the first layer by photolithography to form a resin layer having the first region and the second region; forming a transistor including an oxide semiconductor in a channel formation region over the first region in the resin layer; forming a conductive layer over the second region in the resin layer; and irradiating the resin layer with laser light to separate the transistor and the formation substrate.
    Type: Application
    Filed: September 27, 2018
    Publication date: January 31, 2019
    Inventors: Junpei YANAKA, Kayo KUMAKURA, Masataka SATO, Satoru IDOJIRI, Kensuke YOSHIZUMI, Mari TATEISHI, Natsuko TAKASE
  • Patent number: 10185190
    Abstract: Display defects of a display device are reduced. The display quality of a display device is improved. A reliable display device is provided. A display device includes a substrate, a conductive layer over the substrate, and a transistor and a light-emitting element over the conductive layer. The transistor and the light-emitting element are each electrically insulated from the conductive layer. The transistor and the light-emitting element each overlap with the substrate with the conductive layer located therebetween. A constant potential is supplied to the conductive layer. The display device may further include a resin layer. In that case, the conductive layer overlaps with the substrate with the resin layer located therebetween. The resin layer has a thickness of more than or equal to 0.1 ?m and less than or equal to 3 ?m, for example. The resin layer has a 5% weight-loss temperature of lower than 400° C., for example.
    Type: Grant
    Filed: May 2, 2017
    Date of Patent: January 22, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichi Koezuka, Natsuko Takase
  • Publication number: 20190005035
    Abstract: An information search system or an intellectual property information search system that is capable of highly accurate information search is provided. The intellectual property information search system includes a processing unit. First data and first reference analysis data are input to the processing unit. The first data includes first intellectual property information. The first reference analysis data includes plural pieces of second intellectual property information. The processing unit is configured to search the first reference analysis data for data similar to the first data to generate second data. The processing unit is configured to output the second data. The second data includes a piece of the second intellectual property information similar to the first intellectual property information and information showing the degree of similarity of the piece of the second intellectual property information to the first intellectual property information.
    Type: Application
    Filed: May 24, 2018
    Publication date: January 3, 2019
    Inventors: Shunpei YAMAZAKI, Yuji IWAKI, Hajime KIMURA, Yoshiaki OIKAWA, Natsuko TAKASE
  • Patent number: 10163940
    Abstract: A highly reliable display device is provided. The display device includes a first substrate, a first resin layer over the first substrate, a pixel portion and a terminal portion over the first resin layer, a second resin layer over the terminal portion, and a second substrate over the second resin layer. The pixel portion includes a transistor and a display element electrically connected to the transistor. The terminal portion includes a conductive layer. The first resin layer includes an opening. The conductive layer includes a first region that is exposed in the opening in the first resin layer. The second resin layer includes a region overlapping with the first region. The conductive layer is the same layer as at least one of a gate of the transistor and a source and a drain of the transistor.
    Type: Grant
    Filed: May 16, 2017
    Date of Patent: December 25, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Daisuke Kubota, Yuji Iwaki, Kensuke Yoshizumi, Mari Tateishi, Natsuko Takase
  • Patent number: 10096621
    Abstract: To provide a peeling method that achieves low cost and high mass productivity. The peeling method includes the steps of: forming a first layer with a photosensitive material over a formation substrate; forming a first region and a second region having a smaller thickness than the first region in the first layer by photolithography to form a resin layer having the first region and the second region; forming a transistor including an oxide semiconductor in a channel formation region over the first region in the resin layer; forming a conductive layer over the second region in the resin layer; and irradiating the resin layer with laser light to separate the transistor and the formation substrate.
    Type: Grant
    Filed: May 16, 2017
    Date of Patent: October 9, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junpei Yanaka, Kayo Kumakura, Masataka Sato, Satoru Idojiri, Kensuke Yoshizumi, Mari Tateishi, Natsuko Takase
  • Publication number: 20180039471
    Abstract: A display device or an electronic device with high portability and browsability is provided. A display device which includes two display panels that overlap with each other and in which the area of a portion where the two display panels overlap with each other is variable is provided. The larger the area where the two display panels overlap with each other is, the smaller the display device becomes. The first display panel includes a first region that performs display. The second display panel includes a second region that performs display, and a third region that is adjacent to the second region and transmits visible light. When the third region overlaps with the side of a surface which performs display of the first region, display can be performed using a seamless large display region.
    Type: Application
    Filed: January 14, 2016
    Publication date: February 8, 2018
    Inventors: Yuichi YANAGISAWA, Nozomu SUGISAWA, Natsuko TAKASE
  • Publication number: 20180019425
    Abstract: A display device with high visibility regardless of the ambient brightness is manufactured at low cost. A method for manufacturing a display device that includes a first display element, a second display element, and an insulating layer is provided. The first display element includes a first pixel electrode that reflects visible light, a liquid crystal layer, and a first common electrode that transmits visible light. The second display element includes a second pixel electrode that transmits visible light, a light-emitting layer, and a second common electrode that reflects visible light. The first common electrode is formed over a first substrate. A separation layer that reflects visible light is formed over a formation substrate, the insulating layer is formed over the separation layer, and the second display element is formed over the insulating layer. The formation substrate and a second substrate are bonded to each other with an adhesive.
    Type: Application
    Filed: July 11, 2017
    Publication date: January 18, 2018
    Inventors: Seiji YASUMOTO, Masataka SATO, Hiroki ADACHI, Toru TAKAYAMA, Natsuko TAKASE
  • Publication number: 20170338250
    Abstract: To provide a peeling method that achieves low cost and high mass productivity. The peeling method includes the steps of: forming a first layer with a photosensitive material over a formation substrate; forming a first region and a second region having a smaller thickness than the first region in the first layer by photolithography to form a resin layer having the first region and the second region; forming a transistor including an oxide semiconductor in a channel formation region over the first region in the resin layer; forming a conductive layer over the second region in the resin layer; and irradiating the resin layer with laser light to separate the transistor and the formation substrate.
    Type: Application
    Filed: May 16, 2017
    Publication date: November 23, 2017
    Inventors: Junpei YANAKA, Kayo KUMAKURA, Masataka SATO, Satoru IDOJIRI, Kensuke YOSHIZUMI, Mari TATEISHI, Natsuko TAKASE
  • Publication number: 20170338246
    Abstract: A highly reliable display device is provided. The display device includes a first substrate, a first resin layer over the first substrate, a pixel portion and a terminal portion over the first resin layer, a second resin layer over the terminal portion, and a second substrate over the second resin layer. The pixel portion includes a transistor and a display element electrically connected to the transistor. The terminal portion includes a conductive layer. The first resin layer includes an opening. The conductive layer includes a first region that is exposed in the opening in the first resin layer. The second resin layer includes a region overlapping with the first region. The conductive layer is the same layer as at least one of a gate of the transistor and a source and a drain of the transistor.
    Type: Application
    Filed: May 16, 2017
    Publication date: November 23, 2017
    Inventors: Daisuke KUBOTA, Yuji IWAKI, Kensuke YOSHIZUMI, Mari TATEISHI, Natsuko TAKASE
  • Publication number: 20170329162
    Abstract: Display defects of a display device are reduced. The display quality of a display device is improved. A reliable display device is provided. A display device includes a substrate, a conductive layer over the substrate, and a transistor and a light-emitting element over the conductive layer. The transistor and the light-emitting element are each electrically insulated from the conductive layer. The transistor and the light-emitting element each overlap with the substrate with the conductive layer located therebetween. A constant potential is supplied to the conductive layer. The display device may further include a resin layer. In that case, the conductive layer overlaps with the substrate with the resin layer located therebetween. The resin layer has a thickness of more than or equal to 0.1 ?m and less than or equal to 3 ?m, for example. The resin layer has a 5% weight-loss temperature of lower than 400° C., for example.
    Type: Application
    Filed: May 2, 2017
    Publication date: November 16, 2017
    Inventors: Shunpei YAMAZAKI, Junichi KOEZUKA, Natsuko TAKASE
  • Publication number: 20170223442
    Abstract: Headphones including a sound output unit, a processing unit, a memory unit, a lighting unit, and a detection unit are provided. The sound output unit is configured to output sound. The memory unit is configured to store a program. The lighting unit is configured to emit light in response to a signal supplied from the processing unit. The detection unit is configured to obtain detection information and supply a detection signal corresponding to the detection information to the processing unit. The processing unit is configured to read out the program, carry out an operation using the detection signal and the program, and supply a signal corresponding to an operation result to the lighting unit.
    Type: Application
    Filed: January 26, 2017
    Publication date: August 3, 2017
    Inventors: Hideaki KUWABARA, Natsuko TAKASE
  • Publication number: 20170152594
    Abstract: In order to provide a highly reliable organic EL element, a first step in which a deposition material is heated and vaporized in a deposition chamber in which the pressure is reduced and a second step in which a layer included in an EL layer is deposited in the deposition chamber are performed while exhaustion is performed and the partial pressure of water in the deposition chamber is measured with a mass spectrometer. Alternatively, the deposition chamber in the deposition apparatus includes a deposition material chamber and is connected to an exhaust mechanism. The deposition material chamber is separated from the deposition chamber by a sluice valve, includes a deposition material holding portion including a heating mechanism, and is connected to a mass spectrometer and an exhaust mechanism.
    Type: Application
    Filed: February 9, 2017
    Publication date: June 1, 2017
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kohei Yokoyama, Hisao IKEDA, Shinichi HIRASA, Yasuhiro JINBO, Natsuko TAKASE
  • Patent number: 9578718
    Abstract: In order to provide a highly reliable organic EL element, a first step in which a deposition material is heated and vaporized in a deposition chamber in which the pressure is reduced and a second step in which a layer included in an EL layer is deposited in the deposition chamber are performed while exhaustion is performed and the partial pressure of water in the deposition chamber is measured with a mass spectrometer. Alternatively, the deposition chamber in the deposition apparatus includes a deposition material chamber and is connected to an exhaust mechanism. The deposition material chamber is separated from the deposition chamber by a sluice valve, includes a deposition material holding portion including a heating mechanism, and is connected to a mass spectrometer and an exhaust mechanism.
    Type: Grant
    Filed: April 25, 2013
    Date of Patent: February 21, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kohei Yokoyama, Hisao Ikeda, Shinichi Hirasa, Yasuhiro Jinbo, Natsuko Takase
  • Publication number: 20160313769
    Abstract: A highly convenient electronic device used while being worn on a body is provided. The electronic device is an arm-worn electronic device including a display panel, a power storage device, a circuit, and a sealing structure. The display panel displays an image with power supplied from the power storage device. The circuit includes an antenna and charges the power storage device wirelessly. Inside the sealing structure, the display panel, the power storage device, and the circuit are provided. The sealing structure includes a portion that transmits visible light. The sealing structure can be worn on an arm or is connected to a structure body that can be worn on an arm.
    Type: Application
    Filed: April 11, 2016
    Publication date: October 27, 2016
    Inventors: Yusuke YOSHITANI, Hideaki KUWABARA, Natsuko TAKASE
  • Publication number: 20140290569
    Abstract: An object of the present invention is to provide an apparatus for successive deposition used for manufacturing a semiconductor element including an oxide semiconductor in which impurities are not included. By using the deposition apparatus capable of successive deposition of the present invention that keeps its inside in high vacuum state, and thus allows films to be deposited without being exposed to the air, the entry of impurities such as hydrogen into the oxide semiconductor layer and the layer being in contact with the oxide semiconductor layer can be prevented; as a result, a semiconductor element including a high-purity oxide semiconductor layer in which hydrogen concentration is sufficiently reduced can be manufactured. In such a semiconductor element, off-state current is low, and a semiconductor device with low power consumption can be realized.
    Type: Application
    Filed: June 12, 2014
    Publication date: October 2, 2014
    Inventors: Shunpei YAMAZAKI, Natsuko TAKASE
  • Patent number: 8772160
    Abstract: An object of the present invention is to provide an apparatus for successive deposition used for manufacturing a semiconductor element including an oxide semiconductor in which impurities are not included. By using the deposition apparatus capable of successive deposition of the present invention that keeps its inside in high vacuum state, and thus allows films to be deposited without being exposed to the air, the entry of impurities such as hydrogen into the oxide semiconductor layer and the layer being in contact with the oxide semiconductor layer can be prevented; as a result, a semiconductor element including a high-purity oxide semiconductor layer in which hydrogen concentration is sufficiently reduced can be manufactured. In such a semiconductor element, off-state current is low, and a semiconductor device with low power consumption can be realized.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: July 8, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Natsuko Takase