Patents by Inventor Nazir Ahmad
Nazir Ahmad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10769775Abstract: Apparatus, system and method for detecting defects in an adhesion area that includes an adhesive mixed with a fluorescent material. One or more illumination devices may illuminate the fluorescent material in the adhesion area with a light of a predetermined wavelength. A camera may be configured to capture an image of the illuminated adhesion area. A processing device, communicatively coupled to the camera, may be configured to process the captured image by applying one or more boundary areas to the captured image and determining an image characteristic within each of the boundary areas, wherein the image characteristic is used by the processing device to determine the presence of a defect in the adhesive, such as an excess of adhesive or an insufficient application of adhesive.Type: GrantFiled: February 11, 2019Date of Patent: September 8, 2020Assignee: JABIL INC.Inventors: Quyen Duc Chu, Nazir Ahmad
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Publication number: 20190244344Abstract: Apparatus, system and method for detecting defects in an adhesion area that includes an adhesive mixed with a fluorescent material. One or more illumination devices may illuminate the fluorescent material in the adhesion area with a light of a predetermined wavelength. A camera may be configured to capture an image of the illuminated adhesion area. A processing device, communicatively coupled to the camera, may be configured to process the captured image by applying one or more boundary areas to the captured image and determining an image characteristic within each of the boundary areas, wherein the image characteristic is used by the processing device to determine the presence of a defect in the adhesive, such as an excess of adhesive or an insufficient application of adhesive.Type: ApplicationFiled: February 11, 2019Publication date: August 8, 2019Applicant: Jabil Inc.Inventors: Quyen Duc Chu, Nazir Ahmad
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Patent number: 10204408Abstract: Apparatus, system and method for detecting defects in an adhesion area that includes an adhesive mixed with a fluorescent material. One or more illumination devices may illuminate the fluorescent material in the adhesion area with a light of a predetermined wavelength. A camera may be configured to capture an image of the illuminated adhesion area. A processing device, communicatively coupled to the camera, may be configured to process the captured image by applying one or more boundary areas to the captured image and determining an image characteristic within each of the boundary areas, wherein the image characteristic is used by the processing device to determine the presence of a defect in the adhesive, such as an excess of adhesive or an insufficient application of adhesive.Type: GrantFiled: January 23, 2017Date of Patent: February 12, 2019Assignee: Jabil Inc.Inventors: Quyen Duc Chu, Nazir Ahmad
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Publication number: 20180323322Abstract: Provided are novel building integrable photovoltaic (BIP) modules and methods of fabricating thereof. A module may be fabricated from an insert having one or more photovoltaic cells by electrically interconnecting and mechanically integrating one or more connectors with the insert. Each connector may have one or more conductive elements, such as metal sockets and/or pins. At least two of all conductive elements are electrically connected to the photovoltaic cells using, for example, bus bars. These and other electrical components are electrically insulated using a temperature resistant material having a Relative Temperature Index (RTI) of at least about 115° C. The insulation may be provided before or during module fabrication by, for example, providing a prefabricated insulating housing and/or injection molding the temperature resistant material. The temperature resistant material and/or other materials may be used for mechanical integration of the one or more connectors with the insert.Type: ApplicationFiled: March 29, 2018Publication date: November 8, 2018Inventors: Jason Stephen Corneille, Michael C. Meyers, Adam C. Sherman, Nazir Ahmad
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Patent number: 9935225Abstract: Provided are novel building integrable photovoltaic (BIP) modules and methods of fabricating thereof. A module may be fabricated from an insert having one or more photovoltaic cells by electrically interconnecting and mechanically integrating one or more connectors with the insert. Each connector may have one or more conductive elements, such as metal sockets and/or pins. At least two of all conductive elements are electrically connected to the photovoltaic cells using, for example, bus bars. These and other electrical components are electrically insulated using a temperature resistant material having a Relative Temperature Index (RTI) of at least about 115° C. The insulation may be provided before or during module fabrication by, for example, providing a prefabricated insulating housing and/or injection molding the temperature resistant material. The temperature resistant material and/or other materials may be used for mechanical integration of the one or more connectors with the insert.Type: GrantFiled: July 22, 2015Date of Patent: April 3, 2018Assignee: Beijing Apollo Ding Rong Solar Technology Co., Ltd.Inventors: Jason S. Corneille, Michael Meyers, Adam C. Sherman, Nazir Ahmad
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Publication number: 20170161890Abstract: Apparatus, system and method for detecting defects in an adhesion area that includes an adhesive mixed with a fluorescent material. One or more illumination devices may illuminate the fluorescent material in the adhesion area with a light of a predetermined wavelength. A camera may be configured to capture an image of the illuminated adhesion area. A processing device, communicatively coupled to the camera, may be configured to process the captured image by applying one or more boundary areas to the captured image and determining an image characteristic within each of the boundary areas, wherein the image characteristic is used by the processing device to determine the presence of a defect in the adhesive, such as an excess of adhesive or an insufficient application of adhesive.Type: ApplicationFiled: January 23, 2017Publication date: June 8, 2017Applicant: Jabil Circuit, Inc.Inventors: Quyen Duc Chu, Nazir Ahmad
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Patent number: 9626754Abstract: Apparatus, system and method for detecting defects in an adhesion area that includes an adhesive mixed with a fluorescent material. One or more illumination devices may illuminate the fluorescent material in the adhesion area with a light of a predetermined wavelength. A camera may be configured to capture an image of the illuminated adhesion area. A processing device, communicatively coupled to the camera, may be configured to process the captured image by applying one or more boundary areas to the captured image and determining an image characteristic within each of the boundary areas, wherein the image characteristic is used by the processing device to determine the presence of a defect in the adhesive, such as an excess of adhesive or an insufficient application of adhesive.Type: GrantFiled: May 28, 2015Date of Patent: April 18, 2017Assignee: JABIL CIRCUIT, INC.Inventors: Quyen Duc Chu, Nazir Ahmad
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Publication number: 20160350909Abstract: Apparatus, system and method for detecting defects in an adhesion area that includes an adhesive mixed with a fluorescent material. One or more illumination devices may illuminate the fluorescent material in the adhesion area with a light of a predetermined wavelength. A camera may be configured to capture an image of the illuminated adhesion area. A processing device, communicatively coupled to the camera, may be configured to process the captured image by applying one or more boundary areas to the captured image and determining an image characteristic within each of the boundary areas, wherein the image characteristic is used by the processing device to determine the presence of a defect in the adhesive, such as an excess of adhesive or an insufficient application of adhesive.Type: ApplicationFiled: May 28, 2015Publication date: December 1, 2016Applicant: JABIL CIRCUIT, INC.Inventors: Quyen Duc Chu, Nazir Ahmad
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Patent number: 9312150Abstract: A method for forming metallurgical interconnections and polymer adhesion of a flip chip to a substrate includes providing a chip having a set of bumps formed on a bump side thereof and a substrate having a set of interconnect points on a metallization thereon, providing a measured quantity of a polymer adhesive in a middle region of the chip on the bump side, aligning the chip with the substrate so that the set of bumps aligns with the set of interconnect points, pressing the chip and the substrate toward one another so that a portion of the polymer adhesive contacts the substrate and the bumps contact the interconnect points, and heating the bumps to a temperature sufficiently high to form a metallurgical connection between the bumps and the interconnect points.Type: GrantFiled: October 7, 2011Date of Patent: April 12, 2016Assignee: STATS ChipPAC, Ltd.Inventors: Nazir Ahmad, Young-Do Kweon, Samuel Tam, Kyung-Moon Kim, Rajendra D. Pendse
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Publication number: 20160027944Abstract: Provided are novel building integrable photovoltaic (BIP) modules and methods of fabricating thereof. A module may be fabricated from an insert having one or more photovoltaic cells by electrically interconnecting and mechanically integrating one or more connectors with the insert. Each connector may have one or more conductive elements, such as metal sockets and/or pins. At least two of all conductive elements are electrically connected to the photovoltaic cells using, for example, bus bars. These and other electrical components are electrically insulated using a temperature resistant material having a Relative Temperature Index (RTI) of at least about 115° C. The insulation may be provided before or during module fabrication by, for example, providing a prefabricated insulating housing and/or injection molding the temperature resistant material. The temperature resistant material and/or other materials may be used for mechanical integration of the one or more connectors with the insert.Type: ApplicationFiled: July 22, 2015Publication date: January 28, 2016Inventors: Jason S. Corneille, Michael Meyers, Adam C. Sherman, Nazir Ahmad
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Patent number: 9112080Abstract: Provided are novel building integrable photovoltaic (BIP) modules and methods of fabricating thereof. A module may be fabricated from an insert having one or more photovoltaic cells by electrically interconnecting and mechanically integrating one or more connectors with the insert. Each connector may have one or more conductive elements, such as metal sockets and/or pins. At least two of all conductive elements are electrically connected to the photovoltaic cells using, for example, bus bars. These and other electrical components are electrically insulated using a temperature resistant material having a Relative Temperature Index (RTI) of at least about 115° C. The insulation may be provided before or during module fabrication by, for example, providing a prefabricated insulating housing and/or injection molding the temperature resistant material. The temperature resistant material and/or other materials may be used for mechanical integration of the one or more connectors with the insert.Type: GrantFiled: March 11, 2011Date of Patent: August 18, 2015Assignee: Apollo Precision (Kunming) Yuanhong LimitedInventors: Jason S. Corneille, Michael Meyers, Adam C. Sherman, Nazir Ahmad
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Publication number: 20140261635Abstract: In a photovoltaic module, the solar cells and other necessary layers may be placed on a backsheet. The backsheet is configured to provide physical protection of the underside of the module and also provide physical protection to electrical terminals by wrapping itself around the connections. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.Type: ApplicationFiled: March 13, 2013Publication date: September 18, 2014Applicant: Nanosolar, Inc.Inventors: Eric Ng, Nazir Ahmad
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Publication number: 20130113093Abstract: A method for forming metallurgical interconnections and polymer adhesion of a flip chip to a substrate includes providing a chip having a set of bumps formed on a bump side thereof and a substrate having a set of interconnect points on a metallization thereon, providing a measured quantity of a polymer adhesive in a middle region of the chip on the bump side, aligning the chip with the substrate so that the set of bumps aligns with the set of interconnect points, pressing the chip and the substrate toward one another so that a portion of the polymer adhesive contacts the substrate and the bumps contact the interconnect points, and heating the bumps to a temperature sufficiently high to form a metallurgical connection between the bumps and the interconnect points.Type: ApplicationFiled: October 7, 2011Publication date: May 9, 2013Applicant: STATS CHIPPAC, LTD.Inventors: Nazir Ahmad, Young-Do Kweon, Samuel Tam, Kyung-Moon Kim, Rajendra D. Pendse
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Publication number: 20120217635Abstract: A method of making a semiconductor device includes providing a substrate and forming a conductive layer on the substrate. The conductive layer includes a first metal. A semiconductor die is provided. A bump is formed on the semiconductor die. The bump includes a second metal. The semiconductor die is positioned proximate to the substrate to contact the bump to the conductive layer and form a bonding interface. The bump and the conductive layer are metallurgically reacted at a melting point of the first metal to dissolve a portion of the second metal from an end of the bump. The bonding interface is heated to the melting point of the first metal for a time sufficient to melt a portion of the first metal from the conductive layer. A width of the conductive layer is no greater than a width of the bump.Type: ApplicationFiled: September 26, 2011Publication date: August 30, 2012Applicant: STATS CHIPPAC, LTD.Inventors: Nazir Ahmad, Young-Do Kwon, Samuel Tam, Kyung-Moon Kim, Rajendra D. Pendse
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Publication number: 20120049357Abstract: A method for forming metallurgical interconnections and polymer adhesion of a flip chip to a substrate includes providing a chip having a set of bumps formed on a bump side thereof and a substrate having a set of interconnect points on a metallization thereon, providing a measured quantity of a polymer adhesive in a middle region of the chip on the bump side, aligning the chip with the substrate so that the set of bumps aligns with the set of interconnect points, pressing the chip and the substrate toward one another so that a portion of the polymer adhesive contacts the substrate and the bumps contact the interconnect points, and heating the bumps to a temperature sufficiently high to form a metallurgical connection between the bumps and the interconnect points.Type: ApplicationFiled: October 7, 2011Publication date: March 1, 2012Applicant: STATS CHIPPAC, LTD.Inventors: Nazir Ahmad, Young-Do Kweon, Samuel Tam, Kyung-Moon Kim, Rajendra D. Pendse
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Patent number: 8119450Abstract: A method for forming metallurgical interconnections and polymer adhesion of a flip chip to a substrate includes providing a chip having a set of bumps formed on a bump side thereof and a substrate having a set of interconnect points on a metallization thereon, providing a measured quantity of a polymer adhesive in a middle region of the chip on the bump side, aligning the chip with the substrate so that the set of bumps aligns with the set of interconnect points, pressing the chip and the substrate toward one another so that a portion of the polymer adhesive contacts the substrate and the bumps contact the interconnect points, and heating the bumps to a temperature sufficiently high to form a metallurgical connection between the bumps and the interconnect points. Also, a flip chip package is made by the method. The metallurgical connection includes an alloy of gold and tin at the interface between the bumps and the interconnect points.Type: GrantFiled: May 26, 2009Date of Patent: February 21, 2012Assignee: STATS ChipPAC, Ltd.Inventors: Nazir Ahmad, Young-Do Kweon, Samuel Tam, Kyung-Moon Kim, Rajendra D. Pendse
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Publication number: 20120013005Abstract: A method of making a semiconductor device includes providing a substrate and forming a conductive layer on the substrate. The conductive layer includes a first metal. A semiconductor die is provided. A bump is formed on the semiconductor die. The bump includes a second metal. The semiconductor die is positioned proximate to the substrate to contact the bump to the conductive layer and form a bonding interface. The bump and the conductive layer are metallurgically reacted at a melting point of the first metal to dissolve a portion of the second metal from an end of the bump. The bonding interface is heated to the melting point of the first metal for a time sufficient to melt a portion of the first metal from the conductive layer. A width of the conductive layer is no greater than a width of the bump.Type: ApplicationFiled: September 26, 2011Publication date: January 19, 2012Applicant: STATS CHIPPAC, LTD.Inventors: Nazir Ahmad, Young-Do Kwon, Samuel Tam, Kyung-Moon Kim, Rajendra D. Pendse
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Publication number: 20090227072Abstract: A method for forming metallurgical interconnections and polymer adhesion of a flip chip to a substrate includes providing a chip having a set of bumps formed on a bump side thereof and a substrate having a set of interconnect points on a metallization thereon, providing a measured quantity of a polymer adhesive in a middle region of the chip on the bump side, aligning the chip with the substrate so that the set of bumps aligns with the set of interconnect points, pressing the chip and the substrate toward one another so that a portion of the polymer adhesive contacts the substrate and the bumps contact the interconnect points, and heating the bumps to a temperature sufficiently high to form a metallurgical connection between the bumps and the interconnect points. Also, a flip chip package is made by the method. In some embodiments the metallurgical connection includes an alloy of gold and tin at the interface between the bumps and the interconnect points.Type: ApplicationFiled: May 26, 2009Publication date: September 10, 2009Applicant: STATS CHIPPAC, LTD.Inventors: Nazir Ahmad, Young-Do Kweon, Samuel Tam, Kyung-Moon Kim, Rajendra D. Pendse
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Publication number: 20080277747Abstract: A sensor device and a method of forming comprises a die pad receives a MEMS device. The MEMS device has a first coefficient of thermal expansion (CTE). The die pad is made of a material having a second CTE compliant with the first CTE. The sensor device includes a support structure with a CTE not compliant with the first and second CTE. The support structure has a cylindrical port that protrudes from a base and is coupled to the die pad. The cylindrical port has a height and wall thickness which minimize forces felt by the die pad and MEMS device when the support structure undergoes thermal expansion or contraction. The base and cylindrical port can have different or similar outer diameters. The die pad has an aperture which communicates with an aperture of the MEMS device, whereby the die pad aperture has a smaller diameter than the MEMS aperture.Type: ApplicationFiled: May 8, 2008Publication date: November 13, 2008Inventor: Nazir Ahmad
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Patent number: 7407877Abstract: A stud bump structure for electrical interconnection between a pair of members includes a base portion, and a stem portion. The base portion is affixed to a pad or trace in one of the pair of members to be interconnected (such as an integrated circuit chip), and the stem end is configured to contact a metal pad on the other member (such as a printed circuit board) to complete the interconnect. According to the invention, the stem end is truncated to form a transverse plane, and the stem is more compliant than the base. Also, a method for forming a stud bump on a contact surface, includes forming a bump base portion on the surface, drawing out a generally conical tail from a top of the base, and truncating the tail to form a stem portion having a planar transverse top surface and having a length from the top of the base portion to the top surface. In some embodiments the tail portion, at least, of the stud bump is formed using a wire bonding tool.Type: GrantFiled: June 3, 2005Date of Patent: August 5, 2008Assignee: ChipPAC, Inc.Inventors: Young-Do Kweon, Rajendra D. Pendse, Nazir Ahmad, Kyung-Moon Kim