Abstract: A MOSFET component used to switch high currents includes a current path that is parallel-connected to the base-emitter link of the parasitic bipolar transistor, extracts the minority charge carriers, and prevents the parasitic transistor from being biased into conduction.

Abstract: There is disclosed a lens arrangement comprising: an input negative macro-lens array negative macro-lens aray; an output negative macro-lens aray disposed with its lenses arranged correspondingly to those of the input array, and between said input and output arrays a double convex microlens array.

Abstract: An avalanche breakdown diode includes a p-doped trough in which a highly p-doped region is introduced. In addition to the trough, an n-doped region is introduced, which is underlaid by a p-doped layer. The trough and the p-doped layer define a precisely established interspace. The arrangement is introduced into a p-type substrate. An insulating layer and thereon, in turn, a conductive layer are applied over the region between the trough and the p-doped layer. The conductive layer and the n-doped region are connected to a positive voltage and the highly p-doped region is connected to a negative voltage. A drift of the breakdown voltage is thereby prevented. In addition, the resistance during the breakdown is small due to the defined interspace between the trough and the layer.

Abstract: An integrated circuit having a gate oxide, preferably for a DMOS circuit having a protective device against electrostatic overvoltages (ESD), is to connect a limiting circuit in series with the protective device. This series circuit means that, during the wafer production, an increased voltage can be applied to the gate of the integrated circuit, for testing the gate oxide, without the circuit being limited to a lower value. After testing, the limiting circuit is connected irreversibly in its low-resistance state, with the result that subsequent ESD interference voltages are limited by the built-in protective device. A zener zapping diode is provided as the limiting circuit. An advantageous result of the arrangement is the fact that an additional bonding connection for connecting the gate connection to the protective device is no longer necessary.

Abstract: An imaging arrangement has a first lens array with a focal surface and a tapered optical fiber bundle arranged with one end face coincident with the focal surface of the lens array. Another end of the bundle is coincident an optical device. The optical device may be a second lens array, an image capture device, a photographic plate, or an electronic image capture device such as a CCD array. The fiber bundle may comprise a single graded index fiber connecting the first and second lens arrays. An integral transmission screen may be provided to project a spatially inverted integral image onto the first lens array.

Abstract: A lens system comprising an input lens array (11), an optical transmission microlens screen (12), and an output lens array (13), in which the lenses (11a) of the input array (11) correspond along an optical axis with corresponding lenses (13a) of the output array (13).

Abstract: There is disclosed an imaging system forming a pseudoscopic image in focus throughout extended depth of field comprising an input relay lens array, a double integral microlens screen having a median plane on to which the input lens array images an object scene and, on the opposite side of the screen and the same distance therefrom as the input array, an output relay lens array similar to the input lens array.

Abstract: A monolithically integrated circuit arrangement is arranged in a disc-shaped monocrystalline semiconductor body (100) of a first conductivity type, which semiconductor body consists of silicon and has a first and second main surface. The monolithically integrated circuit arrangement contains a vertical MOSFET power transistor (T1) which consists of a plurality of partial transistors connected in parallel and surrounded by a guard ring (4) of a second conductivity type opposite that of the semiconductor body (100). Proceeding from the first main surface (13), at least one zone (7, 8) of the conductivity type of the semiconductor body (100) but of increased impurity concentration is diffused into the guard ring (4) so as to form at least one active and/or passive peripheral circuit element (T2) which has a protective and/or regulating and/or control function.

Abstract: The invention relates to the production of three dimensional images for direct viewing or for recording on a sensitized recording surface. The invention provides a method and apparatus for the direct production of integral parallax orthoscopic panoramagramic images, which objective is met by a process comprising directing at an object a means of gathering and focussing incoming radiation from the object of a wavelength to which said means is suited, positioning to either side of said gathering and focussing means a grouping means for producing a number of groups of individual waves, each group emanating from a part of said object, said grouping means generating an image in pseudoscopic form, and a means of encoding the pseudoscopic image as discrete parallactic information on a single plane, for subsequent viewing as an orthoscopic image.

Abstract: A semiconductor device, for example a power rectifier, formed in a semiconductor body has a contact area coated with a metal layer of, for example, gold. A metallic member is soldered to the layer with an alloy comprising at least 80% lead, the balance being indium and silver in a ratio of at least 4:1 and at most 10:1. One such solder which has good wetting characteristics for improved bond strength contains approximately 92% lead, 7% indium, and 1% silver.