Patents by Inventor Neil Kaminar
Neil Kaminar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10903786Abstract: In one embodiment, harmful solar cell polarization is prevented or minimized by providing a conductive path that bleeds charge from a front side of a solar cell to the bulk of a wafer. The conductive path may include patterned holes in a dielectric passivation layer, a conductive anti-reflective coating, or layers of conductive material formed on the top or bottom surface of an anti-reflective coating, for example. Harmful solar cell polarization may also be prevented by biasing a region of a solar cell module on the front side of the solar cell.Type: GrantFiled: November 20, 2018Date of Patent: January 26, 2021Assignee: SunPower CorporationInventors: Richard M. Swanson, Denis De Ceuster, Vikas Desai, Douglas H. Rose, David D. Smith, Neil Kaminar
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Publication number: 20190109560Abstract: In one embodiment, harmful solar cell polarization is prevented or minimized by providing a conductive path that bleeds charge from a front side of a solar cell to the bulk of a wafer. The conductive path may include patterned holes in a dielectric passivation layer, a conductive anti-reflective coating, or layers of conductive material formed on the top or bottom surface of an anti-reflective coating, for example. Harmful solar cell polarization may also be prevented by biasing a region of a solar cell module on the front side of the solar cell.Type: ApplicationFiled: November 20, 2018Publication date: April 11, 2019Applicant: SunPower CorporationInventors: Richard M. SWANSON, Denis DE CEUSTER, Vikas DESAI, Douglas H. ROSE, David D. SMITH, Neil KAMINAR
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Patent number: 10164567Abstract: In one embodiment, harmful solar cell polarization is prevented or minimized by providing a conductive path that bleeds charge from a front side of a solar cell to the bulk of a wafer. The conductive path may include patterned holes in a dielectric passivation layer, a conductive anti-reflective coating, or layers of conductive material formed on the top or bottom surface of an anti-reflective coating, for example. Harmful solar cell polarization may also be prevented by biasing a region of a solar cell module on the front side of the solar cell.Type: GrantFiled: August 5, 2016Date of Patent: December 25, 2018Assignee: SunPower CorporationInventors: Richard M. Swanson, Denis De Ceuster, Vikas Desai, Douglas H. Rose, David D. Smith, Neil Kaminar
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Patent number: 9774294Abstract: In one embodiment, harmful solar cell polarization is prevented or minimized by providing a conductive path that bleeds charge from a front side of a solar cell to the bulk of a wafer. The conductive path may include patterned holes in a dielectric passivation layer, a conductive anti-reflective coating, or layers of conductive material formed on the top or bottom surface of an anti-reflective coating, for example. Harmful solar cell polarization may also be prevented by biasing a region of a solar cell module on the front side of the solar cell.Type: GrantFiled: August 18, 2016Date of Patent: September 26, 2017Assignee: SunPower CorporationInventors: Richard M. Swanson, Denis De Ceuster, Vikas Desai, Douglas H. Rose, David D. Smith, Neil Kaminar
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Patent number: 9691924Abstract: Solar cell interconnects with multiple current paths. A solar cell interconnect may include a plurality of in-plane slits arranged in several rows. The in-plane slits may be spaced to provide strain relief without unduly increasing the electrical path resistance through the solar cell interconnect. The in-plane slits may be staggered, for example.Type: GrantFiled: March 7, 2012Date of Patent: June 27, 2017Assignee: SunPower CorporationInventors: Douglas H. Rose, Shandor G. Daroczi, Neil Kaminar
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Publication number: 20170047888Abstract: In one embodiment, harmful solar cell polarization is prevented or minimized by providing a conductive path that bleeds charge from a front side of a solar cell to the bulk of a wafer. The conductive path may include patterned holes in a dielectric passivation layer, a conductive anti-reflective coating, or layers of conductive material formed on the top or bottom surface of an anti-reflective coating, for example. Harmful solar cell polarization may also be prevented by biasing a region of a solar cell module on the front side of the solar cell.Type: ApplicationFiled: August 18, 2016Publication date: February 16, 2017Applicant: SunPower CorporationInventors: Richard M. SWANSON, Denis DE CEUSTER, Vikas DESAI, Douglas H. ROSE, David D. SMITH, Neil KAMINAR
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Publication number: 20170033248Abstract: In one embodiment, harmful solar cell polarization is prevented or minimized by providing a conductive path that bleeds charge from a front side of a solar cell to the bulk of a wafer. The conductive path may include patterned holes in a dielectric passivation layer, a conductive anti-reflective coating, or layers of conductive material formed on the top or bottom surface of an anti-reflective coating, for example. Harmful solar cell polarization may also be prevented by biasing a region of a solar cell module on the front side of the solar cell.Type: ApplicationFiled: August 5, 2016Publication date: February 2, 2017Applicant: SunPower CorporationInventors: Richard M. SWANSON, Denis DE CEUSTER, Vikas DESAI, Douglas H. ROSE, David D. SMITH, Neil KAMINAR
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Publication number: 20150288328Abstract: In one embodiment, harmful solar cell polarization is prevented or minimized by providing a conductive path that bleeds charge from a front side of a solar cell to the bulk of a wafer. The conductive path may include patterned holes in a dielectric passivation layer, a conductive anti-reflective coating, or layers of conductive material formed on the top or bottom surface of an anti-reflective coating, for example. Harmful solar cell polarization may also be prevented by biasing a region of a solar cell module on the front side of the solar cell.Type: ApplicationFiled: April 15, 2015Publication date: October 8, 2015Applicant: SunPower CorporationInventors: Richard M. SWANSON, Denis DE CEUSTER, Vikas DESAI, Douglas H. ROSE, David D. SMITH, Neil KAMINAR
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Patent number: 9035167Abstract: In one embodiment, harmful solar cell polarization is prevented or minimized by providing a conductive path that bleeds charge from a front side of a solar cell to the bulk of a wafer. The conductive path may include patterned holes in a dielectric passivation layer, a conductive anti-reflective coating, or layers of conductive material formed on the top or bottom surface of an anti-reflective coating, for example. Harmful solar cell polarization may also be prevented by biasing a region of a solar cell module on the front side of the solar cell.Type: GrantFiled: July 28, 2010Date of Patent: May 19, 2015Assignee: SunPower CorporationInventors: Richard M. Swanson, Denis De Ceuster, Vikas Desai, Douglas H. Rose, David D. Smith, Neil Kaminar
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Patent number: 8399287Abstract: A solar cell that is readily manufactured using processing techniques which are less expensive than microelectronic circuit processing. In preferred embodiments, printing techniques are utilized in selectively forming masks for use in etching of silicon oxide and diffusing dopants and in forming metal contacts to diffused regions. In a preferred embodiment, p-doped regions and n-doped regions are alternately formed in a surface of the wafer through use of masking and etching techniques. Metal contacts are made to the p-regions and n-regions by first forming a seed layer stack that comprises a first layer such as aluminum that contacts silicon and functions as an infrared reflector, second layer such titanium tungsten that acts as diffusion barrier, and a third layer functions as a plating base. A thick conductive layer such as copper is then plated over the seed layer, and the seed layer between plated lines is removed.Type: GrantFiled: January 25, 2011Date of Patent: March 19, 2013Assignee: SunPower CorporationInventors: William P. Mulligan, Michael J. Cudzinovic, Thomas Pass, David D. Smith, Neil Kaminar, Keith McIntosh, Richard M. Swanson
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Patent number: 8148627Abstract: Solar cell interconnects with multiple current paths. A solar cell interconnect may include a plurality of in-plane slits arranged in several rows. The in-plane slits may be spaced to provide strain relief without unduly increasing the electrical path resistance through the solar cell interconnect. The in-plane slits may be staggered, for example.Type: GrantFiled: August 23, 2007Date of Patent: April 3, 2012Assignee: SunPower CorporationInventors: Douglas H. Rose, Shandor G. Daroczi, Neil Kaminar
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Patent number: 7897867Abstract: A solar cell that is readily manufactured using processing techniques which are less expensive than microelectronic circuit processing. In preferred embodiments, printing techniques are utilized in selectively forming masks for use in etching of silicon oxide and diffusing dopants and in forming metal contacts to diffused regions. In a preferred embodiment, p-doped regions and n-doped regions are alternately formed in a surface of the wafer through use of masking and etching techniques. Metal contacts are made to the p-regions and n-regions by first forming a seed layer stack that comprises a first layer such as aluminum that contacts silicon and functions as an infrared reflector, second layer such titanium tungsten that acts as diffusion barrier, and a third layer functions as a plating base. A thick conductive layer such as copper is then plated over the seed layer, and the seed layer between plated lines is removed.Type: GrantFiled: February 13, 2008Date of Patent: March 1, 2011Assignee: SunPower CorporationInventors: William P. Mulligan, Michael J. Cudzinovic, Thomas Pass, David Smith, Neil Kaminar, Keith McIntosh, Richard M. Swanson
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Patent number: 7883343Abstract: A solar cell that is readily manufactured using processing techniques which are less expensive than microelectronic circuit processing. In preferred embodiments, printing techniques are utilized in selectively forming masks for use in etching of silicon oxide and diffusing dopants and in forming metal contacts to diffused regions. In a preferred embodiment, p-doped regions and n-doped regions are alternately formed in a surface of the wafer through use of masking and etching techniques. Metal contacts are made to the p-regions and n-regions by first forming a seed layer stack that comprises a first layer such as aluminum that contacts silicon and functions as an infrared reflector, second layer such titanium tungsten that acts as diffusion barrier, and a third layer functions as a plating base. A thick conductive layer such as copper is then plated over the seed layer, and the seed layer between plated lines is removed.Type: GrantFiled: March 28, 2007Date of Patent: February 8, 2011Assignee: SunPower CorporationInventors: William P. Mulligan, Michael J. Cudzinovic, Thomas Pass, David Smith, Neil Kaminar, Keith McIntosh, Richard M. Swanson
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Publication number: 20100307562Abstract: In one embodiment, harmful solar cell polarization is prevented or minimized by providing a conductive path that bleeds charge from a front side of a solar cell to the bulk of a wafer. The conductive path may include patterned holes in a dielectric passivation layer, a conductive anti-reflective coating, or layers of conductive material formed on the top or bottom surface of an anti-reflective coating, for example. Harmful solar cell polarization may also be prevented by biasing a region of a solar cell module on the front side of the solar cell.Type: ApplicationFiled: July 28, 2010Publication date: December 9, 2010Inventors: Richard M. SWANSON, Denis DE CEUSTER, Vikas DESAI, Douglas H. ROSE, David D. SMITH, Neil KAMINAR
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Patent number: 7786375Abstract: In one embodiment, harmful solar cell polarization is prevented or minimized by providing a conductive path that bleeds charge from a front side of a solar cell to the bulk of a wafer. The conductive path may include patterned holes in a dielectric passivation layer, a conductive anti-reflective coating, or layers of conductive material formed on the top or bottom surface of an anti-reflective coating, for example. Harmful solar cell polarization may also be prevented by biasing a region of a solar cell module on the front side of the solar cell.Type: GrantFiled: June 3, 2009Date of Patent: August 31, 2010Assignee: SunPower CorporationInventors: Richard M. Swanson, Denis De Ceuster, Vikas Desai, Douglas H. Rose, David D. Smith, Neil Kaminar
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Publication number: 20100144218Abstract: Solar cell interconnects with multiple current paths. A solar cell interconnect may include a plurality of in-plane slits arranged in several rows. The in-plane slits may be spaced to provide strain relief without unduly increasing the electrical path resistance through the solar cell interconnect. The in-plane slits may be staggered, for example.Type: ApplicationFiled: August 23, 2007Publication date: June 10, 2010Inventors: Douglas H. Rose, Shandor G. Daroczi, Neil Kaminar
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Publication number: 20090260673Abstract: In one embodiment, harmful solar cell polarization is prevented or minimized by providing a conductive path that bleeds charge from a front side of a solar cell to the bulk of a wafer. The conductive path may include patterned holes in a dielectric passivation layer, a conductive anti-reflective coating, or layers of conductive material formed on the top or bottom surface of an anti-reflective coating, for example. Harmful solar cell polarization may also be prevented by biasing a region of a solar cell module on the front side of the solar cell.Type: ApplicationFiled: June 3, 2009Publication date: October 22, 2009Inventors: Richard M. Swanson, Denis De Ceuster, Vikas Desai, Douglas H. Rose, David D. Smith, Neil Kaminar
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Patent number: 7554031Abstract: In one embodiment, harmful solar cell polarization is prevented or minimized by providing a conductive path that bleeds charge from a front side of a solar cell to the bulk of a wafer. The conductive path may include patterned holes in a dielectric passivation layer, a conductive anti-reflective coating, or layers of conductive material formed on the top or bottom surface of an anti-reflective coating, for example. Harmful solar cell polarization may also be prevented by biasing a region of a solar cell module on the front side of the solar cell.Type: GrantFiled: August 22, 2005Date of Patent: June 30, 2009Assignee: Sunpower CorporationInventors: Richard M. Swanson, Denis De Ceuster, Vikas Desai, Douglas H. Rose, David D. Smith, Neil Kaminar
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Patent number: 7339110Abstract: A solar cell that is readily manufactured using processing techniques which are less expensive than microelectronic circuit processing. In preferred embodiments, printing techniques are utilized in selectively forming masks for use in etching of silicon oxide and diffusing dopants and in forming metal contacts to diffused regions. In a preferred embodiment, p-doped regions and n-doped regions are alternately formed in a surface of the wafer in offset levels through use of masking and etching techniques. Metal contacts are made to the p-regions and n-regions by first forming a seed layer stack that comprises a first layer such as aluminum that contacts silicon and functions as an infrared reflector, second layer such titanium tungsten that acts as diffusion barrier, and a third layer functions as a plating base. A thick conductive layer such as copper is then plated over the seed layer, and the seed layer between plated lines is removed.Type: GrantFiled: April 10, 2003Date of Patent: March 4, 2008Assignee: SunPower CorporationInventors: William P. Mulligan, Michael J. Cudzinovic, Thomas Pass, David Smith, Neil Kaminar, Keith McIntosh, Richard M. Swanson
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Patent number: 7172184Abstract: A carrier for use in processing of a plurality of wafers or other substrates includes a support frame on which the wafers are mounted and in one embodiment at least one auxiliary frame for holding the substrates on the support frame. A plurality of clips extend from the auxiliary frame and engage the substrates in pressure engagement, and fasteners retain the auxiliary frame in position with respect to the support frame. In one embodiment two auxiliary frames can be employed for holding wafers on opposing surfaces of the support frame. The support frame has electrically non-conducting surfaces whereby the processing does not affect the support frame, and the auxiliary frame is made of electrically non-conductive material. The clips are electrically conductive and bridge current from the support frame to the wafers during plating operations. In another embodiment, auxiliary frame are not used and the wafer retention clips are mounted on the support frame.Type: GrantFiled: August 4, 2004Date of Patent: February 6, 2007Assignee: Sunpower CorporationInventors: Luca Pavani, Neil Kaminar, Pongsthorn Uralwong, Thomas Phu, Douglas H. Rose, Thomas Pass