Abstract: A memory system or flash card may include a mechanism for memory cell measurement and analysis that independently measures/predicts memory wear/endurance, data retention (DR), read disturb, and/or remaining margin. These effects may be independently quantified by analyzing the state distributions of the individual voltage levels of the cells. In particular, a histogram of cell voltage distributions of the memory cells can be analyzed to identify signatures for certain effects (e.g. wear, DR, read disturb, margin, etc.). Those measurements may be used for block cycling, data loss prediction, or adjustments to memory parameters. Pre-emptive action at the appropriate time based on the measurements may lead to improved memory management and data management. That action may include calculating the remaining useful life of data stored in memory, cycling blocks, predicting data loss, trade-off or dynamic adjustments of memory parameters.

Abstract: A memory system or flash card may include a mechanism for memory cell measurement and analysis that independently measures/predicts memory wear/endurance, data retention (DR), read disturb, and/or remaining margin. These effects may be independently quantified by analyzing the state distributions of the individual voltage levels of the cells. In particular, a histogram of cell voltage distributions of the memory cells can be analyzed to identify signatures for certain effects (e.g. wear, DR, read disturb, margin, etc.). Those measurements may be used for block cycling, data loss prediction, or adjustments to memory parameters. Pre-emptive action at the appropriate time based on the measurements may lead to improved memory management and data management. That action may include calculating the remaining useful life of data stored in memory, cycling blocks, predicting data loss, trade-off or dynamic adjustments of memory parameters.

Abstract: A memory system or flash card may include a mechanism for memory cell measurement and analysis that independently measures/predicts memory wear/endurance, data retention (DR), read disturb, and/or remaining margin. These effects may be independently quantified by analyzing the state distributions of the individual voltage levels of the cells. In particular, a histogram of cell voltage distributions of the memory cells can be analyzed to identify signatures for certain effects (e.g. wear, DR, read disturb, margin, etc.). Those measurements may be used for block cycling, data loss prediction, or adjustments to memory parameters. Pre-emptive action at the appropriate time based on the measurements may lead to improved memory management and data management. That action may include calculating the remaining useful life of data stored in memory, cycling blocks, predicting data loss, trade-off or dynamic adjustments of memory parameters.

Abstract: A memory system or flash card may include a mechanism for memory cell measurement and analysis that independently measures/predicts memory wear/endurance, data retention (DR), read disturb, and/or remaining margin. These effects may be independently quantified by analyzing the state distributions of the individual voltage levels of the cells. In particular, a histogram of cell voltage distributions of the memory cells can be analyzed to identify signatures for certain effects (e.g. wear, DR, read disturb, margin, etc.). Those measurements may be used for block cycling, data loss prediction, or adjustments to memory parameters. Pre-emptive action at the appropriate time based on the measurements may lead to improved memory management and data management. That action may include calculating the remaining useful life of data stored in memory, cycling blocks, predicting data loss, trade-off or dynamic adjustments of memory parameters.

Abstract: A memory system or flash card may include a mechanism for memory cell measurement and analysis that independently measures/predicts memory wear/endurance, data retention (DR), read disturb, and/or remaining margin. These effects may be independently quantified by analyzing the state distributions of the individual voltage levels of the cells. In particular, a histogram of cell voltage distributions of the memory cells can be analyzed to identify signatures for certain effects (e.g. wear, DR, read disturb, margin, etc.). Those measurements may be used for block cycling, data loss prediction, or adjustments to memory parameters. Pre-emptive action at the appropriate time based on the measurements may lead to improved memory management and data management. That action may include calculating the remaining useful life of data stored in memory, cycling blocks, predicting data loss, trade-off or dynamic adjustments of memory parameters.

Abstract: A memory system or flash card may include a mechanism for memory cell measurement and analysis that independently measures/predicts memory wear/endurance, data retention (DR), read disturb, and/or remaining margin. These effects may be independently quantified by analyzing the state distributions of the individual voltage levels of the cells. In particular, a histogram of cell voltage distributions of the memory cells can be analyzed to identify signatures for certain effects (e.g. wear, DR, read disturb, margin, etc.). Those measurements may be used for block cycling, data loss prediction, or adjustments to memory parameters. Pre-emptive action at the appropriate time based on the measurements may lead to improved memory management and data management. That action may include calculating the remaining useful life of data stored in memory, cycling blocks, predicting data loss, trade-off or dynamic adjustments of memory parameters.

Abstract: A memory system or flash card may include a mechanism for memory cell measurement and analysis that independently measures/predicts memory wear/endurance, data retention (DR), read disturb, and/or remaining margin. These effects may be independently quantified by analyzing the state distributions of the individual voltage levels of the cells. In particular, a histogram of cell voltage distributions of the memory cells can be analyzed to identify signatures for certain effects (e.g. wear, DR, read disturb, margin, etc.). Those measurements may be used for block cycling, data loss prediction, or adjustments to memory parameters. Pre-emptive action at the appropriate time based on the measurements may lead to improved memory management and data management. That action may include calculating the remaining useful life of data stored in memory, cycling blocks, predicting data loss, trade-off or dynamic adjustments of memory parameters.

Abstract: A memory system or flash card may include a mechanism for memory cell measurement and analysis that independently measures/predicts memory wear/endurance, data retention (DR), read disturb, and/or remaining margin. These effects may be independently quantified by analyzing the state distributions of the individual voltage levels of the cells. In particular, a histogram of cell voltage distributions of the memory cells can be analyzed to identify signatures for certain effects (e.g. wear, DR, read disturb, margin, etc.). Those measurements may be used for block cycling, data loss prediction, or adjustments to memory parameters. Pre-emptive action at the appropriate time based on the measurements may lead to improved memory management and data management. That action may include calculating the remaining useful life of data stored in memory, cycling blocks, predicting data loss, trade-off or dynamic adjustments of memory parameters.

Abstract: A control system for an adaptive-power thermal management system of an aircraft having at least one adaptive cycle gas turbine engine includes a real time optimization solver that utilizes a plurality of models of systems to be controlled, the plurality of models each being defined by algorithms configured to predict changes to each system caused by current changes in input to each system. The real time optimization solver is configured to solve an open-loop optimal control problem on-line at each of a plurality of sampling times, to provide a series of optimal control actions as a solution to the open-loop optimal control problem. The real time optimization solver implements a first control action in a sequence of control actions and at a next sampling time the open-loop optimal control problem is re-posed and re-solved.

Abstract: Automatic processing and registering for merchant loyalty reward programs initiated by a single tap of a contactless device to a terminal reader. A user taps the contactless device in the terminal reader's radio frequency field. The terminal reader and the contactless device establish a communication channel and the terminal reader transmits details of the merchant's loyalty rewards program and a request for user information. The contactless device receives the request and accesses the user's stored information. The contactless device transmits the user information to the terminal reader and a new merchant loyalty account is created for the user. Acknowledgement of the new account, including a new loyalty account number, is transmitted to the contactless device. The loyalty account number is then saved in the contactless device.

Abstract: A method and system are disclosed for improved block erase cycle life prediction and block management in a non-volatile memory. The method includes the storage device tracking information relating to a first erase cycle count at which the block erase time exceeded a predetermined threshold relative to a first erase cycle at which this occurred in other blocks. Blocks having a later relative erase cycle at which the erase time threshold is exceeded are assumed to have a greater erase cycle life than those that need to exceed the erase time threshold at an earlier erase cycle. This information is used to adjust wear leveling in the form of free block selection, garbage collection block selection and other block management processes. Alternatively or in combination, the predicted erase cycle life information is used to adjust program and/or erase parameters such as erase voltage and time.

Abstract: A method of locating a mobile device (25) registered to a home telecommunications network (11), the method comprising: monitoring (40) network transactions; identifying (42) a first type of network transaction (30) indicating that the mobile device (25) is connected to a component of a foreign telecommunications network; identifying (44) a second type of network transaction (30) indicating that the mobile device (25) has cancelled a connection to the component of the foreign telecommunications network; locating (46) the mobile device (25) on the basis of the identified first and second types of network transaction (30); wherein locating (46) the mobile device (25) comprises setting the location status of the mobile device (25) as: within the foreign telecommunications network (29) if a network transaction of the first type has been identified, and; within the home telecommunications network (11) if a network transaction of the second type has been identified and no further network transactions of the first ty

Abstract: A method for analyzing a read error event is provided comprising reading a page of data stored in memory, determining a read error event for the page of data, and identifying a scope of the read error event in the memory. In another embodiment, a method for performing a preliminary read error recovery is provided comprising reading a first data unit from memory and identifying a bit error rate for a first data unit with a correction engine, determining that the bit error rate is above a threshold, accessing a data structure including entries identifying data units and read error event information associated with the data units, identifying a second data unit in an entry that matches the first data unit, and performing a preliminary read error recovery process on the first data unit using the information in the entry to reduce the bit error rate below the threshold.

Abstract: Disclosed are techniques and apparatuses for implementing device-based application security. These techniques enable a computing device to assign a security level from a hierarchy of security levels to an application. Once the security level is assigned to the application, authentication techniques associated with the security level can be initiated in response to a request to launch the application. When an indication is received that the security level for the application has been satisfied, the application can then be launched, availing a user of the application's full functionality.

Abstract: The present invention provides compounds of formula I: or a pharmaceutically acceptable salt, tautomer, or stereoisomer, thereof, wherein the variables are as defined herein. The present invention further provides pharmaceutical compositions comprising such compounds and methods of using such compounds for treating, preventing, inhibiting, ameliorating, or eradicating the pathology and/or symptomology of a disease caused by a parasite, such as Leishmaniasis, Human African Trypanosomiasis and Chagas disease.

Abstract: A control system for an adaptive-power thermal management system of an aircraft having at least one adaptive cycle gas turbine engine includes a real time optimization solver that utilizes a plurality of models of systems to be controlled, the plurality of models each being defined by algorithms configured to predict changes to each system caused by current changes in input to each system. The real time optimization solver is configured to solve an open-loop optimal control problem on-line at each of a plurality of sampling times, to provide a series of optimal control actions as a solution to the open-loop optimal control problem. The real time optimization solver implements a first control action in a sequence of control actions and at a next sampling time the open-loop optimal control problem is re-posed and re-solved.

Abstract: A method and system are disclosed for improved block erase cycle life prediction and block management in a non-volatile memory. The method includes the storage device tracking information relating to a first erase cycle count at which the block erase time exceeded a predetermined threshold relative to a first erase cycle at which this occurred in other blocks. Blocks having a later relative erase cycle at which the erase time threshold is exceeded are assumed to have a greater erase cycle life than those that need to exceed the erase time threshold at an earlier erase cycle. This information is used to adjust wear leveling in the form of free block selection, garbage collection block selection and other block management processes. Alternatively or in combination, the predicted erase cycle life information is used to adjust program and/or erase parameters such as erase voltage and time.

Abstract: A method and system are disclosed for improved block erase cycle life prediction and block management in a non-volatile memory. The method includes the storage device tracking information relating to a first erase cycle count at which the block erase time exceeded a predetermined threshold relative to a first erase cycle at which this occurred in other blocks. Blocks having a later relative erase cycle at which the erase time threshold is exceeded are assumed to have a greater erase cycle life than those that need to exceed the erase time threshold at an earlier erase cycle. This information is used to adjust wear leveling in the form of free block selection, garbage collection block selection and other block management processes. Alternatively or in combination, the predicted erase cycle life information is used to adjust program and/or erase parameters such as erase voltage and time.

Abstract: A sensor with a sensor housing or body, a plastic molded table positioned in the sensor housing; and a counter electrode carried on a first end of the table.

Abstract: A lock for locking a door, the lock comprises a pin moveable between a retracted position and an extended position for locking the door and an actuator movable from a first position to a second position to move the pin from the retracted position to the extended position. Furthermore, the lock comprises a mechanism comprising a spring for biasing the pin to the retracted position and a latch. When in the latched position the latch prevents the pin from moving from the extended position to the retracted position, and when in an unlatched position the latch allows the pin to move from the extended position to the retracted position. The mechanism is adapted to disengage the actuator from the pin when the pin is in the extended position.