Abstract: A chip includes a power pin, a ground pin, a plurality of input/output (I/O) pins, a readable/writable memory, a switching circuit, and a control circuit. The I/O pins include a plurality of mapping pins and a control pin. The readable/writable memory includes a clock port, a plurality of I/O ports, and an enable port. The control circuit selectively activates or does not activate the switching circuit according to the control pin. When the switching circuit is activated, the switching circuit electrically couples the clock port, the I/O ports, and the enable port to the mapping pins respectively.

Abstract: An electronic system includes a first electronic device and a second electronic device. The first electronic device includes a monitoring chip and a hub chip. The monitoring chip is coupled to an upstream port of the hub chip through a first connection and is coupled to the hub chip through a second connection. The second electronic device is configured to couple a downstream port of the hub chip. The monitoring chip is configured to acquire connection information of the second electronic device through the first connection, and acquire status information of the second electronic device through the second connection. The first electronic device is configured to control at least one third electronic device according to the connection information and the status information.

Abstract: A cable includes a first plug, a second plug, and a controller. The first plug is configured to be connected with a host. The second plug is configured to be connected with a device. The controller is coupled between the first plug and the second plug, and is configured to monitor a connection message transferred between the host and the device, and to determine, according to the connection message, a transfer mode that the host and the device is to enter, and to set a plurality of electrical parameters to be a corresponding one set in a plurality of sets of predetermined parameters.

Abstract: A card reader and a controller thereof, and a method are provided. The card reader includes a storage device and the controller, wherein the controller is coupled to the storage device. The storage device is configured to store specific identification data of a specific memory device. The controller is configured to receive identification data of the external memory device plugged into the card reader, and determine whether the external memory device is the specific memory device according to the identification data and the specific identification data, to generate a determination result. More particularly, the controller may control whether to open permission of at least one function according to the determination result.

Abstract: An electronic device with a card reading function includes a chip, a memory card slot, a card reading device, and a capacitor. The memory card slot receives a memory card. The card reader device is coupled to the chip through a Peripheral Component Interconnect Express (PCIe) interface and receives at least one of a first PCIe signal, an Ultra High Speed type II (UHS-II) Secure Digital (SD) card signal, and a legacy SD card signal, the UHS-II SD card signal including a DC component and an AC component. The capacitor establishes the PCIe interface. The card reading device includes a bridge card reader circuit for converting the legacy SD card signal or the UHS-II SD card signal into a second PCIe signal transmitted through the PCIe interface.

Abstract: A method of identifying the type of a memory card is provided for identifying the type of a secure digital (SD) card. The pin number of the SD card complies with an SD card specification formulated by the Secure Digital Association. The method includes the following steps: performing a legacy SD card initialization procedure on the SD card; and sequentially determining whether the SD card is an SD Express card, an Ultra High Speed type II (UHS-II) SD card, or a legacy SD card.

Abstract: A dongle coupled between a power supplying device for supplying power and a power receiving device for receiving power includes a downstream facing port (DFP), an upstream facing port (UFP) and a controller. The controller is arranged to control deliveries of the power and messages between the power supplying device and the power receiving device. In response to a first power request message received from the power receiving device, the controller is arranged to determine whether a power type request by the power receiving device is Programmable Power Supply (PPS) according to the first power request message. When determining that the power type request by the power receiving device is PPS, the controller is arranged to start first waiting timer, and when the first waiting timer expires, the controller is arranged to send a request accept message to the power receiving device through the UFP.

Abstract: An electronic device capable of accessing a memory card is provided. The electronic device includes a circuit board, a processing unit, a memory card slot, and a memory card access module. The processing unit is disposed on the circuit board. The memory card slot is disposed on the circuit board, allows the insertion of the memory card, and is coupled to the processing unit through a first signal line. The memory card access module is disposed on the circuit board for accessing the memory card. The memory card access module is coupled to the processing unit through a second signal line and coupled to the memory card slot through a third signal line and a fourth signal line. The first signal line, the second signal line, and the third signal line conform to the standard of a signal transmission interface.

Abstract: A memory card access module and a memory card access method are provided. The memory card access method is applied to an electronic device. A processing unit of the electronic device accesses a memory card through a memory card slot. The method includes steps of: detecting whether the memory card supports a Peripheral Component Interconnect Express (PCIe) interface; when the memory card does not support the PCIe interface, controlling the processing unit to access the memory card through a data transmission path and performing data format conversion between a transmission interface and the PCIe interface using a memory card access unit disposed on the data transmission path; and when the memory card supports the PCIe interface, controlling the processing unit to access the memory card through a PCIe data transmission path that allows the processing unit and the memory card to transmit data through the PCIe interface.

Abstract: A method and a control chip for performing access control of a memory device are provided, wherein the control chip is coupled to a host device. The method includes: utilizing a first transmission interface of the control chip to determine whether the memory device supports a second transmission interface different from the first transmission interface to generate a determination result; and according to user permissions of a user regarding the host device, determining whether to allow the control chip to decide whether to utilize the second transmission interface to access the memory device based on the determination result. In addition, if the user permissions satisfy a predetermined condition, a user interface of the host device may display a pop-up window in order to allow the user to decide which one of the first transmission interface and the second transmission interface to utilize for accessing the memory device.

Abstract: A method for performing detection control of a write protection function of a memory device, an associated control chip, and an associated electronic device are provided. The method includes: detecting whether the memory device supports a first protocol to generate an interface detection result; detecting whether a write protection switch of the memory device is turned on to generate a write protection detection result; and according to the interface detection result and the write protection detection result, selectively initializing a transmission interface of a control chip as a first transmission interface conforming to the first protocol or a second transmission interface, to allow a host device to access the memory device through the control chip, wherein the first transmission interface corresponds to a first configuration of the control chip, and the second transmission interface corresponds to a second configuration of the control chip.

Abstract: Disclosed is an IC firmware update method performed by an intermediary circuit. The method includes: communicating with a target circuit to enter a predetermined mode; transmitting a status response message to a host circuit in response to a status asking message of the host circuit so as to inform the host circuit of its entrance to the predetermined mode; after the transmission of the status response message, receiving a first protocol request command of the host circuit; converting the first protocol request command into N request-end unstructured vendor defined message(s) (USVDM(s)) and transmitting the N request-end USVDM(s) to the target circuit to let it execute a firmware update operation, in which the N is a positive integer; receiving N response-end USVDM(s) of the target circuit related to the N request-end USVDM(s); and converting the N response-end USVDM(s) into a first protocol response command and transmitting it to the host circuit.

Abstract: A cable includes a first plug, a second plug, and a controller. The first plug is configured to be connected with a host. The second plug is configured to be connected with a device. The controller is coupled between the first plug and the second plug, and is configured to monitor a connection message transferred between the host and the device, and to determine, according to the connection message, a transfer mode that the host and the device is to enter, and to set a plurality of electrical parameters to be a corresponding one set in a plurality of sets of predetermined parameters.

Abstract: An electronic device includes a first memory circuit, a second memory circuit, and a processor circuit. The first memory circuit is configured to store a key. The second memory circuit is configured to store an original software. The processor circuit is configured to receive data for updating, in which the data for updating includes a software for updating and a digital signature; perform a digest algorithm to process the software for updating and generate a first digest; utilize the key to decrypt the digital signature and generate a second digest; and compare the first digest with the second digest, in order to determine whether to update the original software to become the software for updating.

Abstract: A chip includes a power pin, a ground pin, a plurality of input/output (I/O) pins, a readable/writable memory, a switching circuit, and a control circuit. The I/O pins include a plurality of mapping pins and a control pin. The readable/writable memory includes a clock port, a plurality of I/O ports, and an enable port. The control circuit selectively activates or does not activate the switching circuit according to the control pin. When the switching circuit is activated, the switching circuit electrically couples the clock port, the I/O ports, and the enable port to the mapping pins respectively.

Abstract: A method and a control chip for performing access control of a memory device are provided, wherein the control chip is coupled to a host device. The method includes: utilizing a first transmission interface of the control chip to determine whether the memory device supports a second transmission interface different from the first transmission interface to generate a determination result; and according to user permissions of a user regarding the host device, determining whether to allow the control chip to decide whether to utilize the second transmission interface to access the memory device based on the determination result. In addition, if the user permissions satisfy a predetermined condition, a user interface of the host device may display a pop-up window in order to allow the user to decide which one of the first transmission interface and the second transmission interface to utilize for accessing the memory device.

Abstract: Disclosed is an IC firmware update method performed by an intermediary circuit. The method includes: communicating with a target circuit to enter a predetermined mode; transmitting a status response message to a host circuit in response to a status asking message of the host circuit so as to inform the host circuit of its entrance to the predetermined mode; after the transmission of the status response message, receiving a first protocol request command of the host circuit; converting the first protocol request command into N request-end unstructured vendor defined message(s) (USVDM(s)) and transmitting the N request-end USVDM(s) to the target circuit to let it execute a firmware update operation, in which the N is a positive integer; receiving N response-end USVDM(s) of the target circuit related to the N request-end USVDM(s); and converting the N response-end USVDM(s) into a first protocol response command and transmitting it to the host circuit.

Abstract: A method for performing detection control of a write protection function of a memory device, an associated control chip, and an associated electronic device are provided. The method includes: detecting whether the memory device supports a first protocol to generate an interface detection result; detecting whether a write protection switch of the memory device is turned on to generate a write protection detection result; and according to the interface detection result and the write protection detection result, selectively initializing a transmission interface of a control chip as a first transmission interface conforming to the first protocol or a second transmission interface, to allow a host device to access the memory device through the control chip, wherein the first transmission interface corresponds to a first configuration of the control chip, and the second transmission interface corresponds to a second configuration of the control chip.

Abstract: A memory card access module and a memory card access method are provided. The memory card access method is applied to an electronic device. A processing unit of the electronic device accesses a memory card through a memory card slot. The method includes steps of: detecting whether the memory card supports a Peripheral Component Interconnect Express (PCIe) interface; when the memory card does not support the PCIe interface, controlling the processing unit to access the memory card through a data transmission path and performing data format conversion between a transmission interface and the PCIe interface using a memory card access unit disposed on the data transmission path; and when the memory card supports the PCIe interface, controlling the processing unit to access the memory card through a PCIe data transmission path that allows the processing unit and the memory card to transmit data through the PCIe interface.

Abstract: This invention discloses a memory card access module and a memory card access method. The memory card access method is applied to an electronic device. A processing unit of the electronic device accesses a memory card through a memory card slot. The method includes steps of: detecting whether the memory card supports a Peripheral Component Interconnect Express (PCIe) interface; when the memory card does not support the PCIe interface, controlling the processing unit to access the memory card through a first data transmission path and performing data format conversion between a transmission interface and the PCIe interface using a memory card access unit disposed on the first data transmission path; and when the memory card supports the PCIe interface, controlling the processing unit to access the memory card through a second data transmission path that allows the processing unit and the memory card to transmit data through the PCIe interface.