Abstract: A technique for reducing FM intrusion in an AM section of an AM/FM receiver. In one embodiment, a first switch is provided between an FM tuner filter circuit and an AM tuner circuit. A second switch is provided between the FM tuner circuit and a reference potential. When the receiver is in an FM mode, the first switch is closed so that a tuning voltage can be applied to the FM tuner circuit, and the second switch is open to prevent the tuning voltage from being affected by the reference potential. When the receiver is switched to the AM mode, the first switch is open to prevent intermodulation product signals generated by the FM tuner circuit from reaching the AM tuner circuit, and the second switch is closed to connect the FM tuner circuit to the reference potential. By connecting the FM tuner circuit to the reference potential when the receiver is in the AM mode, the tuning of the FM tuner circuit is shifted out of the FM bandwidth, thus eliminating intermodulation products at the AM frequencies.

Abstract: A method of synthesizing deuterated morphine-3.beta.-glucuronide, morphine-6.beta.-glucuronide, and codeine-6.beta.-glucuronide is disclosed. The chemicals are used as internal standards for mass spectrometry analyses of morphine, heroin, and codeine uses. They are also useful in the study of metabolism of morphine and codeine.

Abstract: A system for clocking self resetting CMOS (SRCMOS) circuits operating at high speed includes a clock generator circuit which produces a first pipeline clock pulse of relatively narrow width from a leading edge of a system clock having a relatively long duration with respect to the first pipeline clock, a number of delay circuits, the time duration of each of the delay circuits being determined by characteristics of evaluation logic in the SRCMOS circuits being clocked, the delay circuits being connected in a serial pipeline fashion such that each subsequent delayed clock pulse overlaps a preceding clock pulse by at least a predetermined minimum time duration. The clocking system also includes a cycle relax mode whereby the clock pulse output of the clock generator circuit may be extended for test or diagnostic purposes.