Abstract: In some embodiments, a processing system includes at least one hardware block configured to change operation as a function of configuration data, a non-volatile memory including the configuration data for the at least one hardware block, and a configuration module configured to read the configuration data from the non-volatile memory and provide the configuration data read from the non-volatile memory to the at least one hardware block. The configuration module is configured to: receive mode configuration data; read the configuration data from the non-volatile memory; test whether the configuration data contain errors by verifying whether the configuration data are corrupted and/or invalid; and activate a normal operation mode or an error operation mode based on whether the configuration data contain or do not contain errors.

Abstract: In some embodiments, a processing system includes at least one hardware block configured to change operation as a function of configuration data, a non-volatile memory including the configuration data for the at least one hardware block, and a configuration module configured to read the configuration data from the non-volatile memory and provide the configuration data read from the non-volatile memory to the at least one hardware block. The configuration module is configured to: receive mode configuration data; read the configuration data from the non-volatile memory; test whether the configuration data contain errors by verifying whether the configuration data are corrupted and/or invalid; and activate a normal operation mode or an error operation mode based on whether the configuration data contain or do not contain errors.

Abstract: A semiconductor device, for example an integrated circuit such as a microcontroller (MCU) or a digital signal processor (DSP), includes a semiconductor die coupled with a power supply line, a debug module coupled with the semiconductor die to exchange semiconductor die debug command and data signals with the semiconductor die, and a modem coupled with the power supply line. The debug module is arranged to convey the semiconductor die debug command and data signals over the power supply line.

Abstract: This disclosure concerns a metal clip for electrically connecting a conductive wire to a planar metal element, the metal clip having an S-shaped cross-section and being composed of three wings, a first wing and a second wing defining a first longitudinal recess allowing the metal clip to be attached to an edge of the planar metal element, the second wing and the third wing defining a second longitudinal recess. The second recess is provided with connection means for receiving the end of the conductive wire and for maintaining electrical contact between the conductive wire and the metal clip.

Abstract: A hardware secure element includes a processing unit and a receiver circuit configured to receive data comprising a command field and a parameter field adapted to contain a plurality of parameters. The hardware secure element also includes at least one hardware parameter check module configured to receive at an input a parameter to be processed selected from the plurality of parameters, and to process the parameter to be processed to verify whether the parameter has given characteristics. The hardware parameter check module has associated one or more look-up tables configured to receive at an input the command field and a parameter index identifying the parameter to be processed by the hardware parameter check module, and to determine for the command field and the parameter index a configuration data element.

Abstract: A hardware secure element is described. The hardware secure element includes a microprocessor and a memory, such as a non-volatile memory. The memory stores a plurality of software routines executable by the microprocessor. Each software routine starts at a respective memory start address. The hardware secure element also includes a receiver circuit and a hardware message handler module. The receiver circuit is configured to receive command data that includes a command. The hardware message handler module is configured to determine a software routine to be executed by the microprocessor as a function of the command, and also configured to provide address data to the microprocessor that indicates the software routine to be executed.

Abstract: In some embodiments, a processing system includes at least one hardware block configured to change operation as a function of configuration data, a non-volatile memory including the configuration data for the at least one hardware block, and a configuration module configured to read the configuration data from the non-volatile memory and provide the configuration data read from the non-volatile memory to the at least one hardware block. The configuration module is configured to: receive mode configuration data; read the configuration data from the non-volatile memory; test whether the configuration data contain errors by verifying whether the configuration data are corrupted and/or invalid; and activate a normal operation mode or an error operation mode based on whether the configuration data contain or do not contain errors.

Abstract: This disclosure concerns a metal clip for electrically connecting a conductive wire to a planar metal element, the metal clip having an S-shaped cross-section and being composed of three wings, a first wing and a second wing defining a first longitudinal recess allowing the metal clip to be attached to an edge of the planar metal element, the second wing and the third wing defining a second longitudinal recess. The second recess is provided with connection means for receiving the end of the conductive wire and for maintaining electrical contact between the conductive wire and the metal clip.

Abstract: A semiconductor device, for example an integrated circuit such as a microcontroller (MCU) or a digital signal processor (DSP), includes a semiconductor die coupled with a power supply line, a debug module coupled with the semiconductor die to exchange semiconductor die debug command and data signals with the semiconductor die, and a modem coupled with the power supply line. The debug module is arranged to convey the semiconductor die debug command and data signals over the power supply line.

Abstract: A Voltage regulator includes a first input terminal configured to receive an input supply voltage, includes a second input terminal configured to receive a regulated output supply voltage as a function of the input supply voltage or to receive a test supply voltage and comprises a power transistor including an input terminal configured to receive the input supply voltage and including an output terminal configured to generate the regulated output supply voltage.

Abstract: A Voltage regulator includes a first input terminal configured to receive an input supply voltage, includes a second input terminal configured to receive a regulated output supply voltage as a function of the input supply voltage or to receive a test supply voltage and comprises a power transistor including an input terminal configured to receive the input supply voltage and including an output terminal configured to generate the regulated output supply voltage.

Abstract: Method for analyzing berries, characterized in that: berries are arranged on an analysis plate, an image of the berries is recorded, the image consisting of pixels of at least one component of an elementary color, the contours of the berries are identified, and geometric and/or colorimetric characteristics of the berries are determined. The number of berries can then be determined, or a volume, a surface area, a surface area to volume ratio, and a characteristic concentration for each berry can be determined, in addition to an average, for all of the pixels inside the contour of a defined berry, of the values of a component of an elementary color of a component of interest. A device for implementing the method is also disclosed. The invention especially relates to viticulture and to the analysis of the maturity of the grape.

Abstract: Method for analyzing berries, characterised in that: berries are arranged on an analysis plate, an image of the berries is recorded, the image consisting of pixels of at least one component of an elementary colour, the contours of the berries are identified, and geometric and/or colorimetric characteristics of the berries are determined. The number of berries can then be determined, or a volume, a surface area, a surface area to volume ratio, and a characteristic concentration for each berry can be determined, in addition to an average, for all of the pixels inside the contour of a defined berry, of the values of a component of an elementary colour of a component of interest. A device for implementing the method is also disclosed. The invention especially relates to viticulture and to the analysis of the maturity of the grape.

Abstract: A gliding board, including a gliding surface that terminates in at least one raised end, the end including a peripheral zone and a central zone. The peripheral zone extends from the side of the board toward the central zone the end. This peripheral zone has a thickness, which is less than that of the central zone of the end. The peripheral zone connects to the central zone by a discontinuity that forms an inflexion. The width of the peripheral zone, measured perpendicularly to the side of the board, increases from the beginning of the end to the highest point of the end.

Abstract: A gliding board (1), including a gliding surface (4) that terminates in at least one raised end (2), said end (2) including a peripheral zone (5) and a central zone (6), the peripheral zone (5) extending from the side (9) of the board toward the central zone (6) of said end, this peripheral zone (5) having a thickness (e1) which is less than that (e2) of the central zone (6) of the end and being connecting to the latter by a discontinuity (7) that forms an inflexion, wherein the width (d) of the peripheral zone (5), measured perpendicularly to the side (9) of the board, increases from the beginning of the end as far as the highest point (12) of the end.

Abstract: The invention concerns a machine forming a motor or generator including a stator and a rotor. The rotor is a passive rotor, consisting of two ferromagnetic discs whereof at least one is toothed. The stator includes a fixed polyphase field coil arranged in an air gap defined by the space provided between the two discs and generating a rotating magnetic field, and a field coil likewise fixed. The invention is applicable to a cylindrical rotary machine or to a machine with linear displacement.

Abstract: The invention concerns a machine forming a motor or generator comprising a stator and a rotor, characterised in that the rotor (6) is a passive rotor, consisting of two ferromagnetic discs whereof at least one is toothed, and the stator comprises a fixed polyphase (P1,P2,P3) field coil (13) arranged in an air gap defined by the space (12) provided between the two discs (8,9) and generating a rotating magnetic field, and a field coil (14) likewise fixed. The invention is likewise applicable to a cylindrical rotary machine or to a machine with linear displacement.