Abstract: A variable inductor structure for varying an inductance responsive to a digital tuning signal, comprising: a first inductor; a second, adjustable, inductor; and a digital control mechanism configured to receive the digital tuning signal and to adjust the effective inductance of the second inductor in response to the digital tuning signal; wherein the second inductor is positioned sufficiently close to the first inductor so as to be capable of altering by mutual inductance the effective inductance of the first inductor in dependence on the digital tuning signal.

Abstract: A loop filter for a phase-locked loop that generates an output signal having a predetermined phase relationship with a reference signal, the loop filter being arranged to control a signal generator that forms the output signal in dependence on a phase error between the output signal and the reference signal by outputting a control signal for controlling the signal generator in dependence thereon, the loop filter being arranged to form the control signal to comprise a proportional component representative of an instantaneous magnitude of the phase difference and an integral component representative of an integral of the phase difference, the loop filter comprising a proportional path arranged to receive a signal representative of the instantaneous magnitude of the phase difference and form the proportional component of the control signal in dependence thereon and an integral path arranged to receive a signal representative of the instantaneous magnitude of the phase difference and form the integral component o

Abstract: A loop filter for receiving an input signal indicative of a phase-difference between a reference signal and a signal output by a signal generator and forming a control signal for controlling the signal generator in dependence thereon, the loop filter comprising a plurality of filter components that determine the frequency response of the filter, said filter components being arranged so that a first set of said components determines one or more zeros of the filter's frequency response and a second set of said components determines one or more poles of the filter's frequency response, each of said first and second sets of filter components being independent of the other such that the zero(s) and pole(s) of the filter's frequency response may be selected independently.

Abstract: A charge pump circuit causes a current to flow either into or out of another circuit in dependence on a current output by first and second current paths, each including a current source and a current control device having two switched nodes, and a control node arranged to control a current flow between the first and second switched nodes. The charge pump further includes a capacitive element and a switching arrangement arranged such that, during a first time period, the capacitive element is in communication with a respective one of the current paths, whereby a current output by the first current path causes an electrical charge to be formed on a first capacitive plate and a current output by the second current path causes an electrical charge to be formed on a second capacitive plate, and during a second time period, the electrical charge formed on the first and second capacitive plates during the first time period is discharged to form a current at an output node.

Abstract: A phase-locked loop circuit comprising: an oscillator (20) configured to generate an output signal; an input (25) for receiving a reference clock signal; a delay cell (26) configured to delay the reference clock signal to generate a delayed reference clock signal; a phase comparator (27) configured to generate a quantised signal indicative of the phase difference between the output signal and the delayed reference clock signal, an integrator (28) configured to integrate the quantised signal to form an integrated signal; a first feedback path (22) configured to control the phase and/or frequency of the oscillator in dependence on the integrated signal; and a second feedback path (23) configured to adjust the delay applied by the delay cell (26) in dependence on the integrated signal.

Abstract: A sigma-delta modulator for forming a digital output signal representative of a voltage level of an input signal, the sigma delta modulator having a node arranged to receive a current flow that is representative of the voltage level of the input signal and on whose voltage the digital output signal is dependent, the sigma-delta modulator comprising a plurality of capacitive elements for smoothing the current flow, each capacitive element being connected at one end to the node and at its other end to a respective switch unit and a plurality of switch units, each switch unit being arranged to connect the respective one of the capacitive elements to either a first voltage level or a second voltage level in dependence on the voltage at the node so as to provide feedback that affects the voltage at the node.

Abstract: A phase-locked loop comprising; an oscillator configured to output an oscillating signal in dependence on the control signal at an input of the oscillator; a phase detector and loop filter configured to output a low frequency compensation signal in dependence on the output of the oscillator and a reference signal; a correlator configured to frequency correlate an interferer signal and the low frequency compensation signal, and in dependence on that correlation generate a correlation signal; and an adaptive filter configured to adapt the interferer signal in dependence on the correlation signal to output a high frequency compensation signal; and a summation unit configured to combine the low frequency compensation signal and the high frequency compensation signal to form a control signal to drive the input of the oscillator.

Abstract: A signal generator for generating an output signal with a frequency that is a multiple of a frequency of a reference signal, the signal generator including an oscillator configured to generate the output signal in dependence on the reference signal and a control signal and a control circuit configured to generate the control signal to comprise a series of pulses in which one or more of the pulses is offset in phase relative to the reference signal, the control circuit thereby being capable of controlling the frequency and/or phase of the output signal.

Abstract: An oscillator including a capacitive element and an inductive element for generating an output signal having a predetermined frequency, the capacitive element comprising two or more capacitive arrays, each array having one or more capacitors that are switchably connectable in parallel with the inductive element so as to control the frequency of the output signal, and at least one of those arrays being connected to only part of the inductive element such that, when a capacitor in said one array is connected to that part, the resulting change in the frequency of the output signal is smaller than it would have been if the capacitor had been connected to the whole of the inductive element.

Abstract: A mixer for downconversion of RF signals includes at least one RF transistor (305); at least one switching pair (303) connected to the drain current (301) of the at least one RF transistor (305); and a common mode sensing component (300) configured to detect deviations in the common mode output of the switching pair (303) from a specified output; wherein the deviations modify the current of the at least one switching pair (303).

Abstract: A phase-locked loop arranged to generate an output signal having a first frequency that is a static value times the frequency of a reference signal, the phase-locked loop comprising a signal generator arranged to generate the output signal, a divider arranged to receive the output signal and divide the output signal to form a feedback signal, the divider being arranged to vary the divisor by which the output signal is divided to cause the output signal to have a frequency that is said static value times the frequency of the reference signal, a comparison unit arranged to compare the feedback signal with the reference signal, one or more current generators arranged to output current pulses in dependence on said comparison, a summation unit arranged to receive the current pulses output by the current generator(s) and form a single current pulse therefrom and a loop filter arranged to filter the single current pulse to form a control signal for controlling the signal generator, the phase-locked loop being arrang

Abstract: A filter for filtering a received signal to attenuate an interferer therein, the interferer having a component at an interferer frequency, and the filter comprising: an intermediate filter providing a passband and a stopband; a first frequency converter configured to form a first intermediate signal by frequency-shifting an input signal derived from the received signal such that a component of the input signal at the interferer frequency is shifted to a frequency in the passband of the intermediate filter, and to input the first intermediate signal to the intermediate filter so as to cause the first intermediate signal to be filtered by the intermediate filter to form a second intermediate signal; a second frequency converter configured to form a cancellation signal by frequency-shifting the second intermediate signal such that a component of the second intermediate signal in the passband of the intermediate filter is shifted to the interferer frequency; and a cancellation unit configured to cancel the cancel

Abstract: A signal receiver having a gain control circuit comprising: detection means configured to form a representation of the excess amplitude during a training period of a signal received by the receiver; a first gain stimulus generator configured to generate a first gain stimulus in dependence on the excess amplitude detected by the detection means during the training period; averaging means configured to estimate the average of the signal received by the receiver during the training period; a second gain stimulus generator configured to generate a second gain stimulus in dependence on the average estimated by the averaging means during the training period; and a gain control signal generator configured to generate a gain control signal for the receiver in dependence on the first gain stimulus and the second gain stimulus.

Abstract: An inductor structure comprising: a first loop and a second loop; a first feed line connected to a first end of the first loop and a second feed line connected to a first end of the second loop, each of the first and second feed lines extending through an area circumscribed by one of the first and second loops; and a crossover section adjacent to the first end of the first loop and the first end of the second loop, the crossover section coupling the first loop to the second loop so as to cause current flowing from the first feed line to the second feed line to circulate around the first loop in a first rotational direction and around the second loop in a second rotational direction opposite to the first rotational direction.

Abstract: A charge pump circuit for connection to another circuit via an output node (614) of the charge pump and for causing a current to flow either into or out of the other circuit via the output node in dependence on a current output by first and second current paths (601, 602) in the charge pump, each current path comprising a current source and a current control device having two switched nodes, one switched node being arranged to receive a current from the current source, and a control node arranged to control a current flow between the first and second switched nodes in dependence on a voltage at the control node, the current control devices of the first and second paths being of the same type such that they are responsive to the same polarity of voltage at their control node to be conducting between their switched nodes, the charge pump further comprising a capacitive element (609, 610) having first and second capacitive plates and a switching arrangement (604-606, 611) arranged such that, during a first time

Abstract: A radio transmitter includes a transmitter circuit having a transmission output and being configured to generate at the transmission output a signal for transmission; a reference voltage circuit configured to generate a substantially temperature-invariant reference voltage; a reference signal circuit having a reference output and being configured to receive the substantially temperature-invariant voltage generated by the reference voltage circuit and to generate at the reference output an oscillating reference signal of an amplitude that is derived from the temperature-invariant reference voltage; an amplitude sensor having an input and being configured for sensing the amplitude of a signal at the input and generating a sensed amplitude signal indicative of the sensed amplitude; and control apparatus configured to control the radio transmitter to operate in each of: a) a first mode in which it causes the input of the amplitude sensor to be coupled to the reference output; and b) a second mode in which it caus

Abstract: A phase-locked loop arranged to generate an output signal having a first frequency that is a static value times the frequency of a reference signal, the phase-locked loop comprising a signal generator arranged to generate the output signal, a divider arranged to receive the output signal and divide the output signal to form a feedback signal, the divider being arranged to vary the divisor by which the output signal is divided to cause the output signal to have a frequency that is said static value times the frequency of the reference signal, a comparison unit arranged to compare the feedback signal with the reference signal, one or more current generators arranged to output current pulses in dependence on said comparison, a summation unit arranged to receive the current pulses output by the current generator(s) and form a single current pulse therefrom and a loop filter arranged to filter the single current pulse to form a control signal for controlling the signal generator, the phase-locked loop being arrang

Abstract: A current generator for a phase-locked loop arranged to generate an output signal having predetermined frequency-relationship with a reference signal, the phase-locked loop comprising a signal generator arranged to generate the output signal, a divider arranged to receive the output signal and divide the output signal to form a feedback signal, the divider being arranged to vary the divisor by which the output signal is divided, a comparison unit arranged to compare the feedback signal with the reference signal and output a first error signal indicative of the phase-difference between the feedback signal and the reference signal to the current generator and a loop filter arranged to filter a current signal output by the current generator to form a control signal for controlling the signal generator, the current generator being capable of receiving the first error signal and generating a current in dependence thereon, receiving a second error signal indicative of an error in the feedback signal caused by the v

Abstract: A loop filter for a phase-locked loop that generates an output signal having a predetermined phase relationship with a reference signal, the loop filter being arranged to control a signal generator that forms the output signal in dependence on a phase error between the output signal and the reference signal by outputting a control signal for controlling the signal generator in dependence thereon, the loop filter being arranged to form the control signal to comprise a proportional component representative of an instantaneous magnitude of the phase difference and an integral component representative of an integral of the phase difference, the loop filter comprising a proportional path arranged to receive a signal representative of the instantaneous magnitude of the phase difference and form the proportional component of the control signal in dependence thereon and an integral path arranged to receive a signal representative of the instantaneous magnitude of the phase difference and form the integral component o

Abstract: A phase-locked loop having: an oscillator for forming an oscillating output signal; a frequency divider connected to receive the output of the oscillator and frequency divide it by a value dependent on a division control signal; and a phase comparator for comparing the phase of the divided signal and a reference signal to generate a control signal, the operation of the oscillator being dependent on the control signal; the output data to form a divided signal a division ratio controller configured to, when clocked by an input signal, generate a series of output data for forming the division control signal; the phase-locked loop having: a first mode of operation in which the frequency divider is operable to frequency divide the output of the oscillator by a value dependent on the output of the division ratio controller; and a second mode of operation in which the frequency divider is not operable to frequency divide the output of the oscillator by a value dependent on the output of the division ratio controller