Abstract: A semiconductor device includes: a channel having layers of silicon separated from each other; a metal gate in contact with the layers of silicon; source/drain regions adjacent to the metal gate; a frontside power rail extending through the layers of silicon; a dielectric separating the frontside power rail from the metal gate; a via-connect buried power rail extending through the dielectric and coupling the frontside power rail to the source/drain regions; and a backside power rail coupled to the frontside power rail. The layers of silicon are wrapped on three sides by the metal gate.

Abstract: Embodiments are disclosed for a method. The method includes generating a correction datastore indicating shifts in magnitude representing corresponding characters that uniquely identify hardware comprising a computer processing chip. The method further includes generating security masks based on a correction file. Additionally, the method includes using a correction process for the computer processing chip. The generated security masks include corresponding overlays representing the shifts in magnitude with respect to corresponding product masks for the computer processing chip. The method also includes generating the computer processing chip using the security masks and the product masks.

Abstract: A semiconductor structure includes a source/drain region; a frontside source/drain contact disposed on the source/drain region, a via-to-backside power rail disposed on the frontside source/drain contact and on a portion of the source/drain region, and a backside power rail connected to the via-to-backside power rail.

Abstract: A semiconductor structure is provided that includes a first FET device region including a plurality of first FETs, each first FET of the plurality of first FETs includes a first source/drain region located on each side of a functional gate structure. A second FET device region is stacked above the first FET device region and includes a plurality of second FETs, each second FET of the plurality of second FETs includes a second source/drain region located on each side of a functional gate structure. The structure further includes at least one first front side contact placeholder structure located adjacent to one of the first source/drain regions of at least one the first FETs, and at least one second front side contact placeholder structure located adjacent to at least one of the second source/drain regions of at one of the second FETs.

Abstract: Described is a semiconductor processing system including a measurement tool configured to measure warpage characteristics in a semiconductor wafer. The semiconductor processing system further includes a pixelated surface configured to retain the semiconductor wafer, where the pixelated surface approximates the warpage characteristics to conform to the semiconductor wafer. The semiconductor processing system further includes a semiconductor processing tool configured to perform processing on the semiconductor wafer while it is retained on the pixelated surface.

Abstract: A semiconductor device includes a source/drain having a height, a length, and a width. A full wrap-around contact surrounds a partial length of the source/drain, wherein the full wrap-around contact includes a partial front-side wrap-around contact from a front side of a substrate and a partial back-side wrap-around contact from a back side of the substrate.

Abstract: A semiconductor device includes a first transistor including a first source/drain region, and a second transistor stacked on the first transistor. The second transistor includes a second source/drain region. The semiconductor device further includes a via structure disposed between a power element and the second source/drain region. The via structure includes a first via disposed on the power element, and a second via disposed on the first via, wherein the second via is angled with respect to the first via.

Abstract: A printable-component structure includes a carrier substrate, a bonding layer disposed on the carrier substrate, a solid weak-adhesion layer disposed on at least a portion of the bonding layer, at least a portion of a component disposed directly on and in contact with at least a portion of the weak-adhesion layer, and a release layer disposed in contact with at least a portion of the component. The component is adhered to the weak-adhesion layer with a force that is less than the adhesion between the component and a stamp, such as a PDMS stamp. The component can include a protruding post in sole contact with the weak-adhesion layer.

Abstract: Embodiments disclosed herein include a semiconductor structure. The semiconductor structure may include a first top transistor comprising a first source/drain (S/D) region and a first bottom transistor with a second S/D region. The first bottom transistor may be stacked directly below the first transistor. The semiconductor structure may also include a backside power delivery network (BSPDN) below the bottom transistor, a back-end-of-line (BEOL) metal level above the top transistor, and a first interlevel via electrically connecting a top of the first S/D region to the BSPDN.

Abstract: According to the embodiment of the present invention, a semiconductor device includes a first source/drain and a second source/drain. A first source/drain contact includes a first portion and a second portion. The first portion of the first source/drain contact is located directly atop the first source/drain. The second portion of the first source/drain contact extends vertically past the first source/drain. The first source/drain is in direct contact with three different sides of a first section of the second portion of the first source/drain contact.

Abstract: In some aspects, a server device may obtain information relating to a location of a device that is to be delivered to a physical location associated with a recipient. The server device may transmit, based at least in part on the information indicating that the location of the device is at the physical location of the recipient, a first communication prompting the recipient to indicate whether the recipient is in possession of the device. The server device may receive a second communication indicating whether the recipient is in possession of the device. The server device may transmit a signal to cause a change of an activation state of one or more operations of the device based at least in part on whether the second communication indicates that the recipient is in possession of the device. Numerous other aspects are described.

Abstract: Disclosed are various embodiments for generating relevant notifications of content generated by third party data sources. In some embodiments, a system comprises a computing device and machine readable instructions. The computing device includes a processor and a memory. The machine-readable instructions can be stored in the memory that, when executed by the processor, cause the computing device to receive content from a third party data source based at least in part on a keyword topic. An embedding for the content is generated. The system can classify a portion of the content as associated with the keyword topic. Organizations can be identified from the portions of the content. The system can generate a list from the organizations identified in the content and transmit a notification to a client device regarding the content.

Abstract: Described are techniques for sharing data among a group of mobile devices that are registered to the same user. In some instances, the shared data is sensor data captured by a mobile device or media content being processed by the mobile device. The mobile devices in the group are configured to wirelessly communicate with each other and to share status information. Using the status information, the mobile devices can keep each other updated as to the operational status of each individual mobile device and, in some aspects, the status of a mobile device with respect to the user. The sensor data or media content can be forwarded to a different mobile device in response to a determination made based on the status information. For instance, forwarding can be based on a rule that specifies one or more conditions relating to the status of a mobile device and/or user status.

Abstract: Provided is a semiconductor device. The semiconductor device comprises a transistor comprising a plurality of source/drain epitaxies. The semiconductor device further comprises at least one backside power rail under the transistor. The semiconductor device further comprises a backside inter-layer dielectric (ILD) located between the plurality of source/drain epitaxies and the at least one power rail. The semiconductor device further comprises a first backside contact connecting a first source/drain epitaxy to the at least one backside power rail. The semiconductor device further comprises one or more contact placeholders formed under the other source/drain epitaxies.

Abstract: A pixel with a color-agnostic repair site includes a pixel controller, a first site for a first light emitter electrically connected to the pixel controller with a first wire, a second site for a second light emitter electrically connected to the pixel controller with a second wire different from the first wire, and a repair site for a repair light emitter. A repair wire can independently electrically connect the repair site to the pixel controller. A repair wire can electrically connect the repair site to the first wire or to the second wire with a jumper. The repair site can electrically connect to the first wire or to the second wire. A first repair wire can electrically connect the repair site to the first wire, a second repair wire can electrically connect the repair site to the second wire, and one of these wires can be cut.

Abstract: A method for parallel predictive modelling includes receiving a configuration file associated with a predictive concept at a production layer of a predictive modelling platform, the predictive modelling platform comprising the production layer and a consumption layer connected by a distributed messaging system. The method further includes identifying, by the production layer, a job request based on the configuration file, sending the job request to the consumption layer as one of a plurality of job requests to be passed to a predictive model implemented by a processing container, wherein the predictive model is specified by the configuration file, obtaining, from the processing container, a forecast as an output of the predictive model, sending, by the distributed messaging system, the forecast to the production layer and determining, by the production layer, one or more values of the predictive concept based on the forecast and an operator specified by the configuration file.

Abstract: Embodiments are disclosed for a method. The method includes generating a correction datastore indicating shifts in magnitude representing corresponding characters that uniquely identify hardware comprising a computer processing chip. The method further includes generating security masks based on a correction file. Additionally, the method includes using a correction process for the computer processing chip. The generated security masks include corresponding overlays representing the shifts in magnitude with respect to corresponding product masks for the computer processing chip. The method also includes generating the computer processing chip using the security masks and the product masks.

Abstract: A semiconductor structure and a method for managing semiconductor wafer stress are disclosed. The semiconductor structure includes a semiconductor wafer, a first stress layer disposed on and in contact with a backside of the semiconductor wafer, and a second stress layer on and in contact with the first stress layer. The first stress layer exerts a first stress on the semiconductor wafer and the second layer exerts a second stress on the semiconductor wafer that is opposite the first backside stress. The method includes forming a first stress layer on and in contact with a backside of a semiconductor wafer, and further forming a second stress layer on and in contact with the first stress layer. The first stress layer exerts a first stress on the semiconductor wafer and the second stress layer exerts a second stress on the semiconductor wafer that is opposite to the first stress.

Abstract: In an approach, a processor receives device identification information corresponding to at least one device local to a location of a transaction. A processor receives notification of an infected user. A processor determines that the infected user is associated with the transaction. A processor identifies a second user from the device identification information. A processor sends a notification to the second user.

Abstract: Tunnel junctions for multijunction solar cells are provided. According to an aspect of the invention, a tunnel junction includes a first layer including p-type AlGaAs, a second layer including n-type GaAs, wherein the second layer is a quantum well, and a third layer including n-type AlGaAs or n-type lattice matched AlGaInP. The quantum well can be GaAs or AlxGaAs with x being more than about 40%, and lattice matched GaInAsNSb in the Eg range of from about 0.8 to about 1.4 eV.