Patents by Inventor Nils Endric Schubert

Nils Endric Schubert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Hardware/software co-debugging in a hardware description language
    Patent number: 7240303
    Abstract: Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.
    Type: Grant
    Filed: June 6, 2003
    Date of Patent: July 3, 2007
    Assignee: Synplicity, Inc.
    Inventors: Nils Endric Schubert, Kenneth S. McElvain, John Mark Beardslee, Mario Larouche
  • Hardware-based HDL code coverage and design analysis
    Patent number: 7222315
    Abstract: Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs. Moreover, various embodiments related to HDL code coverage are described.
    Type: Grant
    Filed: February 28, 2003
    Date of Patent: May 22, 2007
    Assignee: Synplicity, Inc.
    Inventors: Nils Endric Schubert, John Mark Beardslee, Gernot Heinrich Koch, Ewald John Detjens
  • Method and system for debugging an electronic system
    Patent number: 7072818
    Abstract: Techniques and systems for debugging an electronic system having instrumentation circuitry included therein are disclosed. The techniques and systems facilitate analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the invention enables the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: July 4, 2006
    Assignee: Synplicity, Inc.
    Inventors: John Mark Beardslee, Nils Endric Schubert, Douglas L. Perry
  • Hardware debugging in a hardware description language
    Patent number: 7069526
    Abstract: Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.
    Type: Grant
    Filed: December 29, 2004
    Date of Patent: June 27, 2006
    Assignee: Synplicity, Inc.
    Inventors: Nils Endric Schubert, John Mark Beardslee, Douglas L. Perry
  • Method and system for debugging an electronic system using instrumentation circuitry and a logic analyzer
    Patent number: 7065481
    Abstract: Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.
    Type: Grant
    Filed: July 31, 2002
    Date of Patent: June 20, 2006
    Assignee: Synplicity, Inc.
    Inventors: Nils Endric Schubert, John Mark Beardslee, Gernot Heinrich Koch, Olaf Poeppe
  • Design instrumentation circuitry
    Patent number: 6931572
    Abstract: Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. In particular, the techniques and systems relate to design instrumentation circuitry that facilitates the analysis, diagnosis and debugging of the hardware designs. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: August 16, 2005
    Assignee: Synplicity, Inc.
    Inventors: Nils Endric Schubert, John Mark Beardslee, Douglas L. Perry
  • Hardware debugging in a hardware description language
    Patent number: 6904577
    Abstract: Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.
    Type: Grant
    Filed: April 2, 2003
    Date of Patent: June 7, 2005
    Assignee: Synplicity, Inc.
    Inventors: Nils Endric Schubert, John Mark Beardslee, Douglas L. Perry
  • Method and user interface for debugging an electronic system
    Patent number: 6823497
    Abstract: Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.
    Type: Grant
    Filed: July 31, 2002
    Date of Patent: November 23, 2004
    Assignee: Synplicity, Inc.
    Inventors: Nils Endric Schubert, John Mark Beardslee, Gernot Heinrich Koch, Olaf Poeppe
  • Hardware-based HDL code coverage and design analysis
    Publication number: 20040025122
    Abstract: Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs. Moreover, various embodiments related to HDL code coverage are described.
    Type: Application
    Filed: February 28, 2003
    Publication date: February 5, 2004
    Inventors: Nils Endric Schubert, John Mark Beardslee, Gernot Heinrich Koch, Ewald John Detjens
  • Hardware debugging in a hardware description language
    Publication number: 20030182642
    Abstract: Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.
    Type: Application
    Filed: April 2, 2003
    Publication date: September 25, 2003
    Inventors: Nils Endric Schubert, John Mark Beardslee, Douglas L. Perry
  • Method and system for providing an electronic system design with enhanced debugging capabilities
    Patent number: 6618839
    Abstract: Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: September 9, 2003
    Assignee: Synplicity, Inc.
    Inventors: John Mark Beardslee, Nils Endric Schubert, Douglas L. Perry
  • Method and user interface for debugging an electronic system
    Publication number: 20030131325
    Abstract: Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.
    Type: Application
    Filed: July 31, 2002
    Publication date: July 10, 2003
    Applicant: Bridges2Silicon, Inc.
    Inventors: Nils Endric Schubert, John Mark Beardslee, Gernot Heinrich Koch, Olaf Poeppe
  • Hardware debugging in a hardware description language
    Patent number: 6581191
    Abstract: Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: June 17, 2003
    Assignee: Synplicity, Inc.
    Inventors: Nils Endric Schubert, John Mark Beardslee, Douglas L. Perry
  • Method and system for debugging an electronic system using instrumentation circuitry and a logic analyzer
    Publication number: 20030069724
    Abstract: Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.
    Type: Application
    Filed: July 31, 2002
    Publication date: April 10, 2003
    Applicant: Bridges2Silicon, Inc.
    Inventors: Nils Endric Schubert, John Mark Beardslee, Gernot Heinrich Koch, Olaf Poeppe