Patents by Inventor Ning Cui
Ning Cui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12222331Abstract: Provided are a system and a method for impact testing and monitoring of a high-energy flexible net. The system includes a vertical impact testing unit, a slope impact testing unit, an impact simulation unit, and an impact monitoring unit. The vertical impact testing unit includes a vertically positioned gravity wall. The slope impact testing unit includes a wall slope positioned perpendicularly to a second side of the gravity wall. A first side of the gravity wall and a slope surface of the wall slope are securely provided with a flexible net, respectively. The impact simulation unit includes an impact assembly and a lifting assembly. The impact monitoring unit is configured to monitor a deformation result and an internal force change result of the flexible net.Type: GrantFiled: September 26, 2024Date of Patent: February 11, 2025Assignees: RAILWAY ENGINEERING RESEARCH INSTITUTE, CHINA ACADEMY OF RAILWAY SCIENCES CO., LTD., CHINA ACADEMY OF RAILWAY SCIENCES CO., LTD.Inventors: Yufang Zhang, Kun Yuan, Xiaobing Li, Yong Yao, Tao Jia, Lining Du, Tao Wei, Wenchao Zhang, Jian Cui, Bo Liu, Jian Li, Yu Cheng, Shengyong Zeng, Shuangquan Lei, Shiwen Huang, Wenxin Tan, Junjie Zeng, Hao Lan, Jiawei Fan, Ning Xuan, Peng Zhang, Gongming Chen, Pan Chen, Fei Xian, Zehua Dong
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Publication number: 20250033031Abstract: The present disclosure provides a copper-magnesium co-doped carbonized wood sponge material, a preparation therefor, and an application thereof, and a method for converting plastics into fuel based on a Fenton-like system. In the present disclosure, a copper-magnesium co-doped carbonized wood sponge catalyst is prepared by high-temperature pyrolysis after a wood raw material is coated with polydopamine (PDA) and a copper element and a magnesium element are loaded on a wood sponge substrate, realizing the loading of a nanoreactor on a wood sponge layered structure, and forming a unique spatial microenvironment and synergistic effect by combining a superior three-dimensional lamellar structure of the wood sponge substrate with the structural advantages of the nanoreactor to promote an electron transfer pathway on a surface.Type: ApplicationFiled: June 24, 2024Publication date: January 30, 2025Inventors: Ning Li, Jingya Ye, Guanyi Chen, Chengzhan Jun, Beibei Yan, Xiaoqiang Cui, Fawei Lin
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Patent number: 11831256Abstract: A short-travel nanoscale motion stage and a method for measuring thermally-related hysteresis data are provided. A stator unit of a left two-pole electromagnet and stator units of two inchworm motors are fixed on a right side surface of a left foundation frame, and an active unit of the left two-pole electromagnet and actives of the two inchworm motors are fixed on a left side surface of a stage moving component. An active unit of a right two-pole electromagnet is fixed on a right side surface of the stage moving component, while a stator unit of the right two-pole electromagnet is fixed on a left side surface of a right foundation frame. The stage moving component is fixedly mounted on a guide sleeve of an aerostatic guideway. Each of the stator units of the left and right two-pole electromagnets has an eddy current sensor and a hall sensor fixed therein.Type: GrantFiled: February 22, 2022Date of Patent: November 28, 2023Assignee: Harbin Institute of TechnologyInventors: Yang Liu, Qian Miao, Ning Cui
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Patent number: 11685877Abstract: A super-lubricity water lubricating additive, a super-lubricity water lubricant, a preparation method and application, wherein the additive is of a hollow spherical shell structure which includes at least one layer of spherical shell; the spherical shell sequentially includes a first polydopamine layer, a nanoparticle layer, a second polydopamine layer and an oxidized graphene layer from inside to outside, or a first polydopamine layer, a nanoparticle layer, a second polydopamine layer, a graphene layer and a third polydopamine layer from inside to outside; and nanoparticles of the nanoparticle layer are nano diamond, nano molybdenum disulfide or nano tungsten disulfide. The additive is prepared into a uniform aqueous solution to obtain the super-lubricity water lubricant. The additive can be easily adsorbed on a dual surface, and the nanoparticles released in a friction process cooperate with spherical oxidized graphene or graphene to form rolling friction so as to reduce frictional abrasion.Type: GrantFiled: July 21, 2020Date of Patent: June 27, 2023Assignee: QINGDAO UNIVERSITY OF TECHNOLOGYInventors: Qinglun Che, Jianjun Zhang, Sen Liang, Ning Cui, Binjiang Lv, Yang Xu, Xinghua Ma
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Publication number: 20220340834Abstract: A super-lubricity water lubricating additive, a super-lubricity water lubricant, a preparation method and application, wherein the additive is of a hollow spherical shell structure which includes at least one layer of spherical shell; the spherical shell sequentially includes a first polydopamine layer, a nanoparticle layer, a second polydopamine layer and an oxidized graphene layer from inside to outside, or a first polydopamine layer, a nanoparticle layer, a second polydopamine layer, a graphene layer and a third polydopamine layer from inside to outside; and nanoparticles of the nanoparticle layer are nano diamond, nano molybdenum disulfide or nano tungsten disulfide. The additive is prepared into a uniform aqueous solution to obtain the super-lubricity water lubricant. The additive can be easily adsorbed on a dual surface, and the nanoparticles released in a friction process cooperate with spherical oxidized graphene or graphene to form rolling friction so as to reduce frictional abrasion.Type: ApplicationFiled: July 21, 2020Publication date: October 27, 2022Applicant: QINGDAO UNIVERSITY OF TECHNOLOGYInventors: Qinglun CHE, Jianjun ZHANG, Sen LIANG, Ning CUI, Binjiang LV, Yang XU, Xinghua MA
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Publication number: 20220271688Abstract: A short-travel nanoscale motion stage and a method for measuring thermally-related hysteresis data are provided. A stator unit of a left two-pole electromagnet and stator units of two inchworm motors are fixed on a right side surface of a left foundation frame, and an active unit of the left two-pole electromagnet and actives of the two inchworm motors are fixed on a left side surface of a stage moving component. An active unit of a right two-pole electromagnet is fixed on a right side surface of the stage moving component, while a stator unit of the right two-pole electromagnet is fixed on a left side surface of a right foundation frame. The stage moving component is fixedly mounted on a guide sleeve of an aerostatic guideway. Each of the stator units of the left and right two-pole electromagnets has an eddy current sensor and a hall sensor fixed therein.Type: ApplicationFiled: February 22, 2022Publication date: August 25, 2022Applicant: Harbin Institute of TechnologyInventors: Yang LIU, Qian MIAO, Ning CUI
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Patent number: 10541287Abstract: The present disclosure provides a display substrate, a manufacturing method thereof, a display panel, and a display device. The display substrate includes: a substrate; and a thin film transistor, provided on a first surface of the substrate and including an electrode and an insulating layer, the insulating layer covering the electrode, wherein a groove is formed on a surface of the insulating layer away from the electrode, and an orthogonal projection of a bottom wall of the groove on the substrate overlaps with an orthogonal projection of the electrode on the substrate. In the display substrate provided by the present disclosure, a surface of the insulating layer covering the electrode away from the substrate is planarized, so that the subsequently formed layer structures may have better flatness, and problems of faulting, fracturing and so on likely occurring when the display substrate is bent may be solved.Type: GrantFiled: July 31, 2018Date of Patent: January 21, 2020Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Ning Cui, Jiazuo Sai, Yanqiu Li, Juan Yu
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Publication number: 20190235747Abstract: An electronic device includes a display screen, a processor, and a memory. The processor detects a sliding touch gesture on the display screen, confirms a corresponding command of the sliding touch gesture according to a start point, an end point, and a sliding distance āSā of the sliding touch gesture, and executes a function of the corresponding command.Type: ApplicationFiled: January 12, 2019Publication date: August 1, 2019Inventor: NING CUI
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Publication number: 20190131366Abstract: The present disclosure provides a display substrate, a manufacturing method thereof, a display panel, and a display device. The display substrate includes: a substrate; and a thin film transistor, provided on a first surface of the substrate and including an electrode and an insulating layer, the insulating layer covering the electrode, wherein a groove is formed on a surface of the insulating layer away from the electrode, and an orthogonal projection of a bottom wall of the groove on the substrate overlaps with an orthogonal projection of the electrode on the substrate. In the display substrate provided by the present disclosure, a surface of the insulating layer covering the electrode away from the substrate is planarized, so that the subsequently formed layer structures may have better flatness, and problems of faulting, fracturing and so on likely occurring when the display substrate is bent may be solved.Type: ApplicationFiled: July 31, 2018Publication date: May 2, 2019Inventors: Ning Cui, Jiazuo Sai, Yanqiu Li, Juan Yu
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Patent number: 9550741Abstract: Disclosed are benzoisothiazole compounds and a use in the preparation of anti-schizophrenia drugs. The benzoisothiazole compounds of the present invention not only have strong affinity for dopamine D3 receptor, 5-HT1A receptor and 5-HT2A receptor, but also can observably improve the symptoms of schizophrenia relevant to apomorphine model and MK-801 model mice, with oral absorption being good, safety being high and side-effect being less, and having developmental value as new anti-neurotic disease drugs. The present invention is the compounds having a structure of general formula (I), or geometric isomers, free alkalies, salts, hydrates or solvates thereof.Type: GrantFiled: May 8, 2014Date of Patent: January 24, 2017Assignee: Shanghai Institute of Pharmaceutical IndustryInventors: Jianqi Li, Xiaowen Chen, Zhilong Ma, Li Zhang, Ning Cui
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Publication number: 20160096811Abstract: Disclosed are benzoisothiazole compounds and a use in the preparation of anti-schizophrenia drugs. The benzoisothiazole compounds of the present invention not only have strong affinity for dopamine D3 receptor, 5-HT1A receptor and 5-HT2A receptor, but also can observably improve the symptoms of schizophrenia relevant to apomorphine model and MK-801 model mice, with oral absorption being good, safety being high and side-effect being less, and having developmental value as new anti-neurotic disease drugs. The present invention is the compounds having a structure of general formula (I), or geometric isomers, free alkalies, salts, hydrates or solvates thereof.Type: ApplicationFiled: May 8, 2014Publication date: April 7, 2016Applicant: SHANAGHAI INSTITUTE OF PHARMACEUTICAL INDUSTRYInventors: Jianqi LI, Xiaowen CHEN, Zhilong MA, Li ZHANG, Ning CUI
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Patent number: 9059268Abstract: A tunneling field effect transistor and a method for fabricating the same are provided. The tunneling field effect transistor comprises: a semiconductor substrate; a channel region formed in the semiconductor substrate, with one or more isolation structures formed in the channel region; a first buried layer and a second buried layer formed in the semiconductor substrate and located at both sides of the channel region respectively, the first buried layer being first type non-heavily-doped, and the second buried layer being second type non-heavily-doped; a source region and a drain region formed in the semiconductor substrate and located on the first buried layer and the second buried layer respectively; and a gate dielectric layer formed on the one or more isolation structures, and a gate formed on the gate dielectric layer.Type: GrantFiled: August 21, 2012Date of Patent: June 16, 2015Assignee: Tsinghua UniversityInventors: Ning Cui, Renrong Liang, Jing Wang, Jun Xu
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Patent number: 8860140Abstract: The present disclosure provides a TFET, which comprises: a substrate; a channel region formed in the substrate, and a source region and a drain region formed on two sides of the channel region; a gate stack formed on the channel region, wherein the gate stack comprises: a gate dielectric layer, and at least a first gate electrode and a second gate electrode distributed in a direction from the source region to the drain region and formed on the gate dielectric layer, and the first gate electrode and the second gate electrode have different work functions; and a first side wall and a second side wall formed on a side of the first gate electrode and on a side of the second gate electrode respectively.Type: GrantFiled: June 24, 2011Date of Patent: October 14, 2014Assignee: Tsinghua UniversityInventors: Renrong Liang, Ning Cui, Jing Wang, Jun Xu
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Patent number: 8853674Abstract: A tunneling field effect transistor structure and a method for forming the same are provided. The tunneling field effect transistor structure comprises: a substrate; a plurality of convex structures formed on the substrate, every two adjacent convex structures being separated by a predetermined cavity less than 30 nm in width, the convex structures comprising a plurality of sets, and each set comprising more than two convex structures; a plurality of floated films formed on tops of the convex structures, each floated film corresponding to one set of convex structures, a region of each floated film corresponding to a top of an intermediate convex structure in each set being formed as a channel region, and regions of the each floated film at both sides of the channel region are formed as a source region and a drain region with opposite conductivity types respectively; and a gate stack formed on each channel region.Type: GrantFiled: August 28, 2012Date of Patent: October 7, 2014Assignee: Tsinghua UniversityInventors: Ning Cui, Renrong Liang, Jing Wang, Jun Xu
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Patent number: 8815690Abstract: The present disclosure provides a tunneling device, which comprises: a substrate; a channel region formed in the substrate, and a source region and a drain region formed on two sides of the channel region; and a gate stack formed on the channel region and a first side wall and a second side wall formed on two sides of the gate stack, wherein the gate stack comprises: a first gate dielectric layer; at least a first gate electrode and a second gate electrode formed on the first gate dielectric layer; a second gate dielectric layer formed between the first gate electrode and the first side wall; and a third gate dielectric layer formed between the second gate electrode and the second side wall.Type: GrantFiled: June 24, 2011Date of Patent: August 26, 2014Assignee: Tsinghua UniversityInventors: Ning Cui, Renrong Liang, Jing Wang, Jun Xu
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Patent number: 8803225Abstract: A tunneling field effect transistor and a method for fabricating the same are provided. The tunneling field effect transistor includes: a semiconductor substrate and a drain layer formed in the semiconductor substrate, in which the drain layer is first type heavily doped; an epitaxial layer formed on the drain layer, with an isolation region formed in the epitaxial layer; a buried layer formed in the epitaxial layer, in which the buried layer is second type lightly doped; a source formed in the buried layer, in which the source is second type heavily doped; a gate dielectric layer formed on the epitaxial layer, and a gate formed on the gate dielectric layer; and a source metal contact layer formed on the source, and a drain metal contact layer formed under the drain layer.Type: GrantFiled: September 6, 2012Date of Patent: August 12, 2014Assignee: Tsinghua UniversityInventors: Ning Cui, Renrong Liang, Jing Wang, Jun Xu
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Patent number: 8653574Abstract: A flash memory and a method for fabricating the same are provided. The flash memory comprises: a semiconductor substrate; a storage medium layer formed on the semiconductor substrate and comprising from bottom to top: a tunneling oxide layer, a silicon nitride layer and a blocking oxide layer; a semiconductor layer formed on the storage medium layer and comprising a channel region and a source region and a drain region located on both sides of the channel region respectively; and a gate stack formed on the channel region and comprising a gate dielectric and a gate formed on the gate dielectric.Type: GrantFiled: May 22, 2012Date of Patent: February 18, 2014Assignee: Tsinghua UniversityInventors: Ning Cui, Renrong Liang, Jing Wang, Jun Xu
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Publication number: 20130207173Abstract: A flash memory and a method for fabricating the same are provided. The flash memory comprises: a semiconductor substrate; a storage medium layer formed on the semiconductor substrate and comprising from bottom to top: a tunneling oxide layer, a silicon nitride layer and a blocking oxide layer; a semiconductor layer formed on the storage medium layer and comprising a channel region and a source region and a drain region located on both sides of the channel region respectively; and a gate stack formed on the channel region and comprising a gate dielectric and a gateformed on the gate dielectric.Type: ApplicationFiled: May 22, 2012Publication date: August 15, 2013Inventors: Ning Cui, Renrong Liang, Jing Wang, Jun Xu
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Publication number: 20130207167Abstract: A tunneling field effect transistor and a method for fabricating the same are provided. The tunneling field effect transistor comprises: a semiconductor substrate; a channel region formed in the semiconductor substrate, with one or more isolation structures formed in the channel region; a first buried layer and a second buried layer formed in the semiconductor substrate and located at both sides of the channel region respectively, the first buried layer being first type non-heavily-doped, and the second buried layer being second type non-heavily-doped; a source region and a drain region formed in the semiconductor substrate and located on the first buried layer and the second buried layer respectively; and a gate dielectric layer formed on the one or more isolation structures, and a gate formed on the gate dielectric layer.Type: ApplicationFiled: August 21, 2012Publication date: August 15, 2013Inventors: Ning Cui, Renrong Liang, Jing Wang, Jun Xu
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Publication number: 20130181185Abstract: A tunneling field effect transistor and a method for fabricating the same are provided. The tunneling field effect transistor comprises: a semiconductor substrate and a drain layer formed in the semiconductor substrate, in which the drain layer is first type heavily doped; an epitaxial layer formed on the drain layer, with an isolation region formed in the epitaxial layer; a buried layer formed in the epitaxial layer, in which the buried layer is second type lightly doped; a source formed in the buried layer, in which the source is second type heavily doped; a gate dielectric layer formed on the epitaxial layer, and a gate formed on the gate dielectric layer; and a source metal contact layer formed on the source, and a drain metal contact layer formed under the drain layer.Type: ApplicationFiled: September 6, 2012Publication date: July 18, 2013Inventors: Ning Cui, Renrong Liang, Jing Wang, Jun Xu