Patents by Inventor Ning Ge

Ning Ge has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240023466
    Abstract: A method for fabricating a forming-free resistive random-access memory (RRAM) device is provided. The method includes: fabricating an RRAM cell and annealing the RRAM cell. The RRAM cell includes: a bottom electrode, a switching oxide layer comprising at least one transition metal oxide; a top electrode, and an interface between the switching oxide layer and the top electrode. In some embodiments, the at least one transition metal oxide includes at least one of HfOx or TaOy, wherein x?2.0, and wherein y?2.5. The interface layer comprises a layer of at least one of Al2O3, MgO, Y2O3, or La2O3. The forming-free RRAM device may be switched to multiple resistance levels without a forming process.
    Type: Application
    Filed: July 15, 2022
    Publication date: January 18, 2024
    Applicant: TetraMem Inc.
    Inventors: Minxian Zhang, Mingche Wu, Ning Ge
  • Publication number: 20230422641
    Abstract: An apparatus including a CMOS-compatible resistive random-access memory (RRAM) devices is provided. The apparatus includes a transistor; one or more first interconnect layers fabricated on the transistor; an RRAM device fabricated on the one or more first interconnect layers; and one or more second interconnect layers fabricated on the RRAM device. The RRAM device includes: a bottom electrode; a switching oxide layer including a transition metal oxide; a top electrode; and one or more interface layer including a material that is more chemically stable than the transition metal oxide. In some embodiments, one or more diffusion barriers and/or adhesion layers are fabricated between the RRAM device and the first interconnect layers and/or between the RRAM device and the second interconnect layers.
    Type: Application
    Filed: June 23, 2022
    Publication date: December 28, 2023
    Applicant: TetraMem Inc.
    Inventors: Minxian Zhang, Mingche Wu, Ning Ge
  • Publication number: 20230413697
    Abstract: The present disclosure relates to resistive random-access memory (RRAM) devices. In some embodiments, an RRAM device includes: a first electrode; a second electrode comprising a first conductive material; and a switching oxide layer positioned between the first electrode and the second electrode. The switching oxide layer includes at least one transition metal oxide. The first electrode includes a metal nitride layer containing a metal nitride and a metal layer fabricated on the metal nitride layer. The metal layer includes a metal that is not reactive to the at least one transition metal oxide. In some embodiments, the metal nitride in the first electrode includes titanium nitride and/or tantalum nitride. The metal layer includes a layer of a noble metal, such as platinum, palladium, iridium, or ruthenium, etc.
    Type: Application
    Filed: February 1, 2023
    Publication date: December 21, 2023
    Applicant: TetraMem Inc.
    Inventors: Minxian Zhang, Mingche Wu, Ning Ge
  • Publication number: 20230410872
    Abstract: Code comparators with nonpolar dynamical switches are provided. An example apparatus comprises: a plurality of row wires; a plurality of column wires; one or more cross-point devices, and a nonpolar volatile two-terminal device formed within a plurality of cross-point devices. Each cross-point device in the plurality of cross-point devices is located at a cross-point between a row in the plurality of row wires and a column in the plurality of column wires; the nonpolar volatile two-terminal device is configured to automatically revert from an ON state to an OFF state, in response to a removal of a bias or signal applied on the nonpolar volatile two-terminal device. The nonpolar volatile two-terminal device is configured to automatically revert from an ON state to an OFF state, in response to a removal of a bias or signal applied on the nonpolar volatile two-terminal device.
    Type: Application
    Filed: September 5, 2023
    Publication date: December 21, 2023
    Applicant: TetraMem Inc.
    Inventor: Ning Ge
  • Patent number: 11849654
    Abstract: Technologies relating to crossbar array circuits with proton-based two-terminal volatile memristive devices are disclosed. An example apparatus includes a first bottom conductive layer, a capacitor oxide layer formed on the first bottom conductive layer, a second bottom conductive layer formed on the capacitor oxide layer, a second oxide layer formed on the second bottom conductive layer, and a proton reservoir layer formed on the second oxide layer. In some embodiments, the second bottom conductive layer is H-doped. In some embodiments, a conductance of the second oxide layer is modulated by H-dopant.
    Type: Grant
    Filed: January 20, 2022
    Date of Patent: December 19, 2023
    Assignee: TETRAMEM INC.
    Inventor: Ning Ge
  • Patent number: 11848726
    Abstract: The present disclosure provides a mode switching method for reducing training overheads in a reconfigurable intelligent surface (RIS)-assisted communication system. The system includes one single-antenna base station, one single-antenna user terminal, and an RIS including N reflection elements, the single-antenna user terminal sends data to the single-antenna base station, however, when a direct link of a user-base station is blocked by a blockage, the data can be sent to the single-antenna base station only via the RIS; the RIS determines a proper reflection solution by using a controller, and dynamically adjusts a phase shift thereof to improve an achievable data rate of the system; and necessary information for phase shift adjustment can be obtained at the base station by uplink training, and transmitted to the RIS controller by using a control link.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: December 19, 2023
    Assignees: NANTONG RESEARCH INST FOR ADV COMM TECH CO., LTD., NANTONG UNIVERSITY
    Inventors: Yongjie Yang, Kai Li, Jing Wang, Shuaifeng Lu, Jue Wang, Qiang Sun, Ning Ge, Yanqiu Zhang
  • Publication number: 20230402496
    Abstract: In accordance with some embodiments of the present disclosure, a memory device is provided. The memory may include a ferroelectric layer including a ferroelectric material interstitially doped with at least one interstitial dopant. The ferroelectric material may include a metal oxide. The interstitial dopant may include an element having an atomic radius that is not greater than an atomic radius of a metal element of the metal oxide. In some embodiments, the metal oxide comprises at least one of hafnium or zirconium. The memory device may be non-volatile. The memory device may be a ferroelectric capacitor (FeCAP), a ferroelectric field-effect transistor (FeFET), a ferroelectric tunneling junction (FTJ), and/or another form of ferroelectric random-access memory (Fe-RAM).
    Type: Application
    Filed: May 26, 2022
    Publication date: December 14, 2023
    Applicant: TetraMem Inc.
    Inventors: Minxian Zhang, Ning Ge
  • Patent number: 11834739
    Abstract: Graphene printing is disclosed. A disclosed example graphene printing apparatus includes a gas source to cause a graphene precursor gas to flow across a surface of a substrate, and a localized heat source to locally heat portions of the surface to cause graphene to grow at the portions of the surface based on a printing pattern.
    Type: Grant
    Filed: June 13, 2018
    Date of Patent: December 5, 2023
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Robert Ionescu, Helen A Holder, Ning Ge, Jarrid Wittkopf
  • Publication number: 20230380189
    Abstract: In accordance with some embodiments of the present disclosure a tunneling-based selector is provided. The selector includes a multilayer barrier structure fabricated between a first electrode and a second electrode. The multilayer barrier structure includes a first layer of a first van der Waals (vdW) material; a second layer of a second vdW material; and a third layer of a third vdW material. The first layer of the first vdW material is fabricated between the second layer of the second vdW material and the third layer of the third vdW material. The electron affinity of the first layer of the first vdW material is lower than the second electron affinity of the second layer of the second vdW material and the electron affinity of the third layer of the vdW material.
    Type: Application
    Filed: May 17, 2022
    Publication date: November 23, 2023
    Applicant: TetraMem Inc.
    Inventors: Minxian Zhang, Ning Ge
  • Publication number: 20230361816
    Abstract: The present disclosure provides a mode switching method for reducing training overheads in a reconfigurable intelligent surface (RIS)-assisted communication system. The system includes one single-antenna base station, one single-antenna user terminal, and an RIS including N reflection elements, the single-antenna user terminal sends data to the single-antenna base station, however, when a direct link of a user-base station is blocked by a blockage, the data can be sent to the single-antenna base station only via the RIS; the RIS determines a proper reflection solution by using a controller, and dynamically adjusts a phase shift thereof to improve an achievable data rate of the system; and necessary information for phase shift adjustment can be obtained at the base station by uplink training, and transmitted to the RIS controller by using a control link.
    Type: Application
    Filed: July 21, 2022
    Publication date: November 9, 2023
    Inventors: YONGJIE YANG, KAI LI, JING WANG, SHUAIFENG LU, JUE WANG, QIANG SUN, NING GE, YANQIU ZHANG
  • Publication number: 20230335190
    Abstract: A crossbar circuit is provided. The crossbar circuit includes one or more bit lines, one or more word lines, one or more cell devices connected between the bit lines and the word lines, one or more analog-to-digital converters (ADCs) connected to the one or more bit lines, one or more digital-to-analog converters (DACs) connected to the one or more word lines, one or more access controls connected to the one or more cell devices and configured to select a cell device in the one or more cell devices and to program the selected cell device, and a slew rate controller connected to the one or more bit lines. The first slew rate controller is configured to receive an input signal or a bias and output a slew-rate controlled signal.
    Type: Application
    Filed: June 16, 2023
    Publication date: October 19, 2023
    Applicant: TetraMem Inc.
    Inventor: Ning Ge
  • Publication number: 20230318177
    Abstract: An electronic device comprises a processing circuit configured to: acquire multiple pieces of channel information, which are obtained via multiple channel measurements, about an equivalent channel between a first communication device and a second communication device, wherein in each channel measurement, the second communication device obtains a piece of channel information on the basis of a received reference signal sent from the first communication device, and a reflection signal sent by an intelligent reflecting surface between the first communication device and the second communication device using a corresponding group of reflection parameters to reflect the reference signal; and by means of performing joint processing on multiple groups of reflection parameters used in the multiple channel measurements and the multiple pieces of acquired channel information, determine channel estimations of multiple integration sub-channels which are capable of representing the equivalent channel together with the refle
    Type: Application
    Filed: September 18, 2021
    Publication date: October 5, 2023
    Applicant: Sony Group Corporation
    Inventors: Zhengyi ZHOU, Zhaocheng WANG, Ning GE, Jianfei CAO
  • Patent number: 11769544
    Abstract: Code comparators with nonpolar dynamical switches are provided. An example apparatus comprises: a plurality of row wires; a plurality of column wires; one or more cross-point devices, and a nonpolar volatile two-terminal device formed within a plurality of cross-point devices. Each cross-point device in the plurality of cross-point devices is located at a cross-point between a row in the plurality of row wires and a column in the plurality of column wires; the nonpolar volatile two-terminal device is configured to automatically revert from an ON state to an OFF state, in response to a removal of a bias or signal applied on the nonpolar volatile two-terminal device. The nonpolar volatile two-terminal device is configured to automatically revert from an ON state to an OFF state, in response to a removal of a bias or signal applied on the nonpolar volatile two-terminal device.
    Type: Grant
    Filed: October 5, 2018
    Date of Patent: September 26, 2023
    Assignee: TetraMem Inc.
    Inventor: Ning Ge
  • Patent number: 11760011
    Abstract: According to an example, an apparatus may include an agent delivery device to selectively deliver an agent onto a layer of build material particles. The apparatus may also include an energy source to apply energy onto the layer of build material particles to selectively fuse the build material particles in the layer based upon the locations at which the agent was delivered and a chamber formed of a plurality of walls, in which the agent delivery device and the energy source are housed inside the chamber. The apparatus may further include a vapor source to supply vapor into the chamber to wet the build material particles inside the chamber.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: September 19, 2023
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Ning Ge, Steven J. Simske, Andrew E. Fitzhugh, Lihua Zhao
  • Publication number: 20230292635
    Abstract: The present disclosure relates to resistive random-access memory (RRAM) devices. A method for fabricating an RRAM device includes: fabricating a first bottom electrode and a second bottom electrode on a substrate; fabricating a first isolation layer on the substrate, the first bottom electrode, and the second bottom electrode; fabricating a via in the first isolation layer to expose a portion of the first bottom electrode; fabricating a switching oxide layer on the first isolation layer and the exposed portion of the first bottom electrode; and fabricating a filament-forming layer by etching a portion of the switching oxide layer that extends beyond the via. The portion of the switching oxide layer does not contact the exposed portion of the first bottom electrode. A top electrode is fabricated on the filament-forming layer. A top metal interconnect may be fabricated on the top electrode and a second isolation layer.
    Type: Application
    Filed: March 11, 2022
    Publication date: September 14, 2023
    Applicant: TetraMem Inc.
    Inventors: Minxian Zhang, Mingche Wu, Ning Ge
  • Patent number: 11735256
    Abstract: Technologies relating to using a slew rate controller to reduce disturbance in a crossbar array circuit are disclosed. An example crossbar array circuit includes: one or more bit lines; one or more word lines; one or more 1T1R cells connected between the bit lines and the word lines; one or more ADCs connected to the one or more bit lines; one or more DACs connected to the one or more word lines; one or more access controls connected to the one or more 1T1R cells and configured to select a 1T1R cell in the one or more 1T1R cells and to program the selected 1T1R cell; and a slew rate controller connected to the DACs, wherein the slew rate controller is configured to receive an input signal. The slew rate controller may be configured to transform a step function input signal into a slew rate input signal.
    Type: Grant
    Filed: September 1, 2019
    Date of Patent: August 22, 2023
    Assignee: TetraMem Inc.
    Inventor: Ning Ge
  • Patent number: 11705196
    Abstract: Aspects of the present disclosure provide a method for calibrating crossbar-based apparatuses. The method includes obtaining output data of a crossbar-based apparatus may include a plurality of cross-point devices with tunable conductance, where the output data of the crossbar-based apparatus represents computing results of at least one operation performed by the crossbar-based apparatus, and where the output data corresponding to a plurality of settings of a plurality of analog components of the crossbar-based apparatus. The method also includes obtaining, by a processing device, one or more calibration parameters based on the output data of the crossbar-based apparatus, where the one or more calibration parameters correspond to one or more errors associated with one or more of the analog components of the crossbar-based apparatus. The method further includes calibrating the crossbar-based apparatus using the one or more calibration parameters.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: July 18, 2023
    Assignee: TetraMem Inc.
    Inventors: Miao Hu, Ning Ge
  • Publication number: 20230217844
    Abstract: Switching oxide engineering technologies relating to low current RRAM-based crossbar array circuits are disclosed. A method for fabricating a crossbar device may include forming a bottom electrode on a substrate, forming a switching oxide stack on the bottom electrode, and forming a top electrode on the switching oxide stack. Fabricating the switching oxide stack may include fabricating a plurality of base oxide layers and a plurality of discontinuous oxide layers alternately stacked, wherein the base oxide layers comprise one or more base oxides, wherein the one or more base oxides comprise at least one of TaOx, HfOx, TiOx, or ZrOx.
    Type: Application
    Filed: March 10, 2023
    Publication date: July 6, 2023
    Applicant: TetraMem Inc.
    Inventors: Minxian Zhang, Ning Ge
  • Publication number: 20230209841
    Abstract: Technologies relating to crossbar array circuits with parallel ground lines are disclosed. An example crossbar array circuit may include a plurality of transistors. The crossbar array circuit may include an RRAM device connected in series with a first transistor and a second transistor; a first bit line connected to the RRAM device; and a grounding line connected to a body terminal of the first transistor. The grounding line is parallel to the first bit line. In some embodiments, the first transistor is an NMOS transistor.
    Type: Application
    Filed: February 17, 2023
    Publication date: June 29, 2023
    Applicant: TetraMem Inc.
    Inventor: Ning Ge
  • Publication number: 20230122160
    Abstract: In accordance with some embodiments of the present disclosure, an apparatus for performing convolution operations is provided. The apparatus includes a first crossbar circuit comprising a first plurality of cross-point devices; a second crossbar circuit comprising a second plurality of cross-point devices; and a word line logic to apply input signals to the first crossbar circuit and the second crossbar circuit. The word line logic is configured to provide input signals representative of input data to be convolved using one or more two-dimensional convolution kernels and one or more depth-wise convolution kernels. The first crossbar circuit is configured to output a first plurality of output signals representative of a convolution of the input data and the two-dimensional convolution kernels. The second crossbar circuit is configured to output a second plurality of output signals representative of a convolution of the input data and the depth-wise convolution kernels.
    Type: Application
    Filed: October 18, 2021
    Publication date: April 20, 2023
    Inventors: Miao Hu, Wenbo Yin, Ning Ge