Patents by Inventor Nisha

Nisha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240347150
    Abstract: Described herein are techniques of using machine learning to automatically extract clinical variable values for subjects from clinical record data. The techniques designate certain clinical variables as hybrid variables that can be assigned values by machine learning model prediction. The techniques process, using a machine learning model trained to predict a value of a hybrid variable, clinical record data associated with a subject to obtain a predicted hybrid variable value and an associated confidence score. The techniques set the value of the hybrid variable for the subject to the predicted hybrid variable value when the model prediction is of sufficiently high confidence.
    Type: Application
    Filed: December 20, 2023
    Publication date: October 17, 2024
    Applicant: Flatiron Health, Inc.
    Inventors: Brett Wittmershaus, Guy Amster, Michael Waskom, Natalie Roher, Nisha Singh, Sharang Phadke, Will Shapiro
  • Publication number: 20240330066
    Abstract: A method and a system for automated performance of capacity allocation, brokerage, placement, and provisioning of compute, network, and storage resources are provided. The method includes: receiving a first data set that relates to resource requirements of a user; retrieving, from a memory, a second data set that relates to resource availability; analyzing the first data set and the second data set in order to determine a proposed allocation of resources and a proposed timing that corresponds to the proposed allocation; and provisioning the resources to the user based on the proposed allocation and the proposed timing. A machine learning model that is trained by using historical resource allocation data may be applied to the first data set and the second data set in order to perform the analysis.
    Type: Application
    Filed: May 17, 2023
    Publication date: October 3, 2024
    Applicant: JPMorgan Chase Bank, N.A.
    Inventors: Jessie RINCON-PAZ, Francine SHEPHARD, Navin NAGARAJAIAH, Tijelino J BRAVO, Louis FLORES, Andres Lucas GARCIA FIORINI, Anmol P MEHTA, Nisha KAW, Rajesh GUNTHA, Shiv GURUSWAMY, Joseph E LEIDEMER
  • Publication number: 20240317835
    Abstract: The present disclosure pertains to compositions comprising anti-VEGF proteins and methods for producing such compositions.
    Type: Application
    Filed: June 4, 2024
    Publication date: September 26, 2024
    Inventors: Andrew Tustian, Ankit Vartak, Thomas Daly, Erica Pyles, Nisha Palackal, Shunhai Wang, Ning Li
  • Patent number: 12088472
    Abstract: The present invention provides a system and method of managing events of temporal data. The method may include receiving, by a receiving module 510, at least one current event related to the temporal data. The method may include identifying, by an identification module 512, at least one predefined feature of interest of the at least one current event. The method may include correlating, by a correlation module 514, the at least one current event with one or more clusters of events based on the at least one predefined feature of interest, in one of a real-time manner and a scheduled manner. Subsequently, the method may include predicting at least one future event in one of a real-time manner and a scheduled manner.
    Type: Grant
    Filed: August 22, 2022
    Date of Patent: September 10, 2024
    Assignee: UST Global (Singapore) Pte. Limited
    Inventors: Manjunath Shantappa Sangashetty, Jyothi Rupa Sugavaneswaran, Nisha Parameswaran Kurur, Ranjith Mohanakumaran Nair
  • Patent number: 12077570
    Abstract: The present disclosure pertains to compositions comprising anti-VEGF proteins.
    Type: Grant
    Filed: March 7, 2023
    Date of Patent: September 3, 2024
    Assignee: Regeneron Pharmaceuticals, Inc.
    Inventors: Andrew Tustian, Ankit Vartak, Thomas Daly, Erica Pyles, Nisha Palackal
  • Patent number: 12081569
    Abstract: In network security systems, graph-based techniques can be used to analyze data collected for a particular security incident, e.g., a command-and-control incident. In example embodiments, data extracted from data records of network activity and/or security alerts is used to generate a multipartite graph in which different entities (e.g., machines, processes, and domains or IP addresses) are represented as different types of nodes and relationships between the entities are represented as edges. The multipartite graph may be clustered, and the clusters be ranked according to some indicator of maliciousness (e.g., the number of associated security alerts or indicators of compromise (IoCs)). An output generated from the highest-ranking cluster(s) may serve, e.g., to identify new IoCs, or flow into mitigating actions taken in response to the incident.
    Type: Grant
    Filed: February 25, 2022
    Date of Patent: September 3, 2024
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Nisha Shahul Hameed, Rishi Dev Jha, Evan John Argyle
  • Publication number: 20240292115
    Abstract: This document describes techniques and apparatuses for automatic white-balance for a camera system. The techniques and apparatuses utilize a precursor image to detect one or more detected faces and determine a tone. The camera system retrieves tonal data based on a group of images determined to contain a same face as the detected face. Based on this tonal data, a difference in white balance is determined based on the difference in tone of the detected face within the precursor image and the associated tonal data. Camera settings are adjusted based on the difference in white balance to enable capture of an image having an improved tone.
    Type: Application
    Filed: October 12, 2021
    Publication date: August 29, 2024
    Inventors: Liang Liang, Anirban Chatterjee, Nisha Masharani, Eric Scott Penner, Isaac William Reynolds
  • Patent number: 12075023
    Abstract: A method and a system for assessing quality of multimedia content are disclosed. In an embodiment, the method may include receiving a multimedia content which may be captured from a media device. The method may further include generating a plurality of frames from the multimedia content, based on an attribute associated with the multimedia content. The method may further include determining, for each frame, a set of parameter quality scores corresponding to a set of quality parameters, and calculating an overall quality score for the multimedia content based on the set of parameter quality scores for each of the plurality of frames associated with the multimedia content.
    Type: Grant
    Filed: December 15, 2021
    Date of Patent: August 27, 2024
    Assignee: L&T TECHNOLOGY SERVICES LIMITED
    Inventors: Sumanth Roshan Raj Manuel, Murugan Ramasamy, Nisha Rai
  • Publication number: 20240278928
    Abstract: A system and method are provided for processing a pilot report (PIREP) for a flight in an aircraft. An audio voice message is received from a pilot, and inputs are received from one or more sensors associated with the aircraft. The audio voice message is converted to a text message, and the text message is parsed into one or more word/phrase snippets, wherein each of the one or more word/phrase snippets comprises one or more words and/or one or more phrases. A PIREP template is populated with the one or more inputs and with a subset of the one or more word/phrase snippets, thereby creating a completed PIREP. The completed PIREP is then transmitted to one or more receiving entities outside the aircraft. A model trained by a machine learning algorithm may be used to determine a severity level and a suggested mitigation plan for the completed PIREP.
    Type: Application
    Filed: February 21, 2023
    Publication date: August 22, 2024
    Applicant: The Boeing Company
    Inventors: Jalja Nisha, Umesh Hosamani, Ganesh Shabadi, Akshay Sankeshwari
  • Patent number: 12064546
    Abstract: Embodiments of negative pressure wound therapy systems, apparatuses, and methods for operating the systems and apparatuses are disclosed. In some embodiments, the apparatus includes a negative pressure source, a connector port, at least one switch, and a controller. The negative pressure source is connected through the connector port to either (i) a wound dressing having a canister configured to store fluid aspirated from the wound or (ii) a wound dressing without a canister between the connector port and the wound dressing. The controller determines, based on a signal received from the at least one switch, whether the canister is positioned in the fluid flow path and adjusts one or more operational parameters of negative pressure wound therapy based on the determination. The switch is activated by the connection of either the canister or canisterless wound dressing to the apparatus.
    Type: Grant
    Filed: July 22, 2022
    Date of Patent: August 20, 2024
    Assignee: Smith & Nephew Asia Pacific Pte. Limited
    Inventors: Ben Alan Askem, Anthony Jonathan Bedford, Kevin Bendele, Ali Khishdoost Borazjani, Nicola Brandolini, Ian Charles Culverhouse, Otteh Edubio, James Maxwell Eelbeck, Matt Ekman, Matthew Keith Fordham, Philip Gowans, Michael James Hayers, Mark Richard Hesketh, James Daniel Homes, Allan Kenneth Frazer Grugeon Hunt, Mark Edward Jones, William Kelbie, Reece Knight, David Mcleod, Nisha Mistry, Samuel John Mortimer, Fatoona Mosa, Matthew Murphy, Michael Paton, Neil Harry Patrick, Louis della-Porta, Felix Clarence Quintanar, Lee Michael Rush, Carl Dean Saxby, Daniel Lee Steward, Catherine Thaddeus, Simon Tyson, David Ronald Upton, William Jacob Ward, Nicholas Warrington, Hannah Bailey Weedon
  • Patent number: 12054533
    Abstract: The present disclosure pertains to methods for producing aflibercept from a host cell cultured in a chemically defined medium (CDM) including purification of aflibercept, wherein aflibercept following purification includes aflibercept variants that have at least one oxidized amino acid residue selected from the group consisting of tryptophan, histidine and a combination thereof.
    Type: Grant
    Filed: July 6, 2022
    Date of Patent: August 6, 2024
    Assignee: Regeneron Pharmaceuticals, Inc.
    Inventors: Andrew Tustian, Ankit Vartak, Thomas Daly, Erica Pyles, Nisha Palackal, Shunhai Wang, Ning Li
  • Publication number: 20240252762
    Abstract: A syringe use monitoring device that can attach to a syringe and detect the type of medication being loaded and measure the force applied to the plunger and thus monitor subsequent delivery of medication and delivery pressure as a substance is being injected, and at least one display and/or alarm can indicate normal and/or abnormal conditions so that feedback can be employed during the injection process is provided.
    Type: Application
    Filed: September 11, 2023
    Publication date: August 1, 2024
    Inventors: Sawhney Nisha, Singh Kumar Shiv
  • Patent number: 12049489
    Abstract: The present disclosure pertains to methods for producing aflibercept from a host cell cultured in a chemically defined medium (CDM) including purification of aflibercept, wherein aflibercept following purification includes aflibercept variants that have at least one oxidized amino acid residue selected from the group consisting of tryptophan, histidine and a combination thereof.
    Type: Grant
    Filed: June 23, 2023
    Date of Patent: July 30, 2024
    Assignee: Regeneron Pharmaceuticals, Inc.
    Inventors: Andrew Tustian, Ankit Vartak, Thomas Daly, Erica Pyles, Nisha Palackal, Shunhai Wang, Ning Li
  • Publication number: 20240249298
    Abstract: In general, the present invention is directed to systems and methods for providing a demand-side energy framework to assist a utility in altering peak load demand, the method including: receiving inputs from a utility; receiving inputs resulting from a disaggregation algorithm being applied to energy usage data of a customer; determining a targeted set appliances and of associated homes or users, from whom changes in energy usage are desired; determining usage patterns of the targeted set of appliances; and determining, using a flag array computation, users and appliances for whom modification of behavior or energy usage may contribute to altering peak load demand.
    Type: Application
    Filed: January 23, 2024
    Publication date: July 25, 2024
    Inventors: NISHA AGARWAL, BASANT KUMAR PANDEY, SAHANA M
  • Publication number: 20240232458
    Abstract: A method for analysing simulation data is disclosed. In some embodiments, the method includes creating a set of data extract files from simulation logs associated with a current simulation run. The method further includes generating a unique signature for each of the set of data extract files. The method further includes creating a signature log file comprising the unique signature generated for each of the set of data extract files. The method further includes generating a consolidated signature for the signature log file. The method further includes comparing the consolidated signature with a prior consolidated signature generated for a prior simulation run. The method further includes determining whether the current simulation run deviates from the prior simulation run, based on the comparison between the consolidated signature and the prior consolidated signature.
    Type: Application
    Filed: January 11, 2023
    Publication date: July 11, 2024
    Inventors: MANICKAM MUTHIAH, KARTHIKEYAN KEELAPANDAL SUNDARAM, NISHA RAVICHANDRAN, RAZI ABDUL RAHIM
  • Publication number: 20240222326
    Abstract: Embodiments of a microelectronic assembly include: a first integrated circuit (IC) die having a first memory circuit and a second memory circuit; a second IC die; a third IC die; and a package substrate. The first IC die is between the second IC die and the package substrate. The first IC die comprises: a first portion comprising a first active region and a first backend region in contact with the first active region; and a second portion comprising a second active region and a second backend region in contact with the second active region. The first memory circuit is in the first portion, the second memory circuit is in the second portion, the first active region comprises transistors that are larger than transistors in the second active region, and the first backend region comprises conductive traces that have a larger pitch than conductive traces in the second backend region.
    Type: Application
    Filed: December 30, 2022
    Publication date: July 4, 2024
    Applicant: Intel Corporation
    Inventors: Sagar Suthram, Wilfred Gomes, Nisha Ananthakrishnan, Kemal Aygun, Ravindranath Vithal Mahajan, Debendra Mallik, Pushkar Sharad Ranade, Abhishek A. Sharma
  • Publication number: 20240222321
    Abstract: Embodiments of a microelectronic assembly include: a first integrated circuit (IC) die having a first memory circuit and a second memory circuit; a second IC die; a third IC die; and a package substrate. The second IC die is between the first IC die and the package substrate. The first IC die includes: a first portion comprising a first active region and a first backend region in contact with the first active region; and a second portion comprising a second active region and a second backend region in contact with the second active region. The first memory circuit is in the first portion, the second memory circuit is in the second portion, the first active region comprises transistors that are larger than transistors in the second active region, and the first backend region comprises conductive traces that have a larger pitch than conductive traces in the second backend region.
    Type: Application
    Filed: December 30, 2022
    Publication date: July 4, 2024
    Applicant: Intel Corporation
    Inventors: Sagar Suthram, Wilfred Gomes, Nisha Ananthakrishnan, Kemal Aygun, Ravindranath Vithal Mahajan, Debendra Mallik, Pushkar Sharad Ranade, Abhishek A. Sharma
  • Publication number: 20240222274
    Abstract: Integrated circuit (IC) dies, microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, an IC die may include a substrate, a front-end-of-line (FEOL) layer over the substrate, where the FEOL layer includes a plurality of transistors, a first back-end-of-line (BEOL) layer comprising first interconnects, a second BEOL layer comprising second interconnects, and a third BEOL layer comprising third interconnects, wherein the first BEOL layer is between the FEOL layer and the second BEOL layer, the second BEOL layer is between the first BEOL layer and the third BEOL layer, and an electrically conductive fill material of the second interconnects is different from an electrically conductive fill material of the first interconnects and from an electrically conductive fill material of the third interconnects.
    Type: Application
    Filed: December 29, 2022
    Publication date: July 4, 2024
    Applicant: Intel Corporation
    Inventors: Praneeth Kumar Akkinepally, Sivakumar Nagarajan, Nisha Ananthakrishnan, Santosh Shaw, Wei Gao
  • Publication number: 20240222328
    Abstract: Embodiments of a microelectronic assembly include: a first integrated circuit (IC) die having a first memory circuit and a second memory circuit, a second IC die; a third IC die; and a package substrate. The first IC die comprises: a first portion comprising a first active region and a first backend region in contact with the first active region; and a second portion comprising a second active region and a second backend region in contact with the second active region. The second portion is surrounded by the first portion in plan view, the first memory circuit is in the first portion, the second memory circuit is in the second portion, the first active region comprises transistors that are larger than transistors in the second active region, and the first backend region comprises conductive traces that have a larger pitch than conductive traces in the second backend region.
    Type: Application
    Filed: December 30, 2022
    Publication date: July 4, 2024
    Applicant: Intel Corporation
    Inventors: Sagar Suthram, Wilfred Gomes, Nisha Ananthakrishnan, Kemal Aygun, Ravindranath Vithal Mahajan, Debendra Mallik, Pushkar Sharad Ranade, Abhishek A. Sharma
  • Publication number: 20240190283
    Abstract: A computer-implemented method and a control device for triggering a high level communication between an electric vehicle and a charging station is provides. The electric vehicle includes a control unit with a first microcontroller and a second microcontroller. The method includes operating only the second microcontroller of the control unit for detecting a wake-up signal coming from a possible connection of the electric vehicle to a charging station and keeping the first microcontroller deactivated. The method also includes connecting the electric vehicle to the charging station, whereby at least one wake-up signal is sent to the control unit. Additionally, the method includes detecting the wake-up signal coming from the connection of the electric vehicle to the charging station with the second microcontroller. The method also includes activating the first microcontroller using the second microcontroller when the wake-up signal is detected.
    Type: Application
    Filed: February 19, 2024
    Publication date: June 13, 2024
    Applicant: Vitesco Technologies GmbH
    Inventors: Balaji Thangam Aiyam Pillai, Nisha Ramakrishnan, Adorian Berta