Patents by Inventor Nitin K. Ingle

Nitin K. Ingle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11515163
    Abstract: Exemplary methods of semiconductor processing may include delivering a carbon-containing precursor and a hydrogen-containing precursor to a processing region of a semiconductor processing chamber. The methods may include generating a plasma of the carbon-containing precursor and the hydrogen-containing precursor within the processing region of the semiconductor processing chamber. The methods may include forming a layer of graphene on a substrate positioned within the processing region of the semiconductor processing chamber. The substrate may be maintained at a temperature below or about 600° C. The methods may include halting flow of the carbon-containing precursor while maintaining the plasma with the hydrogen-containing precursor.
    Type: Grant
    Filed: January 6, 2021
    Date of Patent: November 29, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Jialiang Wang, Susmit Singha Roy, Abhijit Basu Mallick, Nitin K. Ingle
  • Publication number: 20220341042
    Abstract: Embodiments of the present disclosure generally relate to a batch processing chamber that is adapted to simultaneously cure multiple substrates at one time. The batch processing chamber includes multiple processing sub-regions that are each independently temperature controlled. The batch processing chamber may include a first and a second sub-processing region that are each serviced by a substrate transport device external to the batch processing chamber. In addition, a slotted cover mounted on the loading opening of the batch curing chamber reduces the effect of ambient air entering the chamber during loading and unloading.
    Type: Application
    Filed: July 11, 2022
    Publication date: October 27, 2022
    Inventors: Adib KHAN, Shankar VENKATARAMAN, Jay D. PINSON, II, Jang-Gyoo YANG, Nitin K. INGLE, Qiwei LIANG
  • Publication number: 20220223409
    Abstract: Exemplary methods of semiconductor processing may include providing a boron-and-carbon-and-nitrogen-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include generating a capacitively-coupled plasma of the boron-and-carbon-and-nitrogen-containing precursor. The methods may include forming a boron-and-carbon-and-nitrogen-containing layer on the substrate. The boron-and-carbon-and-nitrogen-containing layer may be characterized by a dielectric constant below or about 3.5.
    Type: Application
    Filed: January 8, 2021
    Publication date: July 14, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Zeqing Shen, Bo Qi, Abhijit Basu Mallick, Nitin K. Ingle
  • Publication number: 20220216058
    Abstract: Exemplary methods of semiconductor processing may include delivering a carbon-containing precursor and a hydrogen-containing precursor to a processing region of a semiconductor processing chamber. The methods may include generating a plasma of the carbon-containing precursor and the hydrogen-containing precursor within the processing region of the semiconductor processing chamber. The methods may include forming a layer of graphene on a substrate positioned within the processing region of the semiconductor processing chamber. The substrate may be maintained at a temperature below or about 600° C. The methods may include halting flow of the carbon-containing precursor while maintaining the plasma with the hydrogen-containing precursor.
    Type: Application
    Filed: January 6, 2021
    Publication date: July 7, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Jialiang Wang, Susmit Singha Roy, Abhijit Basu Mallick, Nitin K. Ingle
  • Patent number: 11355354
    Abstract: Exemplary methods of semiconductor processing may include providing a silicon-containing precursor and an oxygen-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include providing a carbon-containing precursor to the processing region of the semiconductor processing chamber. The carbon-containing precursor may be characterized by a carbon-carbon double bond or a carbon-carbon triple bond. The methods may include thermally reacting the silicon-containing precursor, the oxygen-containing precursor, and the carbon-containing precursor at a temperature below about 650° C. The methods may include forming a silicon-and-oxygen-and-carbon-containing layer on the substrate.
    Type: Grant
    Filed: January 25, 2021
    Date of Patent: June 7, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Zeqing Shen, Bo Qi, Abhijit Basu Mallick, Nitin K. Ingle
  • Publication number: 20220130722
    Abstract: A substrate processing method includes creating a mask on a top surface of a workpiece. A first portion of a gap fill material is overlaid by the mask and a second portion of the gap fill material is exposed through an opening in the mask. The method further includes exposing the workpiece to a plasma. The method further includes performing a first etching of the first portion of the gap fill material to create a first cavity while the second portion of the gap fill material remains in place, depositing a first metal-containing substance in the first cavity, performing a second etching of the second portion of the gap fill material to create a second cavity while the first metal-containing substance remains in place, and depositing a second metal-containing substance in the second cavity.
    Type: Application
    Filed: October 19, 2021
    Publication date: April 28, 2022
    Inventors: Suketu Arun PARIKH, Martin Jay SEAMONS, Jingmei LIANG, Shuchi Sunil OJHA, Tom CHOI, Nitin K. INGLE, Sanjay NATARAJAN
  • Publication number: 20220115263
    Abstract: Processing methods may be performed to form an airgap spacer on a semiconductor substrate. The methods may include forming a spacer structure including a first material and a second material different from the first material. The methods may include forming a source/drain structure. The source/drain structure may be offset from the second material of the spacer structure by at least one other material. The methods may also include etching the second material from the spacer structure to form the airgap. The source/drain structure may be unexposed to etchant materials during the etching.
    Type: Application
    Filed: December 22, 2021
    Publication date: April 14, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Ashish Pal, Gaurav Thareja, Sankuei Lin, Ching-Mei Hsu, Nitin K. Ingle, Ajay Bhatnagar, Anchuan Wang
  • Publication number: 20220068640
    Abstract: Examples of the present technology include semiconductor processing methods to form diffusion barriers for germanium in a semiconductor structure. The methods may include forming a semiconductor layer stack from pairs of Si-and-SiGe layers. The Si-and-SiGe layer pairs may be formed by forming a silicon layer, and then forming the germanium barrier layer of the silicon layer. In some embodiments, the germanium-barrier layer may be less than or about 20 ?. A silicon-germanium layer may be formed on the germanium-barrier layer to complete the formation of the Si-and-SiGe layer pair. In some embodiments, the silicon layer may be an amorphous silicon layer, and the SiGe layer may be characterized by greater than or about 5 atom % germanium. Examples of the present technology also include semiconductor structures that include a silicon-germanium layer, a germanium-barrier layer, and a silicon layer.
    Type: Application
    Filed: August 27, 2020
    Publication date: March 3, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Huiyuan Wang, Susmit Singha Roy, Takehito Koshizawa, Bo Qi, Abhijit Basu Mallick, Nitin K. Ingle
  • Patent number: 11211286
    Abstract: Processing methods may be performed to form an airgap spacer on a semiconductor substrate. The methods may include forming a spacer structure including a first material and a second material different from the first material. The methods may include forming a source/drain structure. The source/drain structure may be offset from the second material of the spacer structure by at least one other material. The methods may also include etching the second material from the spacer structure to form the airgap. The source/drain structure may be unexposed to etchant materials during the etching.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: December 28, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Ashish Pal, Gaurav Thareja, Sankuei Lin, Ching-Mei Hsu, Nitin K. Ingle, Ajay Bhatnagar, Anchuan Wang
  • Publication number: 20210351183
    Abstract: Memory devices and methods of manufacturing memory devices are provided. Described are devices and methods where 3D pitch multiplication decouples high aspect ratio etch width from cell width, creating small cell active area pitch to allow for small DRAM die size.
    Type: Application
    Filed: May 4, 2021
    Publication date: November 11, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Nitin K. Ingle, Fredrick Fishburn
  • Patent number: 11101136
    Abstract: Embodiments of the present technology may include a method of etching. The method may include mixing plasma effluents with a gas in a first section of a chamber to form a first mixture. The method may also include flowing the first mixture to a substrate in a second section of the chamber. The first section and the second section may include nickel plated material. The method may further include reacting the first mixture with the substrate to etch a first layer selectively over a second layer. In addition, the method may include forming a second mixture including products from reacting the first mixture with the substrate.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: August 24, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Dongqing Yang, Tien Fak Tan, Peter Hillman, Lala Zhu, Nitin K. Ingle, Dmitry Lubomirsky, Christopher Snedigar, Ming Xia
  • Publication number: 20210254210
    Abstract: Hydrogen free (low-H) silicon dioxide layers are disclosed. Some embodiments provide methods for forming low-H layers using hydrogen-free silicon precursors and hydrogen-free oxygen sources. Some embodiments provide methods for tuning the stress profile of low-H silicon dioxide films. Further, some embodiments of the disclosure provide oxide-nitride stacks which exhibit reduced stack bow after anneal.
    Type: Application
    Filed: February 11, 2021
    Publication date: August 19, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Zeqing Shen, Bo Qi, Abhijit Basu Mallick, Nitin K. Ingle
  • Publication number: 20210249415
    Abstract: Memory devices incorporating bridged word lines are described. The memory devices include a plurality of active regions spaced along a first direction, a second direction and a third direction. A plurality of conductive layers is arranged so that at least one conductive layer is adjacent to at least one side of each of the active regions along the third direction. A conductive bridge extends along the second direction to connect each of the conductive layers to one or more adjacent conductive layer. Some embodiments include an integrated etch stop layer. Methods of forming stacked memory devices are also described.
    Type: Application
    Filed: January 27, 2021
    Publication date: August 12, 2021
    Applicant: Applied Materials, Inc.
    Inventors: CHANG SEOK KANG, Tomohiko Kitajima, Nitin K. Ingle, Sung-Kwan Kang
  • Patent number: 11004689
    Abstract: Exemplary methods for selectively removing silicon (e.g. polysilicon) from a patterned substrate may include flowing a fluorine-containing precursor into a substrate processing chamber to form plasma effluents. The plasma effluents may remove silicon (e.g. polysilicon, amorphous silicon or single crystal silicon) at significantly higher etch rates compared to exposed silicon oxide, silicon nitride or other dielectrics on the substrate. The methods rely on the temperature of the substrate in combination with some conductivity of the surface to catalyze the etch reaction rather than relying on a gas phase source of energy such as a plasma.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: May 11, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Zihui Li, Rui Cheng, Anchuan Wang, Nitin K. Ingle, Abhijit Basu Mallick
  • Patent number: 10886137
    Abstract: Exemplary methods for selective etching of semiconductor materials may include flowing a fluorine-containing precursor into a processing region of a semiconductor processing chamber. The methods may also include flowing a silicon-containing suppressant into the processing region of the semiconductor processing chamber. The methods may further include contacting a substrate with the fluorine-containing precursor and the silicon-containing suppressant. The substrate may include an exposed region of silicon nitride and an exposed region of silicon oxide. The methods may also include selectively etching the exposed region of silicon nitride to the exposed region of silicon oxide.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: January 5, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Prerna Sonthalia Goradia, Yogita Pareek, Geetika Bajaj, Robert Jan Visser, Nitin K. Ingle
  • Patent number: 10796922
    Abstract: In an embodiment, a plasma source includes a first electrode, configured for transfer of one or more plasma source gases through first perforations therein; an insulator, disposed in contact with the first electrode about a periphery of the first electrode; and a second electrode, disposed with a periphery of the second electrode against the insulator such that the first and second electrodes and the insulator define a plasma generation cavity. The second electrode is configured for movement of plasma products from the plasma generation cavity therethrough toward a process chamber. A power supply provides electrical power across the first and second electrodes to ignite a plasma with the one or more plasma source gases in the plasma generation cavity to produce the plasma products. One of the first electrode, the second electrode and the insulator includes a port that provides an optical signal from the plasma.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: October 6, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Soonam Park, Yufei Zhu, Edwin C. Suarez, Nitin K. Ingle, Dmitry Lubomirsky, Jiayin Huang
  • Patent number: 10727080
    Abstract: Methods are described herein for etching tantalum-containing films with various potential additives while still retaining other desirable patterned substrate portions. The methods include exposing a tantalum-containing film to a chlorine-containing precursor (e.g. Cl2) with a concurrent plasma. The plasma-excited chlorine-containing precursor selectively etches the tantalum-containing film and other industrially-desirable additives. Chlorine is then removed from the substrate processing region. A hydrogen-containing precursor (e.g. H2) is delivered to the substrate processing region (also with plasma excitation) to produce a relatively even and residue-free tantalum-containing surface. The methods presented remove tantalum while retaining materials elsewhere on the patterned substrate.
    Type: Grant
    Filed: May 7, 2018
    Date of Patent: July 28, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Xikun Wang, Naomi Yoshida, Soumendra N. Barman, Nitin K. Ingle
  • Patent number: 10707061
    Abstract: A method of conditioning internal surfaces of a plasma source includes flowing first source gases into a plasma generation cavity of the plasma source that is enclosed at least in part by the internal surfaces. Upon transmitting power into the plasma generation cavity, the first source gases ignite to form a first plasma, producing first plasma products, portions of which adhere to the internal surfaces. The method further includes flowing the first plasma products out of the plasma generation cavity toward a process chamber where a workpiece is processed by the first plasma products, flowing second source gases into the plasma generation cavity. Upon transmitting power into the plasma generation cavity, the second source gases ignite to form a second plasma, producing second plasma products that at least partially remove the portions of the first plasma products from the internal surfaces.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: July 7, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Soonam Park, Yufei Zhu, Edwin C. Suarez, Nitin K. Ingle, Dmitry Lubomirsky, Jiayin Huang
  • Patent number: 10699953
    Abstract: Apparatuses and methods to provide a fully self-aligned via are described. Some embodiments of the disclosure provide an electronic device having a liner that is selectively removable when compared to conductive lines. The liner may be selectively removed by utilizing one or more of a base (e.g. sodium hydroxide) and hydrogen peroxide.
    Type: Grant
    Filed: May 29, 2019
    Date of Patent: June 30, 2020
    Assignee: Micromaterials LLC
    Inventors: Amrita B. Mullick, Nitin K. Ingle, Xikun Wang, Regina Freed, Uday Mitra, Ho-yung David Hwang
  • Patent number: 10692880
    Abstract: Embodiments of the present disclosure provide methods for forming features in a film stack. The film stack may be utilized to form stair-like structures with accurate profiles control in manufacturing three dimensional (3D) stacking of semiconductor chips. In one example, a method includes exposing a substrate having a multi-material layer formed thereon to radicals of a remote plasma to form one or more features through the multi-material layer, the one or more features exposing a portion of a top surface of the substrate, and the multi-material layer comprising alternating layers of a first layer and a second layer, wherein the remote plasma is formed from an etching gas mixture comprising a fluorine-containing chemistry, and wherein the process chamber is maintained at a pressure of about 2 Torr to about 20 Torr and a temperature of about ?100° C. to about 100° C.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: June 23, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Zhenjiang Cui, Hanshen Zhang, Anchuan Wang, Zhijun Chen, Nitin K. Ingle