Patents by Inventor Nitin Kasturi

Nitin Kasturi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040166884
    Abstract: The reliability of transmit power control (TPC) commands received from a transmitter is determined based on a TPC target value. The TPC target value is derived based on a TPC threshold and possibly a weight, depending on the receiver implementation. A received TPC command is considered reliable if its absolute value exceeds the TPC target value. Received TPC commands deemed as unreliable are discarded and not used for power control. Multiple TPC target values, used for detecting UP and DOWN commands, may be derived with multiple scaling factors. For a receiver in soft handover and receiving TPC commands from multiple transmitters, a different TPC target value may be derived for each transmitter. The received TPC commands for each transmitter are compared against that transmitter's TPC target value. Received TPC commands deemed as unreliable are discarded and not combined.
    Type: Application
    Filed: June 10, 2003
    Publication date: August 26, 2004
    Inventors: Hyukjun Oh, Parvathanathan Subrahmanya, Nitin Kasturi, Messay Amerga, Chih-Ping Hsu, Christopher C. Riddle, Andrew Sendonaris
  • Publication number: 20040137860
    Abstract: Techniques to quickly adjust an SIR target toward a final value needed to achieve a specified target BLER for a data transmission. The outer loop may be implemented with multiple modes. The SIR target may be maintained fixed in a hold mode, adjusted in large down steps to speed up convergence in an acquisition mode, and adjusted by a small down step and a large up step for good and erased blocks, respectively, in a tracking mode. Various schemes may be used to adjust the SIR target by larger down steps in the acquisition mode. These schemes may be used even if data is transmitted intermittently, the target BLER is set to a low value, and/or one or multiple transport channels are used for data transmission. The SIR target may be boosted by a particular amount upon transitioning from the acquisition mode to the tracking mode.
    Type: Application
    Filed: March 12, 2003
    Publication date: July 15, 2004
    Inventors: Hyukjun Oh, Luca Blessent, Chih-Ping Hsu, Da-Shan Shiu, Nitin Kasturi, Parvathanathan Subrahmanya
  • Publication number: 20040102205
    Abstract: Various embodiments are provided for determining a set of acceptable transport format combinations for transmission on a current time frame. A set of acceptable modified rate power adjustment values is determined based on a maximum power level, an accumulated power commands and an initial power control command. A set of acceptable channel gain factors is determined based on the set of acceptable modified rate power adjustments values, and the set of acceptable transport format combinations is determined based on the set of acceptable channel gain factors. A possible set of modified rate power adjustment values is associated to a set of channel gain factors for determining the set of acceptable channel gain factors based on various design of a transmitter chain used for transmission of data from the mobile station.
    Type: Application
    Filed: November 26, 2002
    Publication date: May 27, 2004
    Inventors: Yi Zhang, Nitin Kasturi, Alkinoos Hector Vayanos, Subramanya P.N. Rao
  • Publication number: 20040043744
    Abstract: An apparatus for coarse compensation of a direct current (DC) offset in a direct to baseband receiver architecture utilizes a serial analog to digital converter (ADC), such as a Delta-Sigma converter, to convert the received signal to digital form. The output of the ADC is sampled for a predetermined number of samples and a counter coupled to the ADC is incremented each time the sample generated by the ADC is a logic one. The counter is not incremented if the sample from the ADC is a logic zero. After the predetermined number of samples is obtained, the counter value is indicative of the DC offset in the received signal. The counter value may be converted by a code converter to a correction value for easy operation of a digital to analog converter (DAC). If the number of samples from the ADC is a power of two, the code converted may be readily implemented by simply inverting the most significant bit (MSB) from the counter to thereby generate a twos complement version of the counter value.
    Type: Application
    Filed: August 29, 2002
    Publication date: March 4, 2004
    Inventors: Nikolai Schlegel, Christian Holenstein, Daniel Filipovic, Nitin Kasturi
  • Publication number: 20030148769
    Abstract: Techniques for power control that avoids outer loop wind-up are disclosed. In one aspect, wind-up of a target power level is detected, and the target power level is modified in response. In another aspect, unwinding of the target power level is detected, after which the target power level is determined without considering wind-up. Various other aspects are also presented, including wind-up and unwinding detection procedures, and target power level modification procedures. These aspects have the benefit of reducing the time that transmit power exceeds that which is necessary, thus increasing system capacity and performance, and mitigating misallocation of system resources.
    Type: Application
    Filed: February 4, 2002
    Publication date: August 7, 2003
    Inventors: Richard Chi, Da-Shan Shiu, Nitin Kasturi, Parvathanathan Subrahmanya
  • Patent number: 6600792
    Abstract: A predistortion technique for high power amplifiers includes an adaptive predistortion algorithm that operates independently of data samples to write a set of complex gain values, or predistortion parameters, to a lookup table. The algorithm may be processor-driven. The gain values are taken from the lookup table and multiplied by a complex digital baseband waveform. The gain values may first be subjected to interpolation. The downconverted output of the amplifier is measured to gauge the efficacy of the predistortion. Based on the effect of the predistortion upon the ratio of in-band power to out-of-band power, decisions are made on the set of predistortion parameters for the next iteration of the algorithm. The algorithm runs continuously, perturbing parameters and adapting the predistortion functions accordingly in an effort to continually reflect instantaneous amplitude-modulation and phase-modulation relationships that may change over time with temperature variation or component aging.
    Type: Grant
    Filed: June 26, 1998
    Date of Patent: July 29, 2003
    Assignee: Qualcomm Incorporated
    Inventors: Franklin P. Antonio, Walid Hamdy, Nitin Kasturi, Christopher C. Riddle, David P. Oses
  • Publication number: 20030031158
    Abstract: Techniques for efficient W-CDMA modulation are disclosed. In one aspect, a multiplexing/coding chain for use in modulation such as that defined by the W-CDMA specification is disclosed. In another aspect, transport blocks are processed and concatenated, utilizing memory efficiently. This aspect has the further benefit of preparing transport channels for efficient subsequent processing. It also allows for ease of interface with the transport channel source. In another aspect, the use of repeated channel coding is used in lieu of an interleaver memory to provide channel coding and interleaving. These aspects, collectively, yield the advanced benefits of a system, such as W-CDMA, in a hardware efficient manner. The techniques described herein apply equally to both access points and access terminals. The techniques are not limited to W-CDMA systems; they are quite suitable to other systems requiring the various benefits the invention offers. Various other aspects of the invention are also presented.
    Type: Application
    Filed: May 31, 2001
    Publication date: February 13, 2003
    Inventors: Nitin Kasturi, Rajat Rajinderkumar Dhawan, Daisuke Terasawa, Avneesh Agrawal, Arak Sutivong
  • Publication number: 20020101937
    Abstract: A predistortion technique for high power amplifiers includes an adaptive predistortion algorithm that operates independently of data samples to write a set of complex gain values, or predistortion parameters, to a lookup table. The algorithm may be processor-driven. The gain values are taken from the lookup table and multiplied by a complex digital baseband waveform. The gain values may first be subjected to interpolation. The downconverted output of the amplifier is measured to gauge the efficacy of the predistortion. Based on the effect of the predistortion upon the ratio of in-band power to out-of-band power, decisions are made on the set of predistortion parameters for the next iteration of the algorithm. The algorithm runs continuously, perturbing parameters and adapting the predistortion functions accordingly in an effort to continually reflect instantaneous amplitude-modulation and phase-modulation relationships that may change over time with temperature variation or component aging.
    Type: Application
    Filed: June 26, 1998
    Publication date: August 1, 2002
    Inventors: FRANKLIN P. ANTONIO, WALID HAMDY, NITIN KASTURI, CHRISTOPHER RIDDLE, DAVID PUIG OSES