Abstract: A system and associated methods provide solutions for reducing a volume of traffic through a multicast network attributed to repeated maintenance messages, which are required in order to maintain a multicast connection. The system configures provider edge devices to generate and send maintenance messages on behalf of members of a multicast group to establish and maintain the multicast connection and provides options for determining unknown locations of sources and/or subscribers, thereby reducing the overall volume of traffic transmitted over the multicast network.

Abstract: The current document is directed to an infrastructure-as-code (“IaC”) cloud-infrastructure-management service or system that automatically generates parameterized cloud-infrastructure templates that represent cloud-based infrastructure, including virtual networks, virtual machines, load balancers, and connection topologies. The IaC cloud-infrastructure manager automatically transforms cloud-infrastructure-specification-and-configuration files into a set of parameterized cloud-infrastructure-specification-and-configuration files and a parameters file that together comprise a parameterized cloud-infrastructure template.

Abstract: Methods and apparatuses directed to memory fault detection mechanisms within die architectures. In some examples, a die package includes decoder logic that receives multiple data words, and a first error correcting code for each of the data words. The decoder logic generates, for each of the data words, a second error correcting code based on a corresponding one of the data words. Further, the decoder logic generates, for each of the data words, an error status based on the first error correcting code and the second error correcting code that corresponds to each of the data words. The die package also includes error generation logic that receives the error status for the data words from the decoder logic, and generates error data based on a combination of the error statuses for the data words. The error generation logic can store the error data in a memory device.

Abstract: An IC device may include a CMOS layer and memory layers at the frontside and backside of the CMOS layer. The CMOS layer may include one or more logic circuits with MOSFET transistors. The CMOS layer may also include memory cells, e.g., SRAM cells. A memory layer may include one or more memory arrays. A memory array may include memory cells (e.g., DRAM cells), bit lines, and word lines. A logic circuit in the CMOS layer may control access to the memory cells. A memory layer may be bonded with the CMOS layer through a bonding layer that includes conductive structures coupled to a logic circuit in the CMOS layer or to bit lines or word lines in the memory layer. An additional conductive structure may be at the backside of a MOSFET transistor in the CMOS layer and coupled to a conductive structure in the bonding layer.

Abstract: Disclosed is a storage system comprising: receiving a first data segment and first metadata associated with the first data segment to be stored in the storage system; storing the first data segment and the first metadata in a persistent storage device of the storage system; compressing the first data segment using a predetermined compression algorithm to generate a first compressed data segment; and storing the first metadata and the first compressed data segment in a solid state drive (SSD) cache device of the storage system, including aligning the first metadata and the first compressed data segment to a page boundary of the SSD device to reduce a number of input and output (IO) operations required for accessing the first metadata and the first compressed data segment from the SSD cache device.

Abstract: A computer-based method and system for synthesizing a Network-on-Chip (NoC) is provided. One method includes determining physical data, device data, bridge data, traffic data and domain data based on an input specification for the NoC; assigning a domain to each bridge port; partitioning each traffic flow into one of a plurality of bins based on the bridge port domain assignments and the domain crossing constraints; creating a virtual node at each bridge port endpoint; generating a candidate topology for each bin based on the physical data, the device data, the bridge data, the traffic data, the domain data and the virtual nodes, each candidate topology including bridge ports, a tree of routers, routes and connections; and generating a final topology by merging the candidate topologies.

Abstract: Methods and apparatus configured to obtain a decision-point value, and send, for a logical channel group (LCG) having a quantity of data pending an uplink transmission, a long buffer status report in response to the decision-point value exceeding a threshold value, or a short buffer status report in response to the decision-point value being equal to or less than the threshold value are disclosed. The decision-point value may be a buffer status report-type determinative value, which may be based on a peak power envelope of a wireless communication device, a data transmission rate historically obtained by the wireless communication device, a number of component carriers available for a complete upload of a buffer holding data, a cost function, an amount of data associated with the LCG that is pending the uplink transmission, a type of the wireless communication device, or a latency of communications of the wireless communication device.

Abstract: A memory array includes a plurality of bit-cells arranged as a set of rows of bit-cells intersecting a plurality of columns. The memory array also includes a plurality of in-memory-compute (IMC) cells arranged as a set of rows of IMC cells intersecting the plurality of columns of the memory array. Each of the IMC cells of the memory array includes a first bit-cell having a latch, a write-bit line and a complementary write-bit line, and a second bit-cell having a latch, a write-bit line and a complementary write-bit line, wherein the write-bit line of the first bit-cell is coupled to the complementary write-bit line of the second bit-cell and the complementary write-bit line of the first bit-cell is coupled to the write-bit line of the second bit-cell.

Abstract: A system and associated methods provide solutions for reducing a volume of traffic through a multicast network attributed to repeated maintenance messages, which are required in order to maintain a multicast connection. The system configures provider edge devices to generate and send maintenance messages on behalf of members of a multicast group to establish and maintain the multicast connection and provides options for determining unknown locations of sources and/or subscribers, thereby reducing the overall volume of traffic transmitted over the multicast network.

Abstract: Systems and methods for monitoring a plurality of assets using a plurality of location tags are provided. The plurality of assets includes a conveyor system and at least one other asset. At least a subset of the location tags is positioned at a fixed position along the conveyor system, and at least one location tag is positioned at the at least one other asset. Each location tag includes at least one environmental sensor and a communication interface. The communication interface is configured to transmit a sensor signal to a network system and at least one information signal to a mobile receiver. The mobile receiver moves with respect to the conveyor system such that the distance between the mobile receiver and the subset of the location tags continuously changes, and a position of the mobile receiver is determined based on a signal strength of the information signal.

Abstract: The memory array of a memory includes sub-arrays with memory cells arranged in a row-column matrix where each row includes a word line and each sub-array column includes a local bit line. A row decoder circuit supports two modes of memory circuit operation: a first mode where only one word line in the memory array is actuated during a memory read and a second mode where one word line per sub-array are simultaneously actuated during the memory read. An input/output circuit for each column includes inputs to the local bit lines of the sub-arrays, a column data output coupled to the bit line inputs, and a sub-array data output coupled to each bit line input. Both BIST and ATPG testing of the input/output circuit are supported. For BIST testing, multiple data paths between the bit line inputs and the column data output are selectively controlled to provide complete circuit testing.

Abstract: A circuit includes a memory array with SRAM cells connected in rows by word lines and in columns by bit lines. A row controller circuit simultaneously actuates, through a word line driver circuit for each row, word lines in parallel for an in-memory compute operation. A column processing circuit processes analog voltages developed on the bit lines in response to the simultaneous actuation to generate a decision output for the in-memory compute operation. A bit line clamping circuit includes a sensing circuit that compares the analog voltages on a given pair of bit lines to a threshold voltage. A voltage clamp circuit is actuated in response to the comparison to preclude the analog voltages on the given pair of bit lines from decreasing below a clamping voltage level.

Abstract: Methods and systems are disclosed for implementing a cellular network readiness check between a mobile originator and a mobile terminator for connecting calls and messages. A network communicates push notifications to a device and receives indications of a readiness of that device to participate in a testing scenario. Additionally, within the testing scenario, push notifications are used to communicate expectations of a test communication session to a mobile terminating device and to determine if test outcomes matched expectations.

Abstract: Systems, apparatuses, and methods for analyzing log data are described. A processing unit ingests data blocks multiple data sources associated with a network-connected device. Each data block is associated with contextual meta tags identified from the ingested data. Further, one or more entities associated with the network-connected device are identified and for each entity a taxonomy is created. The taxonomy comprises a plurality of categories, each category comprising at least one contextual meta tag. Dashboards for presentation of processed log data are generated based at least in part on the taxonomy.

Abstract: A system for interaction pattern recognition receives an input primary interaction and accesses clusters indicating interaction group patterns. Each cluster includes a respective primary interaction and secondary interactions linked to that primary interaction. Each cluster is identified by a respective non-fungible token.

Abstract: A wireless device may transmit, using a first SIM associated with a first radio, a first attach request to a network node and transmit, using a second SIM associated with a second radio, a second attach request to the network node. Additionally, the wireless device may receive, operating in a multiple-subscriber identity module (MSIM) mode, an attach reject message including an attach reject cause code from the network node. The wireless device may transition, based at least in part on reception of the attach reject message, the second SIM to a limited service camped state, disable one of the first radio or second radio, transition to a single-SIM mode, and communicate with the network node via the first SIM.

Abstract: A microfluidic impedance cytometry apparatus, for position determination and impedance measurement of particle/s in a fluid carrying particles, comprising: a microfluidic impedance flow channel for allowing flow of said fluid; an upstream section; a downstream section; a sensing region to receive said channeled fluid, to sense one or more parameters of said fluid, said sensing region comprising one or more sets of pairs of electrodes, each pair forming a current path from an operative top to an operative bottom, each of said pairs being formed by an operative top electrode and an operative bottom electrode, electric potential being applied on said operative top electrode/s, each electrode for a particular pair being parallel-aligned and being symmetric, with respect to each other, same positive electric potential being applied on each of said top electrodes and each of said bottom electrodes is virtually grounded, for a pair; and a configuration of amplifiers.

Abstract: A method for seamless video capture during flex-state transition in a foldable device includes identifying, by one or more sensors of the foldable device, an initiation of a flex movement of the foldable device based on a plurality of frames of a video being captured by a source camera from among one or more cameras of the foldable device; extracting, based on the identifying of the initiation of the flex movement, a semantic scene from the plurality of frames to determine one or more regions of interest (ROIs) in the semantic scene; determining an optical flow for each of the one or more ROIs; determining a flex trajectory of the foldable device; determining a target camera from among the one or more cameras; determining a transition period to switch to the target camera; and switching capturing of the plurality of frames from the source camera to the target camera.

Abstract: A low power crystal oscillator circuit having a high power part and a low power part. Oscillation is initialized using the high power part. Once the crystal is under stable oscillation, the circuit switches to the low power part and continue operation for a long duration.

Abstract: A system for communicating and managing messaging between a source system and a destination system including a publisher module, a topic module that receives the message from the publisher module and including one or more subscription modules, a queue module that receives the message from the topic module, a success queue module, an error queue module, and a subscriber module that receives the message from the queue module, then decompresses, decrypts, calculates the check sum, then prepares the message for transmission to the destination system and transmits the message to the destination system.