Abstract: An information processing system includes an information processor for transmitting image data to an image processor together with device information, and plural image processors for performing, according to the device information, processes to the transmitted image data. The information processor comprises a setter to set the device information and command information, and a transmitter to transmit data including the device and command information to the image processor. The image processor comprises a device information memory, a device information setter to set the device information to the memory, and a selector to, according to the transmitted device information, set the device information according to the command information to the memory, change the command information, and select whether to transmit the data including the changed command information to the next image processor or transmit the transmitted data to the next image processor as it is.

Abstract: In order to realize both the security and convenience upon using the image forming apparatus, whether or not to store an operation history is selected for each operation mode. A desired one of a plurality of operation modes is designated. When the designated operation mode is selected to store the operation mode, the operation history is stored in accordance with the operation of the operation mode.

Abstract: In order to realize both the security and convenience upon using the image forming apparatus, whether or not to store an operation history is selected for each operation mode. A desired one of a plurality of operation modes is designated. When the designated operation mode is selected to store the operation mode, the operation history is stored in accordance with the operation of the operation mode.

Abstract: A P bus from a CPU, an MC bus from a system memory, an IO bus to which an input/output device has been connected, and a G bus for transferring image data of a scanner/printer controller are connected to a system bus bridge (SBB). The SBB connects any of the P bus, G bus and IO bus as a master and any of the MC bus and IO bus as a slave in dependence upon a request from a master. At this time the P bus and IO bus can be connected in parallel with the G bus and MC bus. As a result, access to the memory by the scanner/printer controller can be carried out in parallel with use of the input/output device by the CPU. This makes it possible to process a large quantity of data, such as image data, efficiently.

Abstract: An information processing apparatus includes: a storage unit storing a maximum acceptable number of sheets of recording paper that can be processed by a post processing apparatus; a post process setting unit setting a predetermined post process to be performed by using the post processing apparatus; a generating unit generating bitmap data in units of physical pages based on logical page data; a transmitting unit transmitting the generated bitmap data to an image forming apparatus; a determining unit determining whether the post process can be performed based on the number of physical pages generated from the logical page data and the maximum acceptable number if setting has been done so as to perform the predetermined post process on the logical page data; and a control unit controlling a bitmap data generating process performed by the generating unit and a bitmap data transmitting process performed by the transmitting unit based on the determination made by the determining unit.

Abstract: In plural master apparatus connected to a bus, a master apparatus issues, to an arbiter, a request signal requesting the use of the bus after a lapse of a predetermined interval when the use of the bus becomes necessary, while another master apparatus issues, to the arbiter, a request signal requesting the use of the bus immediately when the use of the bus becomes necessary. The arbiter grants a right to use the bus by equally handling the request signals from the master apparatus. Also there is prepared a signal indicating a traffic in the bus, and the request signal is issued after the lapse of the interval in case of a high traffic but it is issued immediately in case of a low traffic. It is thus possible to adjust the practical priority of the but use right in detail or to dynamically change such priority by the presence or absence of such interval or a length thereof.

Abstract: In order to realize both the security and convenience upon using the image forming apparatus, whether or not to store an operation history is selected for each operation mode. A desired one of a plurality of operation modes is designated. When the designated operation mode is selected to store the operation mode, the operation history is stored in accordance with the operation of the operation mode.

Abstract: An information processing system includes an information processor for transmitting image data to an image processor together with device information, and plural image processors for performing, according to the device information, processes to the transmitted image data. The information processor comprises a setter to set the device information and command information, and a transmitter to transmit data including the device and command information to the image processor. The image processor comprises a device information memory, a device information setter to set the device information to the memory, and a selector to, according to the transmitted device information, set the device information according to the command information to the memory, change the command information, and select whether to transmit the data including the changed command information to the next image processor or transmit the transmitted data to the next image processor as it is.

Abstract: A scanner is connected to a G bus and a B bus by way of a scanner controller and a G bus/B bus interface (GBI). A printer is connected in a similar manner. Furthermore, the scanner controller is connected directly to a printer controller with a CP bus. The GBI is capable of performing DMA transfer and data can be transferred between the GBIs. Furthermore, data can be transferred by way of the G bus and a RAM or the B bus and the RAM. The GBI is connected to the scanner controller and the printer controller by way of FIFOs, respectively. Accordingly, an image input/output control system according to the present invention is capable of absorbing differences in data transfer speeds and can be connected to various kinds of scanners and printers.

Abstract: Bus control apparatus solves the problem that a high-speed bus which supports only burst transfer cannot be used when the boundary of a transfer memory address is not coincident with a unit boundary. A scanner controller and printer controller connected to a G bus capable of performing only burst transfer and a B bus capable of performing even single transfer determine from the address and data length of data to be transferred whether the data does not match the memory boundary. If the data does not match this boundary, a data portion which is not accommodated within the burst transfer unit is single-transferred using the B bus. A data portion which is accommodated within the burst transfer unit is burst-transferred using the G bus.

Abstract: The control apparatus reads the value of an external switch, and checks whether the apparatus serves as a control side or subordinate side. If the control apparatus serves as a subordinate side, it waits until the control side writes a configuration through a bus. If the control apparatus serves as a control side, it sets necessary values in itself, and writes a configuration in a device on the bus. In this way, the control apparatus can operate as both the control side and subordinate side.

Abstract: In plural master apparatus connected to a bus, a master apparatus issues, to an arbiter, a request signal requesting the use of the bus after a lapse of a predetermined interval when the use of the bus becomes necessary, while another master apparatus issues, to the arbiter, a request signal requesting the use of the bus immediately when the use of the bus becomes necessary. The arbiter grants a right to use the bus by equally handling the request signals from the master apparatus. Also there is prepared a signal indicating a traffic in the bus, and the request signal is issued after the lapse of the interval in case of a high traffic but it is issued immediately in case of a low traffic. It is thus possible to adjust the practical priority of the but use right in detail or to dynamically change such priority by the presence or absence of such interval or a length thereof.

Abstract: A P bus from a CPU, an MC bus from a system memory, an IO bus to which an input/output device has been connected, and a G bus for transferring image data of a scanner/printer controller are connected to a system bus bridge (SBB). The SBB connects any of the P bus, G bus and IO bus as a master and any of the MC bus and IO bus as a slave in dependence upon a request from a master. At this time the P bus and IO bus can be connected in parallel with the G bus and MC bus. As a result, access to the memory by the scanner/printer controller can be carried out in parallel with use of the input/output device by the CPU. This makes it possible to process a large quantity of data, such as image data, efficiently.

Abstract: A P bus from a CPU, an MC bus from a system memory, an IO bus to which an input/output device has been connected, and a G bus for transferring image data of a scanner/printer controller are connected to a system bus bridge (SBB). The SBB connects any of the P bus, G bus and IO bus as a master and any of the MC bus and IO bus as a slave in dependence upon a request from a master. At this time the P bus and IO bus can be connected in parallel with the G bus and MC bus. As a result, access to the memory by the scanner/printer controller can be carried out in parallel with use of the input/output device by the CPU. This makes it possible to process a large quantity of data, such as image data, efficiently.

Abstract: A P bus from a CPU, an MC bus from a system memory, an IO bus to which an input/output device has been connected, and a G bus for transferring image data of a scanner/printer controller are connected to a system bus bridge (SBB). The SBB connects any of the P bus, G bus and IO bus as a master and any of the MC bus and IO bus as a slave in dependence upon a request from a master. At this time the P bus and IO bus can be connected in parallel with the G bus and MC bus. As a result, access to the memory by the scanner/printer controller can be carried out in parallel with use of the input/output device by the CPU. This makes it possible to process a large quantity of data, such as image data, efficiently.

Abstract: A P bus from a CPU, an MC bus from a system memory, an IO bus to which an input/output device has been connected, and a G bus for transferring image data of a scanner/printer controller are connected to a system bus bridge (SBB). The SBB connects any of the P bus, G bus and IO bus as a master and any of the MC bus and IO bus as a slave in dependence upon a request from a master. At this time the P bus and IO bus can be connected in parallel with the G bus and MC bus. As a result, access to the memory by the scanner/printer controller can be carried out in parallel with use of the input/output device by the CPU. This makes it possible to process a large quantity of data, such as image data, efficiently.

Abstract: A display control unit comprises plural display units having different display control methods, an input system for inputting an identifying signal relative to the display control method of the display unit and a display timing generator for changing a period of applying a display control signal in accordance with the identifying signal input by the input means. A control unit controls the display units having the display control method corresponding to the identifying signal by the display control signal applied by the display timing generator.

Abstract: A pattern generator of an image processing apparatus generates an image pattern corresponding to code data according to the assignment of the code data. The pattern generator includes storage units for storing an image pattern having the form of a dot matrix in a form wherein respective rows are rearranged in different manners, an indication unit for indicating that the image pattern is to be read from the storage unit by performing rotation and/or mirror-image processing of the image pattern, a row address generation unit for generating row addresses for addressing the storage units in accordance with the indication by the indication unit, and a rearranging unit for determining a method to be used in rearranging of the image pattern output from the storage units according to the row addresses in accordance with the indication by the indication unit to rearrange the image pattern.

Abstract: An information recording system is disclosed in which a digital information recorded on a recording medium is read out, and the digital information is converted into optical patterns with darker and light densities so as to represent the logic "1" and "0." Thereafter the optical patterns are recorded on a microfilm as the dark and light images which represent the logic "1" and "0" and are available for timing or sync signals.