Patents by Inventor Nobuaki Hamanaka

Nobuaki Hamanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6436783
    Abstract: (issue) It is an issue to suppress variation in threshold voltage due to deterioration in shot channel characteristics and improve the slow trap characteristics of the MOS transistor for suppressing variation in threshold voltage of the transistor for a long-term use. (means for solving the issue) fluorine ions are implanted into a surface of a silicon substrate 1 but a peripheral region of a gate electrode on a p-MOS formation region. A first heat treatment is carried out for removing inter-lattice silicon atoms generated upon ion-implantation. Thereafter, a second heat treatment is carried out for diffusing fluorine ions into a region directly under the gate electrode. The first heat treatment is a lamp anneal such as RTA, and the second heat treatment is a furnace anneal.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: August 20, 2002
    Assignee: NEC Corporation
    Inventors: Atsuki Ono, Nobuaki Hamanaka
  • Publication number: 20020081827
    Abstract: Cobalt is sputtered on a silicon wafer in a deposition chamber of a magnetron sputtering system, and is conveyed to a load-lock chamber where a partial pressure of oxygen and/or the water concentration is controlled with introduction of nitrogen so as to present dicobalt disilicide layers from oxidation, thereby improving the production yield and reliability of the silicide layer morphology.
    Type: Application
    Filed: February 24, 2000
    Publication date: June 27, 2002
    Inventor: Nobuaki Hamanaka
  • Patent number: 6337272
    Abstract: A method of manufacturing a semiconductor device in which a cobalt silicide layer is formed on a semiconductor substrate. In the method, the semiconductor substrate is prepared, and cobalt is deposited on the semiconductor substrate by sputtering while heating the semiconductor substrate at a temperature approximately equal to 200 degrees Celsius. Thereafter, cobalt is deposited on the semiconductor substrate by sputtering while heating the semiconductor substrate at a temperature between 300 degrees Celsius and 400 degrees Celsius without exposing the semiconductor substrate to the atmosphere. Preferably, the semiconductor substrate is thereafter rapid thermal annealed at a temperature equal to or higher than 500 degrees Celsius in nitrogen atmosphere for a predetermined time. Further, at least a part of cobalt portion or cobalt oxide portion on the semiconductor substrate is removed by wet etching.
    Type: Grant
    Filed: February 17, 2000
    Date of Patent: January 8, 2002
    Assignee: NEC Corporation
    Inventor: Nobuaki Hamanaka
  • Patent number: 6271549
    Abstract: The magnetron sputtering apparatus of this invention has planar bodies 13 made of a material capable of capturing oxygen and water, heaters 14 to heat the planar bodies 13, an oxygen monitor 15 and others in a load lock chamber 11 and separate chamber 12. After a metal film has been formed on a silicon substrate 18 in a film forming chamber, the substrate is subjected to a heating treatment such that a metal silicide layer is formed. Before the silicon substrate being still hot is transferred to the load lock and separate chambers 11 and 12, oxygen and water in the same chambers have been removed. Through this arrangement it is possible to prevent oxidation of the metal silicide layer, and to form a high melting point silicide layer having a low resistance.
    Type: Grant
    Filed: December 22, 1999
    Date of Patent: August 7, 2001
    Assignee: NEC Corporation
    Inventor: Nobuaki Hamanaka