Abstract: On a transparent substrate to which a gate electrode is arranged, a silicon nitride film and a silicon oxide film to be gate insulating films are deposited, and further, a polycrystalline silicon film as a semiconductor film to be an active region is formed. On the polycrystalline silicon film corresponding to the gate electrode, a stopper is arranged, and a silicon oxide film and a silicon nitride film to be an interlayer insulating films are deposited so as to cover this stopper. The film thickness T0 of the stopper is set in a range of 800 angstroms to 1200 angstroms. Furthermore, the film thickness T0 of the stopper is set in the range to fulfill the following expression: T0+T1?(T2×8000 ?) where T1 is the film thickness of the silicon oxide film and T2 is the film thickness of the silicon nitride film.

Abstract: In a bottom gate-type thin-film transistor manufacturing method, after ion doping, an ion stopper (55) is removed. The ion stopper (55) does not remain in the interlayer insulating film (8) lying immediately above the gate electrode. The thin-film transistor has such a structure that no ion stopper (55), and the interlayer insulating layer is in direct contact with at least the channel region of the semiconductor layer (4). The impurity concentration in the vicinity of the interface between the interlayer insulating film and the semiconductor layer 4 is 1018 atoms/cc or less. This structure can prevent the back channel phenomenon and reduce variations in characteristic resulting from variations in manufacturing.

Abstract: In a bottom gate-type thin-film transistor manufacturing method, after ion doping, an ion stopper (55) is removed. The ion stopper (55) does not remain in the interlayer insulating film (8) lying immediately above the gate electrode. The thin-film transistor has such a structure that no ion stopper (55), and the interlayer insulating layer is in direct contact with at least the channel region of the semiconductor layer (4). The impurity concentration in the vicinity of the interface between the interlayer insulating film and the semiconductor layer 4 is 1018 atoms/cc or less. This structure can prevent the back channel phenomenon and reduce variations in characteristic resulting from variations in manufacturing.

Abstract: There is provide a display which can prevent lowering of display quality caused by fluctuation of thickness of an orientation film. The display includes a display region having a reflective region and a transmissive region and comprises a first region having a convex insulating film formed in a region corresponding to the reflective region on a substrate, and an orientation film formed so as to cover the convex insulating film. A second region in which the convex insulating film is not formed is continuously formed among adjacent pixels.

Abstract: In a bottom gate-type thin-film transistor manufacturing method, after ion doping, an ion stopper is removed. The ion stopper does not remain in the interlayer insulating film lying immediately above the gate electrode. The thin-film transistor has such a structure that no ion stopper, and the interlayer insulating layer is in direct contact with at least the channel region of the semiconductor layer. The impurity concentration in the vicinity of the interface between the interlayer insulating film and the semiconductor layer 4 is 1018 atoms/cc or less. This structure can prevent the back channel phenomenon and reduce variations in characteristic resulting from variations in manufacturing.

Abstract: A display having a reflective region capable of simplifying a fabrication process with no requirement for providing a reflective electrode separately from the remaining layers is provided. This display, having a reflective region, comprises a reflective material layer, formed on a region of a substrate corresponding to the reflective region, having a function for serving as a reflective layer, an insulating layer formed on the reflective material layer and a transparent electrode formed on the insulating layer, while the reflective material layer is formed by the same layer as a layer having a prescribed function different from the function for serving as the reflective layer.

Abstract: According to the present invention, there is provided a display, in which the degradation of a displaying quality caused by a turbulently reflected light beam at the time of exposure can be suppressed. The display according to the present invention having a reflective region and a transmissive region comprises a projecting insulating layer formed in a region corresponding to the reflective region on a substrate and a light shielding layer formed under the projecting insulating layer and formed to extend at least up to a region in which a side end of the projecting insulating layer is located.

Abstract: In an organic electroluminescence (EL) display, a TFT (40) and an organic EL element (60) are formed on an insulating substrate (10) such as a glass substrate. The contact portion between the first electrode region (e.g. the source 43s) of the active layer (43) of the TFT (40) and the organic EL element (60) is formed of a laminated structure. The laminated structure is formed of the structure stacked in layers with p-si forming the source (43s), a refractory metal (Mo), aluminum, a refractory metal (Mo), and ITO forming the anode 61. The reliable contact between the source 43s and the anode 61 can prevent variations in brightness and early degradation in characteristic of the TFT 40 and the organic EL element 60.

Abstract: A reflective layer for reflecting light incident from a second substrate side and transmitting through a second electrode made of ITO or the like is formed above a first substrate, a switching element provided for each pixel, and an insulating film covering the switching element, the reflective layer being insulated from the switching element. A first electrode having a work function similar to the second electrode and made of a transparent conductive material such as ITO is formed more proximate to a liquid crystal layer than is the reflective layer and is connected to the switching element. The thickness of the first electrode is set to 100 Å or less or in a range approximately from 750 Å to 1250 Å.

Abstract: On a first substrate, a TFT which is a switching element is provided for each pixel, and above an insulating film covering this TFT, a reflective layer which is insulated from the TFT and which reflects light entering a second substrate and transmitting through a second electrode made of ITO is formed. Further, a first electrode having a work function similar to that of the second electrode and made of a transparent conductive material such as ITO is formed closer to a liquid crystal layer than the reflective layer, and this first electrode is connected with the TFT. With this configuration, the liquid crystal layer can be symmetrically AC driven by the first and second electrodes. A reliable connection between the first electrode and the TFT is provided through a connection metal layer made of a refractory metal.

Abstract: On a first substrate are formed a TFT provided to each pixel, an insulating film which covers the TFT, and a reflective layer which is provided on the insulating film so as to be insulated from the TFT and reflects light incident from a second substrate side. The reflective layer is covered with a passivation film on which a first electrode made of a transparent conductive material, such as ITO having the work function equivalent to a second electrode, is formed and connected to the TFT. The passivation film covering the reflective layer prevents the reflective surface of the reflective layer from deteriorating in reflection properties during a process for connecting the TFT and the first electrode. Further, the first and second electrodes having similar characteristics can symmetrically AC drive the liquid crystal layer.

Abstract: An LCD apparatus having a liquid crystal layer sealed between a first substrate having a first electrode and a second substrate having a second electrode, wherein the first substrate comprises a reflective layer formed only in a subregion within a pixel region, for reflecting light. A transparent conductive material is used for the first electrode and the first electrode made of the transparent conductive material is layered to cover a transmissive region within a pixel region and over the reflective layer in a reflective region within the pixel region to directly cover the reflective layer.

Abstract: On a transparent substrate to which a gate electrode is arranged, a silicon nitride film and a silicon oxide film to be gate insulating films are deposited, and further, a polycrystalline silicon film as a semiconductor film to be an active region is formed. On the polycrystalline silicon film corresponding to the gate electrode, a stopper is arranged, and a silicon oxide film and a silicon nitride film to be an interlayer insulating films are deposited so as to cover this stopper. The film thickness T0 of the stopper is set in a range of 800 angstroms to 1200 angstroms.

Abstract: On a transparent substrate to which a gate electrode is arranged, a silicon nitride film and a silicon oxide film to be gate insulating films are deposited, and further, a polycrystalline silicon film as a semiconductor film to be an active region is formed. On the polycrystalline silicon film corresponding to the gate electrode, a stopper is arranged, and a silicon oxide film and a silicon nitride film to be an interlayer insulating films are deposited so as to cover this stopper. The film thickness T0 of the stopper is set in a range of 800 angstroms to 1200 angstroms. Furthermore, the film thickness T0 of the stopper is set in the range to fulfill the following expression: T0+T1≦(T2×8000 Å)½ where T1 is the film thickness of the silicon oxide film and T2 is the film thickness of the silicon nitride film.

Abstract: In a bottom gate-type thin-film transistor manufacturing method, after ion doping, an ion stopper (55) is removed. The ion stopper (55) does not remain in the interlayer insulating film (8) lying immediately above the gate electrode. The thin-film transistor has such a structure that no ion stopper (55), and the interlayer insulating layer is in direct contact with at least the channel region of the semiconductor layer (4). The impurity concentration in the vicinity of the interface between the interlayer insulating film and the semiconductor layer 4 is 1018 atoms/cc or less. This structure can prevent the back channel phenomenon and reduce variations in characteristic resulting from variations in manufacturing.

Abstract: A method of manufacturing a polycrystalline silicon film having a particular field effect mobility is disclosed. A first polycrystalline silicon film is formed on a transparent insulation substrate. The surface of the silicon film is oxidized, and an amorphous silicon film is formed on the first polycrystalline silicon film and oxide layer. The amorphous silicon film is subjected to a solid phase growth process to be converted to a second polycrystalline silicon film. The field effect mobility of the second polycrystalline silicon film can be adjusted to a desired value by controlling the relative thicknesses of the first and second polycrystalline silicon films.

Abstract: On a transparent substrate, on which is positioned a gate electrode, a silicon nitride film and a silicon oxide film are formed as gate insulating films, and furthermore a polycrystalline silicon film is formed as a semiconductor film to become an active region. A stopper is positioned on the polycrystalline silicon film to correspond to a gate electrode, and a silicon oxide film, a silicon nitride film, and a silicon oxide film are formed as interlayer insulating film so as to cover the stopper. Contact holes are formed in the layer insulating film to correspond to a source region and a drain region, and a source electrode and a drain electrode are positioned through these contact holes.

Abstract: A gate electrode, silicon nitride film, silicon oxide film and silicon film are formed on an insulating substrate. A silicon oxide film and silicon nitride film are formed on the silicon film, and first and second contact holes are formed which penetrate these films. An electrode in contact with a drain area is arranged via the first contact hole. The whole is covered with a plagiarizing film, a third contact hole of smaller diameter than that of the second contact hole is formed corresponding to the second contact hole embedded by the planarizing film, and a transparent electrode in direct contact with a source area is arranged via the third contact hole. In this way, the contact resistance between the transparent electrode and the source area is reduced, and a simplified construction display device is obtained wherein the contact reliability of both electrodes is improved.

Abstract: On a transparent substrate to which a gate electrode is arranged, a silicon nitride film and a silicon oxide film to be gate insulating films are deposited, and further, a polycrystalline silicon film as a semiconductor film to be an active region is formed. On the polycrystalline silicon film corresponding to the gate electrode, a stopper is arranged, and a silicon oxide film and a silicon nitride film to be an interlayer insulating films are deposited so as to cover this stopper. The film thickness T0 of the stopper is set in a range of 800 angstroms to 1200 angstroms.

Abstract: On a transparent substrate to which a gate electrode is arranged, a silicon nitride film and a silicon oxide film to be gate insulating films are deposited, and further, a polycrystalline silicon film as a semiconductor film to be an active region is formed. On the polycrystalline silicon film corresponding to the gate electrode, a stopper is arranged, and a silicon oxide film and a silicon nitride film to be an interlayer insulating films are deposited so as to cover this stopper. The film thickness T0 of the stopper is set in a range of 800 angstroms to 1200 angstroms. Furthermore, the film thickness T0 of the stopper is set in the range to fulfill the following expression: T0+T1≦(T2×8000 Å)½ where T1 is the film thickness of the silicon oxide film and T2 is the film thickness of the silicon nitride film.