Patents by Inventor Nobuo Yamamoto

Nobuo Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240392099
    Abstract: An object of the present invention is to provide a method for producing a regenerated polyester resin with reduced coloration at low cost. A method for producing a regenerated polyester resin, comprising: the first step of mixing a polyester resin (A) collected for recycling, a polycarboxylic acid (B), and a polyol (C) followed by depolymerizing and esterifying the polyester resin (A); and the second step of performing polycondensation of a reactant produced by the first step to form the regenerated polyester resin, wherein a content of the polyester resin (A) is from 5 parts by mass to 80 parts by mass with respect to 100 parts by mass of the regenerated polyester resin, the polycondensation in the second step is performed in the presence of an aluminum compound, and a content of the aluminum compound is from 5 ppm by mass to 100 ppm by mass on an aluminum element basis with respect to the reactant produced by the first step.
    Type: Application
    Filed: September 26, 2022
    Publication date: November 28, 2024
    Applicant: TOYOBO CO., LTD.
    Inventors: Yu YAMAMOTO, Nobuo MORIYAMA, Maki KINAMI
  • Publication number: 20240352561
    Abstract: The cemented carbide of the present disclosure is a cemented carbide comprising a first phase composed of a tungsten carbide particle and a second phase comprising cobalt as a main component, wherein a total content of the first phase and the second phase in the cemented carbide is 97% by volume or more, an average value of an equivalent circle diameter of the tungsten carbide particle is 0.8 ?m or less, a cobalt content of the cemented carbide is 3% by mass or more and 10% by mass or less, a vanadium content of the cemented carbide is 0.01% by mass or more and 0.30% by mass or less, and a maximum value of the vanadium content in an interface region between a (0001) crystal plane of the tungsten carbide particle and the second phase is 15 atomic % or less.
    Type: Application
    Filed: May 25, 2022
    Publication date: October 24, 2024
    Applicant: Sumitomo Electric Hardmetal Corp.
    Inventors: Nobuo MIYASAKA, Takahiro YAMAKAWA, Kazuhiro HIROSE, Katsuya UCHINO, Tsuyoshi YAMAMOTO
  • Publication number: 20240337968
    Abstract: A developer supply device for supplying developer contained in a developer container toward a developing device in an apparatus body of an image forming apparatus includes a conveyance passage, a developer receiving portion, a sub-hopper, and a conveying tube. The conveyance passage delivers the developer discharged from the developer container. The developer receiving portion is detachable and attachable with respect to the developer container. The sub-hopper is detachable and attachable with respect to the developing device and stores the developer discharged toward the developing device. The flexible conveying tube has a first end portion coupled to the developer receiving portion and a second end portion coupled to the sub-hopper, and conveys the developer from the developer receiving portion to the sub-hopper. The developer supply device is detachable from and attachable to the apparatus body with a connection among the developer receiving portion, the sub-hopper, and the conveying tube being maintained.
    Type: Application
    Filed: June 30, 2022
    Publication date: October 10, 2024
    Inventors: Michiharu SUZUKI, Naoto SUZUKI, Kenji HONJOH, Nobuo KUWABARA, Yuta AZEYANAGI, Haruki NAGATA, Shota YAMAMOTO
  • Publication number: 20240331763
    Abstract: Apparatuses and methods for reducing standby current in memory array access circuits are disclosed. An example apparatus includes a activation voltage supply line and a sense amplifier coupled to the activation voltage supply line. The sense amplifier is configured to be activated by an activation voltage provided on the activation voltage supply line. A read-write circuit is coupled to a pair of local input/output lines and a pair of global input/output lines, and further coupled to the activation voltage supply line. The read-write circuit is configured to drive the pair global input/output lines based on voltages of the pair of local input/output lines when activated for a read operation and further configured to drive the pair of local input/output lines based on voltages of the pair of global input/output lines when activated for a write operation.
    Type: Application
    Filed: February 29, 2024
    Publication date: October 3, 2024
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: TAKAMASA SUZUKI, NOBUO YAMAMOTO, IZUMI NAKAI
  • Publication number: 20240309202
    Abstract: An object of the present invention is to provide a method for producing a polyester resin composition with less coloring and less decrease in molecular weight even after several times of recycling with used polyester resins produced with at least one type of polymerization catalyst selected from the group consisting of an antimony compound, a titanium compound, and a germanium compound.
    Type: Application
    Filed: June 21, 2022
    Publication date: September 19, 2024
    Applicant: TOYOBO CO., LTD.
    Inventors: Tamayo SASAI, Maki KINAMI, Yu YAMAMOTO, Fumiaki NISHINAKA, Nobuo MORIYAMA
  • Patent number: 12025676
    Abstract: A degradation degree assessment device for a secondary battery is to assess a degree of degradation of a secondary battery and includes a battery characteristic acquisition unit, a capacity estimation unit, and an assessment unit. The battery characteristic acquisition unit acquires a battery characteristic relating to a voltage transition of the secondary battery in a predetermined voltage section. The assessment unit assesses the degree of degradation of the secondary battery based on the battery characteristic acquired by the battery characteristic acquisition unit or based on a battery characteristic-related value computed on the basis of the battery characteristic.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: July 2, 2024
    Assignee: DENSO CORPORATION
    Inventors: Tomomi Asai, Nobuo Yamamoto, Hiroyasu Suzuki, Katsuki Hayashi, Yuya Minabe
  • Patent number: 11721372
    Abstract: Methods, systems, and devices for system and method for reading and writing memory management data through a non-volatile cell based register are described. A memory device may include a set of latch units addressable via a set of row lines and a set of column lines. Each latch unit may include a sense amplifier coupled with a first line and a first non-volatile capacitor coupled with the first line and a second line, where the first capacitor is configured to store a charge representing one or more bits. Additionally, each latch unit may include a second capacitor coupled with the first line and a third line, where the second capacitor is configured to amplify a voltage at the first line based on the charge stored in the first capacitor.
    Type: Grant
    Filed: August 25, 2022
    Date of Patent: August 8, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Yasushi Matsubara, Yusuke Jono, Donald Martin Morgan, Nobuo Yamamoto
  • Publication number: 20230122626
    Abstract: A server for a deterioration degree determination system for a secondary battery includes an estimation formula memory unit and an update unit. The estimation formula memory unit stores an estimation formula for determining a deterioration degree based on a battery characteristic related to transition of a battery state over a predetermined voltage section in the secondary battery or a battery characteristic relationship value related to the battery characteristic. The update unit that updates the estimation formula stored in the estimation formula memory unit based on the battery characteristic related to the transition of the battery state of the secondary battery acquired by charging and discharging the secondary battery in an external terminal.
    Type: Application
    Filed: December 20, 2022
    Publication date: April 20, 2023
    Inventors: Tomomi ASAI, Nobuo Yamamoto, Hiroyasu Suzuki, Katsuki Hayashi, Yuya Minabe
  • Publication number: 20230118311
    Abstract: A deterioration degree determination device includes a charging and discharging control unit, a battery characteristic acquisition unit, and a determination unit. The charging and discharging control unit, in a state where multiple secondary batteries are connected to each other to form a battery pack, performs a charging and discharging operation of the battery pack while voltages of the secondary batteries are individually measured. The battery characteristic acquisition unit acquires a battery characteristic related to transition in a battery state over a predetermined voltage section for at least some of the multiple secondary batteries. The determination unit determines a deterioration degree of at least some of the multiple secondary batteries based on the battery characteristic or a battery characteristic relationship value calculated based on the battery characteristic.
    Type: Application
    Filed: December 20, 2022
    Publication date: April 20, 2023
    Inventors: Tomomi ASAI, Nobuo YAMAMOTO, Hiroyasu SUZUKI, Katsuki HAYASHI, Yuya MINABE
  • Publication number: 20230118313
    Abstract: In a deterioration degree determination device for a secondary battery, a battery information acquisition unit acquires battery information related to the secondary battery, and a feasibility determination unit determines feasibility of determination of deterioration degree for each secondary battery based on the battery information and a feasibility determination reference prepared in advance. A battery characteristic acquisition unit acquires a battery characteristic related to transition of a battery state in a predetermined voltage section for the secondary battery for which the determination of the deterioration degree is determined to be feasible by the feasibility determination unit.
    Type: Application
    Filed: December 20, 2022
    Publication date: April 20, 2023
    Inventors: Tomomi ASAI, Nobuo Yamamoto, Hiroyasu Suzuki, Katsuki Hayashi, Yuya Minabe
  • Patent number: 11615831
    Abstract: Embodiments of the disclosure are drawn to apparatuses and methods for a sequence of refreshing memory mats. During a refresh operation, wordlines of the memory may be refreshed in a sequence. Groups of wordlines may be organized into memory mats. In order to prevent noise, each time a wordline in a memory mat is refreshed, the next wordline to be refreshed may be in a mat which is not physically adjacent to the mat containing the previously refreshed wordline.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: March 28, 2023
    Assignee: MICRON TECHNOLOGY, INC.
    Inventor: Nobuo Yamamoto
  • Publication number: 20230068011
    Abstract: Methods, systems, and devices for system and method for reading and writing memory management data through a non-volatile cell based register are described. A memory device may include a set of latch units addressable via a set of row lines and a set of column lines. Each latch unit may include a sense amplifier coupled with a first line and a first non-volatile capacitor coupled with the first line and a second line, where the first capacitor is configured to store a charge representing one or more bits. Additionally, each latch unit may include a second capacitor coupled with the first line and a third line, where the second capacitor is configured to amplify a voltage at the first line based on the charge stored in the first capacitor.
    Type: Application
    Filed: August 25, 2022
    Publication date: March 2, 2023
    Inventors: Yasushi Matsubara, Yusuke Yono, Donald Martin Morgan, Nobuo Yamamoto
  • Patent number: 11592488
    Abstract: A battery monitoring system includes a data acquiring unit and a failure determining unit. The data acquiring unit acquires a plurality of types of monitoring data to monitor a state of a secondary battery. The failure determining unit determines whether the secondary battery has failed. The failure determining unit performs sparsity regularization using the monitoring data as variables and calculates a partial correlation coefficient matrix of the monitoring data. The failure determining unit calculates, as an abnormality level, an amount of change in a partial correlation coefficient, which is a component of the partial correlation coefficient matrix, between two partial correlation coefficient matrices calculated at different periods. The failure determining unit determines that the secondary battery has failed when the calculated abnormality level exceeds a predetermined threshold.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: February 28, 2023
    Assignee: DENSO CORPORATION
    Inventors: Ichiro Yamada, Nobuo Yamamoto, Shuhei Yoshida
  • Patent number: 11561260
    Abstract: A used secondary battery module management system server manages a manufacture of a battery assembly. The server stores, in a memory, a correspondence relationship of each of secondary battery modules among identification information, ranks, and status information. The server extracts an available rank from the ranks in response to a rebuilding request for the battery assembly. The available rank is a rank in which the number of the secondary battery modules having the status information indicating that the secondary battery modules are available is equal to or larger than the number of the secondary battery modules required to constitute the battery assembly. The server receives, from an external terminal, the identification information on each of selection secondary battery modules having an identical rank.
    Type: Grant
    Filed: January 17, 2022
    Date of Patent: January 24, 2023
    Assignee: DENSO CORPORATION
    Inventors: Keisuke Goto, Haruki Tanaka, Mayu Iida, Hiroyasu Suzuki, Nobuo Yamamoto, Shogo Suzuki
  • Patent number: 11462249
    Abstract: Methods, systems, and devices for reading and writing memory management data using a non-volatile cell based register are described. A memory device may include a set of latch units addressable via a set of row lines and a set of column lines. Each latch unit may include a sense amplifier coupled with a first line and a first non-volatile capacitor coupled with the first line and a second line, where the first capacitor is configured to store a charge representing one or more bits. Additionally, each latch unit may include a second capacitor coupled with the first line and a third line, where the second capacitor is configured to amplify a voltage at the first line based on the charge stored in the first capacitor.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: October 4, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Yasushi Matsubara, Yusuke Jono, Donald Martin Morgan, Nobuo Yamamoto
  • Publication number: 20220310189
    Abstract: Methods, systems, and devices for error control for memory device are described. A memory device may be configured to perform memory management operations including error control operations. For example, a memory device may be configured to perform an error control operation on data stored in a first memory cell coupled with a source row of a memory array. The memory device may be configured to write the data to a second memory cell coupled with the target row of the memory array based on performing the error control operation on the data and determine whether the management operation is complete based at least in part on the first column address of the first memory cell. The memory device may also generate an output signal to perform the error control operation on a third memory cell coupled with the source row based on determining whether the management operation is complete.
    Type: Application
    Filed: April 27, 2022
    Publication date: September 29, 2022
    Inventors: Nobuo Yamamoto, Donald Martin Morgan, Victor Wong, Jongtae Kwak
  • Publication number: 20220229120
    Abstract: A used secondary battery module management system server manages a manufacture of a battery assembly. The server stores, in a memory, a correspondence relationship of each of secondary battery modules among identification information, ranks, and status information. The server extracts an available rank from the ranks in response to a rebuilding request for the battery assembly. The available rank is a rank in which the number of the secondary battery modules having the status information indicating that the secondary battery modules are available is equal to or larger than the number of the secondary battery modules required to constitute the battery assembly. The server receives, from an external terminal, the identification information on each of selection secondary battery modules having an identical rank.
    Type: Application
    Filed: January 17, 2022
    Publication date: July 21, 2022
    Inventors: Keisuke GOTO, Haruki TANAKA, Mayu IIDA, Hiroyasu SUZUKI, Nobuo YAMAMOTO, Shogo SUZUKI
  • Patent number: 11340277
    Abstract: An abnormality determination device for a secondary battery includes an internal-resistance calculation unit, a threshold memory unit, a capacity balance comparison unit, and an abnormality determination unit. The internal-resistance calculation unit detects an internal resistance in a negative-electrode reaction resistance dominant region in which a reaction resistance of a negative electrode is dominant in a charge and discharge reaction of the secondary battery. The threshold memory unit stores a capacity balance threshold used as a reference for determining abnormality in a balance between a capacity of a positive electrode and a capacity of the negative electrode in the secondary battery. The capacity balance comparison unit compares the internal resistance calculated by the internal-resistance calculation unit with the capacity balance threshold stored in the threshold memory unit.
    Type: Grant
    Filed: August 13, 2020
    Date of Patent: May 24, 2022
    Assignee: DENSO CORPORATION
    Inventors: Nobuo Yamamoto, Ichiro Yamada, Shuhei Yoshida, Masaya Nakamura, Takehiko Yamaki, Hiroyasu Suzuki, Katsuki Hayashi
  • Publication number: 20220146590
    Abstract: A degradation degree assessment device for a secondary battery is to assess a degree of degradation of a secondary battery and includes a battery characteristic acquisition unit, a capacity estimation unit, and an assessment unit. The battery characteristic acquisition unit acquires a battery characteristic relating to a voltage transition of the secondary battery in a predetermined voltage section. The assessment unit assesses the degree of degradation of the secondary battery based on the battery characteristic acquired by the battery characteristic acquisition unit or based on a battery characteristic-related value computed on the basis of the battery characteristic.
    Type: Application
    Filed: January 27, 2022
    Publication date: May 12, 2022
    Applicant: DENSO CORPORATION
    Inventors: Tomomi ASAI, Nobuo YAMAMOTO, Hiroyasu SUZUKI, Katsuki HAYASHI, Yuya MINABE
  • Patent number: 11322218
    Abstract: Methods, systems, and devices for error control for memory device are described. A memory device may be configured to perform memory management operations including error control operations. For example, a memory device may be configured to perform an error control operation on data stored in a first memory cell coupled with a source row of a memory array. The memory device may be configured to write the data to a second memory cell coupled with the target row of the memory array based on performing the error control operation on the data and determine whether the management operation is complete based at least in part on the first column address of the first memory cell. The memory device may also generate an output signal to perform the error control operation on a third memory cell coupled with the source row based on determining whether the management operation is complete.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: May 3, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Nobuo Yamamoto, Donald Martin Morgan, Victor Wong, Jongtae Kwak