Patents by Inventor Nobuya Takahashi
Nobuya Takahashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20140284820Abstract: A substrate for mounting a semiconductor includes a first insulation layer having first and second surfaces on the opposite sides and having a penetrating hole penetrating through the first insulation layer, an electrode formed in the penetrating hole in the first insulation layer and having a protruding portion protruding from the second surface of the first insulation layer, a first conductive pattern formed on the first surface of the first insulation layer and connected to the electrode, a second insulation layer formed on the first surface of the first insulation layer and the first conductive pattern and having a penetrating hole penetrating through the second insulating layer, a second conductive pattern formed on the second insulation layer and for mounting a semiconductor element, and a via conductor formed in the penetrating hole in the second insulation layer and connecting the first and second conductive patterns.Type: ApplicationFiled: June 4, 2014Publication date: September 25, 2014Applicant: IBIDEN CO., LTD.Inventors: Toshiki FURUTANI, Daiki KOMATSU, Masatoshi KUNIEDA, Naomi FUJITA, Nobuya TAKAHASHI
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Patent number: 8785255Abstract: A substrate for mounting a semiconductor includes a first insulation layer having first and second surfaces on the opposite sides and having a penetrating hole penetrating through the first insulation layer, an electrode formed in the penetrating hole in the first insulation layer and having a protruding portion protruding from the second surface of the first insulation layer, a first conductive pattern formed on the first surface of the first insulation layer and connected to the electrode, a second insulation layer formed on the first surface of the first insulation layer and the first conductive pattern and having a penetrating hole penetrating through the second insulating layer, a second conductive pattern formed on the second insulation layer and for mounting a semiconductor element, and a via conductor formed in the penetrating hole in the second insulation layer and connecting the first and second conductive patterns.Type: GrantFiled: February 12, 2014Date of Patent: July 22, 2014Assignee: Ibiden Co., Ltd.Inventors: Toshiki Furutani, Daiki Komatsu, Masatoshi Kunieda, Naomi Fujita, Nobuya Takahashi
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Publication number: 20140162411Abstract: A substrate for mounting a semiconductor includes a first insulation layer having first and second surfaces on the opposite sides and having a penetrating hole penetrating through the first insulation layer, an electrode formed in the penetrating hole in the first insulation layer and having a protruding portion protruding from the second surface of the first insulation layer, a first conductive pattern formed on the first surface of the first insulation layer and connected to the electrode, a second insulation layer formed on the first surface of the first insulation layer and the first conductive pattern and having a penetrating hole penetrating through the second insulating layer, a second conductive pattern formed on the second insulation layer and for mounting a semiconductor element, and a via conductor formed in the penetrating hole in the second insulation layer and connecting the first and second conductive patterns.Type: ApplicationFiled: February 12, 2014Publication date: June 12, 2014Applicant: IBIDEN CO., LTD.Inventors: Toshiki FURUTANI, Daiki Komatsu, Masatoshi Kunieda, Naomi Fujita, Nobuya Takahashi
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Patent number: 8698303Abstract: A substrate for mounting a semiconductor includes a first insulation layer having first and second surfaces on the opposite sides and having a penetrating hole penetrating through the first insulation layer, an electrode formed in the penetrating hole in the first insulation layer and having a protruding portion protruding from the second surface of the first insulation layer, a first conductive pattern formed on the first surface of the first insulation layer and connected to the electrode, a second insulation layer formed on the first surface of the first insulation layer and the first conductive pattern and having a penetrating hole penetrating through the second insulating layer, a second conductive pattern formed on the second insulation layer and for mounting a semiconductor element, and a via conductor formed in the penetrating hole in the second insulation layer and connecting the first and second conductive patterns.Type: GrantFiled: September 30, 2011Date of Patent: April 15, 2014Assignee: Ibiden Co., Ltd.Inventors: Toshiki Furutani, Daiki Komatsu, Masatoshi Kunieda, Naomi Fujita, Nobuya Takahashi
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Publication number: 20130307162Abstract: A wiring board includes a first insulation layer, a first conducive layer having first conductive patterns formed on the first insulation layer, a wiring structure positioned on the first insulation layer and including a second insulation layer and a second conductive layer having second conductive patterns formed on the second insulation layer, multiple conductive patterns formed on the wiring structures such that the conductive patterns are connected to the second conductive patterns, respectively, multiple first electrodes formed on the first conductive patterns, respectively, and multiple second electrodes formed on the conductive patterns connected to the second conductive patterns of the wiring structure, respectively. The first electrodes and the second electrodes have top surfaces which form the same plane.Type: ApplicationFiled: May 16, 2013Publication date: November 21, 2013Applicant: IBIDEN CO., LTD.Inventors: Yoshinori Shizuno, Nobuya Takahashi, Hisayuki Nakagome, Asuka II
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Patent number: 8546922Abstract: A wiring board including a core substrate made of an insulative material and having a penetrating portion, a first interlayer insulation layer formed on the surface of the core substrate, a first conductive circuit formed on the surface of the first interlayer insulation layer, a first via conductor formed in the first interlayer insulation layer, and an electronic component accommodated in the penetrating portion of the core substrate and including a semiconductor element, a bump body mounted on the semiconductor element, a conductive circuit connected to the bump body, an interlayer resin insulation layer formed on the conductive circuit, and a via conductor formed in the interlayer resin insulation layer. The first via conductor has a tapering direction which is opposite of a tapering direction of the via conductor in the electronic component.Type: GrantFiled: September 28, 2011Date of Patent: October 1, 2013Assignee: Ibiden Co., Ltd.Inventors: Toshiki Furutani, Daiki Komatsu, Nobuya Takahashi, Masatoshi Kunieda, Naomi Fujita, Koichi Tsunoda, Minetaka Oyama, Toshimasa Yano
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Publication number: 20120181708Abstract: A substrate for mounting a semiconductor includes a first insulation layer having first and second surfaces on the opposite sides and having a penetrating hole penetrating through the first insulation layer, an electrode formed in the penetrating hole in the first insulation layer and having a protruding portion protruding from the second surface of the first insulation layer, a first conductive pattern formed on the first surface of the first insulation layer and connected to the electrode, a second insulation layer formed on the first surface of the first insulation layer and the first conductive pattern and having a penetrating hole penetrating through the second insulating layer, a second conductive pattern formed on the second insulation layer and for mounting a semiconductor element, and a via conductor formed in the penetrating hole in the second insulation layer and connecting the first and second conductive patterns.Type: ApplicationFiled: September 30, 2011Publication date: July 19, 2012Applicant: IBIDEN CO., LTD.Inventors: Toshiki FURUTANI, Daiki Komatsu, Masatoshi Kunieda, Naomi Fujita, Nobuya Takahashi
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Publication number: 20120175754Abstract: A wiring board including a core substrate made of an insulative material and having a penetrating portion, a first interlayer insulation layer formed on the surface of the core substrate, a first conductive circuit formed on the surface of the first interlayer insulation layer, a first via conductor formed in the first interlayer insulation layer, and an electronic component accommodated in the penetrating portion of the core substrate and including a semiconductor element, a bump body mounted on the semiconductor element, a conductive circuit connected to the bump body, an interlayer resin insulation layer formed on the conductive circuit, and a via conductor formed in the interlayer resin insulation layer. The first via conductor has a tapering direction which is opposite of a tapering direction of the via conductor in the electronic component.Type: ApplicationFiled: September 28, 2011Publication date: July 12, 2012Applicant: IBIDEN CO., LTD.Inventors: Toshiki FURUTANI, Daiki KOMATSU, Nobuya TAKAHASHI, Masatoshi KUNIEDA, Naomi FUJITA, Koichi TSUNODA, Minetaka OYAMA, Toshimasa YANO
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Publication number: 20120080786Abstract: An electronic component including a wiring board having interlayer insulation layers and conductive patterns, the wiring board having a first surface and a second surface on the opposite side of the first surface, multiple first bumps formed on a first conductive pattern positioned on the first surface of the wiring board among the conductive patterns of the wiring board, a semiconductor element mounted on the first surface of the wiring board through the first bumps, an encapsulating resin encapsulating the semiconductor element and at least a portion of a side surface of the wiring board, the side surface of the wiring board extending between the first surface and second surface of the wiring board, and multiple of second bumps formed on the second surface of the wiring board and connected to a second conductive pattern of the conductive patterns in the wiring board.Type: ApplicationFiled: August 22, 2011Publication date: April 5, 2012Applicant: IBIDEN CO., LTD.Inventors: Toshiki FURUTANI, Daiki Komatsu, Nobuya Takahashi
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Patent number: 5722075Abstract: Co-channel interference due to the use of smaller and lighter mobile communication terminals at elevated locations in the recent widespread mobile communications services can be prevented from increasing by applying an overlapping cell configuration composed of a plurality of groups of cells, for example, a group of cells covering a ground surface and another group of larger cells covering an elevated space above the ground surface, and assigning different groups of radio frequency channels to the groups of cells.Type: GrantFiled: May 2, 1995Date of Patent: February 24, 1998Assignee: NEC CorporationInventor: Nobuya Takahashi
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Patent number: 5275602Abstract: The invention provides an article for joining the pieces of a fractured bone, characterized in that the article is composed of a high-molecular weight material which is absorbable in the living body and that the article is in the form of a tubular body having a hollow interior and a cutout extending over the entire length of the tubular body in the longitudinal direction thereof.Type: GrantFiled: October 14, 1992Date of Patent: January 4, 1994Assignees: Gunze Limited, Yoshihiko ShimizuInventors: Yoshihiko Shimizu, Tatsuo Nakamura, Teruo Matsui, Nobuya Takahashi, Takeshi Shimamoto
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Patent number: 5116552Abstract: A process for preparing a crack-free, dried collagen sponge having a shrinkage factor of up to 14%, including the steps of impregnating crosslinked collagen sponge with an aqueous solution of a hydrophilic organic solvent, freezing the sponge at a temperature of -80.degree. C. or lower, and vacuum-drying the sponge.Type: GrantFiled: January 28, 1991Date of Patent: May 26, 1992Assignee: Gunze LimitedInventors: Shinichiro Morita, Nobuya Takahashi, Takeshi Shimamoto, Kazuya Matsuda, Shigehiko Suzuki