Abstract: When portable electronic equipment drops, CPU stops power supply to a prescribed unit. A prescribed unit is a unit that is not necessary for the continuous operation of the portable electronic equipment. When the portable electronic equipment collides with the floor or the ground, the battery terminal may be momentarily detached from the connector. In this case, instantaneous voltage drop or momentary power failure may occur. Power supply to a prescribed unit is stopped while power supply to CPU and RAM is continued. Therefore, power supply to CPU and RAM can be continued with electric charge stored in a capacitor inside the portable electronic equipment.

Abstract: A method of immunoassay of H5 subtype influenza A virus by which the virus can be accurately assayed even in cases where a certain level of mutation has occurred in the H5 subtype influenza A virus, and a kit therefor, and a novel anti-H5 subtype influenza A virus monoclonal antibody which can be used for the immunoassay are disclosed. The antibody or an antigen-binding fragment thereof of the present invention undergoes antigen-antibody reaction with hemagglutinin of H5 subtype influenza A virus, and the corresponding epitope of the antibody or an antigen-binding fragment thereof is located in a region other than the receptor subdomain (excluding C-terminal region thereof consisting of 11 amino acids), which antibody or an antigen-binding fragment thereof does not have neutralizing activity against the influenza A virus.

Abstract: A novel means by which HCMV infection can be detected with a high sensitivity and whose practicality is high is disclosed. The present inventors synthesized as many as 15 kinds of HCMV proteins in their full length forms, and intensively studied their reactivities with sera from HCMV-infected patients to find that all the infected patients can be detected without fail when using the pp28 full length protein as an antigen. The pp28 full length protein can be synthesized and purified as a recombinant protein in a large scale by using Escherichia coli, and can be commercially used as an antigen for HCMV tests.

Abstract: When portable electronic equipment drops, CPU stops power supply to a prescribed unit. A prescribed unit is a unit that is not necessary for the continuous operation of the portable electronic equipment. When the portable electronic equipment collides with the floor or the ground, the battery terminal may be momentarily detached from the connector. In this case, instantaneous voltage drop or momentary power failure may occur. Power supply to a prescribed unit is stopped while power supply to CPU and RAM is continued. Therefore, power supply to CPU and RAM can be continued with electric charge stored in a capacitor inside the portable electronic equipment.

Abstract: A method of immunoassay of H5 subtype influenza A virus by which the virus can be accurately assayed even in cases where a certain level of mutation has occurred in the H5 subtype influenza A virus, and a kit therefor, and a novel anti-H5 subtype influenza A virus monoclonal antibody which can be used for the immunoassay are disclosed. The antibody or an antigen-binding fragment thereof of the present invention undergoes antigen-antibody reaction with hemagglutinin of H5 subtype influenza A virus, and the corresponding epitope of the antibody or an antigen-binding fragment thereof is located in a region other than the receptor subdomain (excluding C-terminal region thereof consisting of 11 amino acids), which antibody or an antigen-binding fragment thereof does not have neutralizing activity against the influenza A virus.

Abstract: A monoclonal antibody which specifically recognizes SARS virus is provided, and an immunoassay, immunoassay reagent and immunoassay device for detecting the SARS virus using the monoclonal antibody are disclosed. The monoclonal antibody according to the present invention is a monoclonal antibody against a nucleoprotein of a corona virus causing severe acute respiratory syndrome (SARS).

Abstract: Well bias voltages are generated in accordance with a logic power supply voltage and a memory power supply voltage. The transistor included in a control circuit in a memory core is constituted of a logic transistor manufactured through the same manufacturing steps as those for the transistors of a logic formed on the same semiconductor substrate. Well bias voltages (VBB, VPP) are applied to a back gate of this logic transistor. A memory integrated with a logic on a common semiconductor substrate is provided which allows a transistor of a control circuit therein to be manufactured through the same manufacturing process as that of the logic and allows reduction of current consumption.

Abstract: An audio data processor includes a packet receiver for receiving audio data packets and a coded data extractor for extracting coded data from the received packets. When an error detector detects a receiving error of a packet in the packet receiver, a data interpolator generates interpolation coded data on the basis of coded data of a packet normally received immediately before the missing packet, and interpolates coded data of the missing packet by the interpolation coded data.

Abstract: The clock-generating circuit for generating a clock signal, includes a ring oscillator having an odd number of inverters connected in a ring configuration. The ring oscillator is activated to generate a clock signal when an activating signal is at a first level and is de-activated to cease generation of the clock signal when the activating signal is at a second level. A latch circuit is connected to an output node of the ring oscillator, and holds a level of the output node of the ring oscillator in response to transition of the activating signal from the first level to the second level. When the activating signal is lowered from the H level to the L level, the level of the clock signal is latched such that generation of a glitch in the clock signal will be prevented from occurring.

Abstract: A VDC circuit that supplies an internal voltage VDD1 to an internal circuit in a normal operation forces a transistor off in a burn-in test mode through input of a test signal to suppress supply of an external power supply voltage VDDH to a node. In a burn-in test mode, an external power supply voltage lower than external power supply voltage VDDH and higher than internal voltage VDD1 is supplied from an external pad.

Abstract: With power-on detection circuits provided for a plurality of power supply voltages, a main power-on detection signal is maintained at the active state to reset an internal node while at least one of the power-on detection signals is active. In a multi-power semiconductor integrated circuit device, current consumption at the time of power-up is reduced.

Abstract: Oscillation outputs which are different for respective detector signals output from a first detector circuit and a second detector circuit, are obtained from a first ring oscillator and a second ring oscillator respectively corresponding to the detector circuits. A selector selects and outputs one of the oscillation outputs. Accordingly, it is sufficient to provide only one pump circuit in a circuit producing a substrate bias voltage.

Abstract: Disclosed are a fused DNA sequence which comprises a DNA sequence of a heat-resistant protein, fused directly or indirectly to a DNA sequence coding a selected protein or peptide, a fused protein expressed from the fused DNA sequence, and a method for expressing the fused protein.

Abstract: A tuning control circuit includes fuse devices each shifting from a conductive state to an interrupted state in response to a program input from the outside, and signal driving circuits for driving the signal levels of tuning control signals in accordance with the states of the fuse devices. A reference voltage generating circuit generates a reference voltage corresponding to a reference value of a memory array voltage of a semiconductor memory device according to the invention in accordance with an electrical resistance value which is finely adjusted in response to the tuning control signals.

Abstract: In a detector included in a VPP generating circuit in a DRAM, an external power supply potential is applied to the gate of an N-channel MOS transistor for regulating a through current of an inverter for outputting an inversion signal of an output signal of a comparator. Since a drain-source voltage of the N-channel MOS transistor can be set to be lower than a threshold voltage Vthn of the N-channel MOS transistor, an operation margin of the detector under conditions of a low voltage and a low temperature is made wider as compared with a conventional technique.

Abstract: Disclosed are a fused DNA sequence which comprises a DNA sequence of a heat-resistant protein, fused directly or indirectly to a DNA sequence coding a selected protein or peptide, a fused protein expressed from the fused DNA sequence, and a method for expressing the fused protein.

Abstract: A DRAM is provided at a portion relating to generation of a boosted potential with a filter circuit located between a detector circuit and a ring oscillator for removing a pulse-like change in level from an output signal of the detector circuit. Accordingly, temporary stop of the charge pump circuit can be prevented even when the boosted potential exceeds in a pulse-like manner the reference potential at the vicinity of the output node of the charge pump circuit, and the boosted potential can be rapidly restored to the reference potential.

Abstract: The clock generating circuit includes: an oscillator generating a reference clock signal; an EX-OR gate connected in a ring configuration; and first and second D latch circuits. The EX-OR gate inverts a clock signal to provide the inverted clock signal to the first D latch circuit when an activating signal is at H level. In this case, the clock signal is a clock signal having a clock cycle period of twice that of the reference clock signal. The EX-OR gate provides the clock signal direct to the first D latch circuit when the activating signal is set to L level. In this case, level transition of the clock signal is ceased. Hence, generation of a glitch in the clock signal is prevented from occurring.

Abstract: A DRAM is provided at a portion relating to generation of a boosted potential with a filter circuit located between a detector circuit and a ring oscillator for removing a pulse-like change in level from an output signal of the detector circuit. Accordingly, temporary stop of the charge pump circuit can be prevented even when the boosted potential exceeds in a pulse-like manner the reference potential at the vicinity of the output node of the charge pump circuit, and the boosted potential can be rapidly restored to the reference potential.

Abstract: In a VDC circuit, a differential amplifier compares a first reference potential with an internal supply potential to generate a control signal according to a result of the comparison. A constant current source transistor receives at its gate a second reference potential supplied through a path different from that of the first reference potential to operate for controlling an operation current value of the differential amplifier. A drive transistor changes conductance between a node for outputting the internal supply potential and a supply potential according to the control signal.