Patents by Inventor Nobuyuki Horikawa
Nobuyuki Horikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10752544Abstract: There is provided a production method of a resin composite module for a vehicle, which includes a resin module substrate, and a silicone-based polymer hard coat which is formed on the resin module substrate. The method includes forming the hard coat by coating a silicone-based polymer onto the resin module substrate, and radiating an ultraviolet ray onto at least a part of a surface of the hard coat such that a hardness thereof becomes 0.8 GPa or more as evaluated by a nanoindentation method. The radiating the ultraviolet ray uses a light source unit which includes a light source and emits an ultraviolet ray having a wavelength of 360 nm or less from an emission surface thereof and radiates the ultraviolet ray onto the surface of the hard coat while a distance from the emission surface to the surface of the hard coat is 10 mm or less.Type: GrantFiled: September 13, 2018Date of Patent: August 25, 2020Assignee: KOITO MANUFACTURING CO., LTD.Inventors: Nobuyuki Horikawa, Yasuaki Tsutsumi, Masaru Kaneko, Masayuki Kobayashi
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Patent number: 10748838Abstract: A silicon carbide semiconductor device includes an upper gate electrode including a gate pad and a gate wiring line, and an upper source electrode including first and second source pads. The gate wiring line includes a gate global wiring line extending to encircle the source pads, and a gate connection wiring line. The upper source electrode includes an outer periphery source wiring line extending to encircle the gate global wiring line, and first and second source connections connecting the outer periphery source wiring line to the first and second source pads, respectively. The gate global wiring line includes a first portion, a second portion, and a third portion. The first portion is split at a first substrate corner and a second substrate corner and lies between the first substrate corner and the second substrate corner.Type: GrantFiled: January 24, 2019Date of Patent: August 18, 2020Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Atsushi Ohoka, Nobuyuki Horikawa, Masao Uchida
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Patent number: 10672878Abstract: The silicon carbide semiconductor device includes a plurality of unit cells each having an MISFET structure and provided on a silicon carbide semiconductor substrate. A gate upper electrode disposed adjacent to the plurality of unit cells includes a gate pad and gate global wires. When viewed in plan, gate electrodes do not overlap with the gate pad.Type: GrantFiled: January 24, 2019Date of Patent: June 2, 2020Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Atsushi Ohoka, Nobuyuki Horikawa, Masao Uchida
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Patent number: 10421390Abstract: A lamp device mounted on a vehicle includes a housing, a first translucent member defining a housing space together with the housing, a lamp unit housed in the housing space and including a light source, a sensor housed in the housing space and configured to detect information outside the vehicle based on invisible light, and a second translucent member housed in the housing space and covering the sensor. The second translucent member has transmittance of visible light lower than that of the first translucent member.Type: GrantFiled: February 12, 2018Date of Patent: September 24, 2019Assignee: KOITO MANUFACTURING CO., LTD.Inventors: Hiroaki Hara, Kazuhito Osada, Nobuyuki Horikawa
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Publication number: 20190245052Abstract: The silicon carbide semiconductor device includes a plurality of unit cells each having an MISFET structure and provided on a silicon carbide semiconductor substrate. A gate upper electrode disposed adjacent to the plurality of unit cells includes a gate pad and gate global wires. When viewed in plan, gate electrodes do not overlap with the gate pad.Type: ApplicationFiled: January 24, 2019Publication date: August 8, 2019Inventors: ATSUSHI OHOKA, NOBUYUKI HORIKAWA, MASAO UCHIDA
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Publication number: 20190244879Abstract: A silicon carbide semiconductor device includes an upper gate electrode including a gate pad and a gate wiring line, and an upper source electrode including first and second source pads. The gate wiring line includes a gate global wiring line extending to encircle the source pads, and a gate connection wiring line. The upper source electrode includes an outer periphery source wiring line extending to encircle the gate global wiring line, and first and second source connections connecting the outer periphery source wiring line to the first and second source pads, respectively. The gate global wiring line includes a first portion, a second portion, and a third portion. The first portion is split at a first substrate corner and a second substrate corner and lies between the first substrate corner and the second substrate corner.Type: ApplicationFiled: January 24, 2019Publication date: August 8, 2019Inventors: ATSUSHI OHOKA, NOBUYUKI HORIKAWA, MASAO UCHIDA
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Publication number: 20190084876Abstract: There is provided a production method of a resin composite module for a vehicle, which includes a resin module substrate, and a silicone-based polymer hard coat which is formed on the resin module substrate. The method includes forming the hard coat by coating a silicone-based polymer onto the resin module substrate, and radiating an ultraviolet ray onto at least a part of a surface of the hard coat such that a hardness thereof becomes 0.8 GPa or more as evaluated by a nanoindentation method. The radiating the ultraviolet ray uses a light source unit which includes a light source and emits an ultraviolet ray having a wavelength of 360 0nm or less from an emission surface thereof and radiates the ultraviolet ray onto the surface of the hard coat while a distance from the emission surface to the surface of the hard coat is 10 mm or less.Type: ApplicationFiled: September 13, 2018Publication date: March 21, 2019Applicant: KOITO MANUFACTURING CO., LTD.Inventors: Nobuyuki HORIKAWA, Yasuaki TSUTSUMI, Masaru KANEKO, Masayuki KOBAYASHI
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Publication number: 20180229645Abstract: A lamp device mounted on a vehicle includes a housing, a first translucent member defining a housing space together with the housing, a lamp unit housed in the housing space and including a light source, a sensor housed in the housing space and configured to detect information outside the vehicle based on invisible light, and a second translucent member housed in the housing space and covering the sensor. The second translucent member has transmittance of visible light lower than that of the first translucent member.Type: ApplicationFiled: February 12, 2018Publication date: August 16, 2018Applicant: KOITO MANUFACTURING CO., LTD.Inventors: Hiroaki Hara, Kazuhito Osada, Nobuyuki Horikawa
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Patent number: 9923090Abstract: In the silicon carbide semiconductor element, a second silicon carbide semiconductor layer that is in contact with the surface of a first silicon carbide semiconductor layer has at least an upper layer including a dopant of a first conductivity type at a high concentration. Above a junction field effect transistor (JFET) region interposed between body regions that are disposed in the first silicon carbide semiconductor layer so as to be spaced from each other, the silicon carbide semiconductor element has a channel removed region, which is a cutout formed by removing a high concentration layer from the front surface side of the second silicon carbide semiconductor layer, the high concentration layer having a higher dopant concentration than at least the dopant concentration of the JFET region. The width of the channel removed region is smaller than that of the JFET region.Type: GrantFiled: January 11, 2017Date of Patent: March 20, 2018Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Atsushi Ohoka, Masao Uchida, Nobuyuki Horikawa, Osamu Kusumoto
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Patent number: 9865591Abstract: A silicon carbide semiconductor device includes a transistor region, a diode region, a gate line region, and a gate pad region. The gate pad region and the gate line region are each disposed to be sandwiched between the diode region and the diode region, and a gate electrode on the gate pad region and the gate line region is formed on an insulating film formed on an epitaxial layer. Thus, breakdown of the insulating film in the gate region can be prevented without causing deterioration in quality of the gate insulating film, upon switching and avalanche breakdown.Type: GrantFiled: November 2, 2016Date of Patent: January 9, 2018Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Nobuyuki Horikawa, Osamu Kusumoto, Masashi Hayashi, Masao Uchida
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Patent number: 9691759Abstract: A semiconductor device includes a first silicon carbide semiconductor layer, a source including a source pad and a source wiring, a gate including a gate pad and a gate wiring, first unit cells disposed in a first element region, and second unit cells disposed in a second element region. In a plan view, the first and second element regions are adjacent to each other with the gate wiring between the first and second element regions. A first electrode including the gate electrode of each first unit cell is disposed in the first element region and electrically connected to the gate. A second electrode including the gate electrode of each second unit cell is disposed in the second element region and not electrically connected to the gate. The first and second electrodes are separated below the gate wiring.Type: GrantFiled: August 30, 2016Date of Patent: June 27, 2017Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Masao Uchida, Nobuyuki Horikawa
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Publication number: 20170125575Abstract: In the silicon carbide semiconductor element, a second silicon carbide semiconductor layer that is in contact with the surface of a first silicon carbide semiconductor layer has at least an upper layer including a dopant of a first conductivity type at a high concentration. Above a junction field effect transistor (JFET) region interposed between body regions that are disposed in the first silicon carbide semiconductor layer so as to be spaced from each other, the silicon carbide semiconductor element has a channel removed region, which is a cutout formed by removing a high concentration layer from the front surface side of the second silicon carbide semiconductor layer, the high concentration layer having a higher dopant concentration than at least the dopant concentration of the JFET region. The width of the channel removed region is smaller than that of the JFET region.Type: ApplicationFiled: January 11, 2017Publication date: May 4, 2017Inventors: ATSUSHI OHOKA, MASAO UCHIDA, NOBUYUKI HORIKAWA, OSAMU KUSUMOTO
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Publication number: 20170098647Abstract: A semiconductor device includes a first silicon carbide semiconductor layer, a source including a source pad and a source wiring, a gate including a gate pad and a gate wiring, first unit cells disposed in a first element region, and second unit cells disposed in a second element region. In a plan view, the first and second element regions are adjacent to each other with the gate wiring between the first and second element regions. A first electrode including the gate electrode of each first unit cell is disposed in the first element region and electrically connected to the gate. A second electrode including the gate electrode of each second unit cell is disposed in the second element region and not electrically connected to the gate. The first and second electrodes are separated below the gate wiring.Type: ApplicationFiled: August 30, 2016Publication date: April 6, 2017Inventors: MASAO UCHIDA, NOBUYUKI HORIKAWA
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Publication number: 20170077087Abstract: A silicon carbide semiconductor device includes a transistor region, a diode region, a gate line region, and a gate pad region. The gate pad region and the gate line region are each disposed to be sandwiched between the diode region and the diode region, and a gate electrode on the gate pad region and the gate line region is formed on an insulating film formed on an epitaxial layer. Thus, breakdown of the insulating film in the gate region can be prevented without causing deterioration in quality of the gate insulating film, upon switching and avalanche breakdown.Type: ApplicationFiled: November 2, 2016Publication date: March 16, 2017Inventors: NOBUYUKI HORIKAWA, OSAMU KUSUMOTO, MASASHI HAYASHI, MASAO UCHIDA
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Patent number: 9252211Abstract: A semiconductor device includes a first silicon carbide semiconductor layer of a first conductive type that is positioned on a front surface of a substrate of the first conductive type, a transistor region that includes transistor cells, a Schottky region, and a boundary region. The boundary region includes a second body region and a gate connector that is arranged on the second body region via an insulating film and electrically connected with a gate electrode. The Schottky region includes a Schottky electrode that is arranged on the first silicon carbide semiconductor layer.Type: GrantFiled: May 15, 2015Date of Patent: February 2, 2016Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Masao Uchida, Osamu Kusumoto, Nobuyuki Horikawa
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Publication number: 20150349051Abstract: A semiconductor device includes a first silicon carbide semiconductor layer of a first conductive type that is positioned on a front surface of a substrate of the first conductive type, a transistor region that includes transistor cells, a Schottky region, and a boundary region. The boundary region includes a second body region and a gate connector that is arranged on the second body region via an insulating film and electrically connected with a gate electrode. The Schottky region includes a Schottky electrode that is arranged on the first silicon carbide semiconductor layer.Type: ApplicationFiled: May 15, 2015Publication date: December 3, 2015Inventors: Masao UCHIDA, Osamu KUSUMOTO, Nobuyuki HORIKAWA
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Patent number: 9172201Abstract: A wavelength conversion laser light source, includes: a solid laser medium; a wavelength conversion element; a concave mirror on which a first reflecting surface reflecting a fundamental light wave and a the second harmonic light wave is formed; and a wavelength plate on which a second reflecting surface reflecting the fundamental light wave and transmitting the second harmonic light wave is formed, wherein a laser resonator is constituted by the first reflecting surface and the second reflecting surface; the solid laser medium is arranged on a first reflecting surface side of the laser resonator, the wavelength plate is arranged on a second reflecting surface side of the laser resonator, and the wavelength conversion element is arranged between the solid laser medium and the wavelength plate; and the wavelength plate outputs the second harmonic wave, to the exterior of the laser resonator, via the second reflecting surface.Type: GrantFiled: February 28, 2012Date of Patent: October 27, 2015Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Hiroyuki Furuya, Tomoya Sugita, Nobuyuki Horikawa
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Patent number: 9029874Abstract: A semiconductor device includes a first cell and a second cell. Each of the first cell and the second cell includes a first silicon carbide semiconductor layer including a first region and a second region provided in the first region, a second silicon carbide semiconductor layer provided on and in contact with the first silicon carbide semiconductor layer, a first ohmic electrode in ohmic contact with the second region, and an insulating film provided on the second silicon carbide semiconductor layer. The first cell includes a gate electrode, and the second cell includes no electrode configured to control the electric potential of the second silicon carbide semiconductor layer independently of the electric potential of the first ohmic electrode.Type: GrantFiled: September 12, 2013Date of Patent: May 12, 2015Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Nobuyuki Horikawa, Masao Uchida, Masahiko Niwayama
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Patent number: 8933466Abstract: In a semiconductor element, a body region of a second conductivity type includes a first body region in contact with a surface of a first silicon carbide semiconductor layer, and a second body region in contact with a bottom surface of the body region of the second conductivity type. The impurity concentration of the first body region is twice or more the impurity concentration of the second body region. A second silicon carbide semiconductor layer of a first conductivity type, which is a channel layer, has an impurity concentration distribution in a direction perpendicular to a semiconductor substrate, and an impurity concentration on a side in contact with the gate insulating film is lower than an impurity concentration on a side in contact with the first body region.Type: GrantFiled: November 1, 2012Date of Patent: January 13, 2015Assignee: Panasonic CorporationInventors: Masao Uchida, Nobuyuki Horikawa, Koutarou Tanaka, Tsutomu Kiyosawa
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Patent number: RE49195Abstract: A silicon carbide semiconductor device includes a transistor region, a diode region, a gate line region, and a gate pad region. The gate pad region and the gate line region are each disposed to be sandwiched between the diode region and the diode region, and a gate electrode on the gate pad region and the gate line region is formed on an insulating film formed on an epitaxial layer. Thus, breakdown of the insulating film in the gate region can be prevented without causing deterioration in quality of the gate insulating film, upon switching and avalanche breakdown.Type: GrantFiled: March 6, 2019Date of Patent: August 30, 2022Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Nobuyuki Horikawa, Osamu Kusumoto, Masashi Hayashi, Masao Uchida