Patents by Inventor Nobuyuki Kurashima
Nobuyuki Kurashima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190017749Abstract: A loop heat pipe includes a first loop heat pipe including a first evaporator, a first condenser, a first liquid pipe, and a first vapor pipe forming a first loop together with the first liquid pipe, a second loop heat pipe including a second evaporator, a second condenser, a second liquid pipe, and a second vapor pipe forming a second loop together with the second liquid pipe, and a connecting part to connect the first condenser and the second evaporator. The first loop and the second loop are separate and independent from each other. The first loop heat pipe, the second loop heat pipe, and the connecting part are integrally formed by a metal.Type: ApplicationFiled: June 29, 2018Publication date: January 17, 2019Inventor: Nobuyuki KURASHIMA
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Publication number: 20190013257Abstract: A heat pipe containing a working fluid includes a first metal layer and a second metal layer. The first metal layer includes an upper surface and bottomed holes depressed from the upper surface. The second metal layer includes a lower surface that is joined with the upper surface of the first metal layer and a recess that is depressed from the lower surface. The recess forms a vapor layer in which vapor vaporized from the working fluid moves. Adjacent bottomed holes are in communication with each other so that the bottomed holes form a liquid layer in which the working fluid liquefied from the vapor moves.Type: ApplicationFiled: June 12, 2018Publication date: January 10, 2019Applicant: Shinko Electric Industries Co., LTD.Inventor: Nobuyuki Kurashima
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Publication number: 20180164043Abstract: A heat pipe includes a first metal layer forming a liquid layer configured to move a working fluid that is liquefied from vapor, and a second metal layer forming a vapor layer configured to move the vapor of the working fluid that is vaporized. The first metal layer includes first cavities that cave in from a first surface of the first metal layer and are arranged apart from each other, second cavities that cave in from a second surface of the first metal layer opposite to the first surface of the first metal layer, first pores partially communicating with the first cavities and the second cavities, respectively, and second pores partially communicating side surfaces of the second cavities that are adjacent to each other. The second metal layer is provided on the first surface of the first metal layer and includes an opening exposing the plurality of first cavities.Type: ApplicationFiled: November 9, 2017Publication date: June 14, 2018Inventors: Nobuyuki KURASHIMA, Yoshihiro MACHIDA
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Publication number: 20180142960Abstract: A loop heat pipe includes an evaporator that vaporizes working fluid; a condenser that condenses the working fluid; a liquid line that connects the evaporator and the condenser; and a vapor line that connects the evaporator and the condenser, wherein the evaporator, the vapor line, the liquid line and the condenser form a flow path that is a loop through which the working fluid or vapor of the working fluid flows, wherein in the condenser and the vapor line, a wall portion of the flow path is constituted by a metal layer, wherein a drain line formed to be separated and apart from the flow path is provided in the wall portion, and wherein a drawing line connecting the drain line and the flow path is provided in the wall portion.Type: ApplicationFiled: October 17, 2017Publication date: May 24, 2018Inventors: Nobuyuki KURASHIMA, Yoshihiro MACHIDA
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Publication number: 20180058767Abstract: A loop heat pipe includes an evaporator that vaporizes working fluid; a condenser that condenses the working fluid; a liquid line that connects the evaporator and the condenser; a vapor line that connects the evaporator and the condenser to form a loop with the liquid line; and a porous body provided in the liquid line, and including a first metal layer that includes a first bottomed hole that is concaved from one surface of the first metal layer, and a second bottomed hole that is concaved from another surface of the first metal layer, the other surface being opposite of the one surface, the first bottomed hole and the second bottomed hole partially communicating with each other to form a pore.Type: ApplicationFiled: August 16, 2017Publication date: March 1, 2018Inventors: Yoshihiro MACHIDA, Nobuyuki KURASHIMA
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Patent number: 9137900Abstract: An electronic component incorporated substrate includes a first substrate and a second substrate electrically connected to each other by a spacer unit. An electronic component is mounted on the first substrate and arranged between the first substrate and the second substrate. A first encapsulating resin is formed between the first substrate and the second substrate to encapsulate the electronic component. A second encapsulating resin is formed on a first surface of the first encapsulating resin to fill a space between the first encapsulating resin and the second substrate. The spacer unit includes a stacked structure of a first solder ball, a metal post, and a second solder ball stacked in a stacking direction of the first substrate and the second substrate.Type: GrantFiled: August 16, 2013Date of Patent: September 15, 2015Assignee: Shinko Electric Industries Co., Ltd.Inventors: Koichi Tanaka, Nobuyuki Kurashima, Hajime Iizuka, Tetsuya Koyama
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Patent number: 9059088Abstract: An electronic component built-in substrate, includes a lower wiring substrate, an electronic component mounted on the lower wiring substrate, an intermediate wiring substrate including an opening portion in which the electronic component is mounted, and arranged in a periphery of the electronic component, and connected to the lower wiring substrate via a first conductive ball, an upper wiring substrate arranged over the electronic component and the intermediate wiring substrate, and connected to the intermediate wiring substrate via a second conductive ball, and a resin filled into respective areas between the lower wiring substrate, the intermediate wiring substrate, and the upper wiring substrate, and sealing the electronic component, wherein the first conductive ball and the second conductive ball are arranged in displaced positions mutually.Type: GrantFiled: July 17, 2013Date of Patent: June 16, 2015Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Nobuyuki Kurashima, Tetsuya Koyama, Hajime Ilzuka, Koichi Tanaka
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Patent number: 9036362Abstract: An electronic component incorporated substrate includes a first substrate and a second substrate that are electrically connected to each other by a spacer unit. An electronic component is mounted on the first substrate and arranged between the first substrate and the second substrate. An encapsulating resin fills a space between the first substrate and the second substrate to encapsulate the electronic component. The spacer unit includes a stacked structure of a metal post and a solder ball stacked in a stacking direction of the first substrate and the second substrate. The spacer unit further includes an insulation layer that is formed on the second substrate and covers a side wall of the metal post.Type: GrantFiled: August 19, 2013Date of Patent: May 19, 2015Assignee: Shinko Electric Industries Co., Ltd.Inventors: Koichi Tanaka, Nobuyuki Kurashima, Hajime Iizuka, Satoshi Shiraki
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Patent number: 8987919Abstract: A built-in electronic component substrate includes a first substrate, an electronic component including side surfaces and mounted on the first substrate, a first resin provided on the first substrate and covering the side surfaces of the electronic component, a second substrate provided above the electronic component and the first resin and layered on the first substrate, a substrate connection member provided between the first and the second substrates and electrically connecting the first and the second substrates, a second resin filling in between the electronic component and the second substrate and in between the first resin and the second substrate, and a third resin filling in between the first and the second substrates and encapsulating the substrate connection member, the electronic component, the first resin, and the second resin.Type: GrantFiled: January 9, 2014Date of Patent: March 24, 2015Assignee: Shinko Electric Industries Co., Ltd.Inventors: Koichi Tanaka, Nobuyuki Kurashima, Hajime Iizuka, Satoshi Shiraki
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Publication number: 20140210109Abstract: A built-in electronic component substrate includes a first substrate, an electronic component including side surfaces and mounted on the first substrate, a first resin provided on the first substrate and covering the side surfaces of the electronic component, a second substrate provided above the electronic component and the first resin and layered on the first substrate, a substrate connection member provided between the first and the second substrates and electrically connecting the first and the second substrates, a second resin filling in between the electronic component and the second substrate and in between the first resin and the second substrate, and a third resin filling in between the first and the second substrates and encapsulating the substrate connection member, the electronic component, the first resin, and the second resin.Type: ApplicationFiled: January 9, 2014Publication date: July 31, 2014Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Koichi TANAKA, Nobuyuki KURASHIMA, Hajime IIZUKA, Satoshi SHIRAKI
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Patent number: 8736053Abstract: A circuit substrate having a mounting surface on which a semiconductor chip is mounted and at least one connection pad formed on the mounting surface is connected to a support plate having at least one mounting portion with a diameter larger than a diameter of the connection pad, through a truncated-cone-shaped solder layer which is formed from at least one solder ball on the basis of a difference between the diameter of the mounting portion and the diameter of the connection pad.Type: GrantFiled: June 19, 2012Date of Patent: May 27, 2014Assignee: Shinko Electric Industries Co., Ltd.Inventors: Koichi Tanaka, Nobuyuki Kurashima, Hajime Iizuka, Tetsuya Koyama
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Publication number: 20140063764Abstract: An electronic component incorporated substrate includes a first substrate and a second substrate that are electrically connected to each other by a spacer unit. An electronic component is mounted on the first substrate and arranged between the first substrate and the second substrate. An encapsulating resin fills a space between the first substrate and the second substrate to encapsulate the electronic component. The spacer unit includes a stacked structure of a metal post and a solder ball stacked in a stacking direction of the first substrate and the second substrate. The spacer unit further includes an insulation layer that is formed on the second substrate and covers a side wall of the metal post.Type: ApplicationFiled: August 19, 2013Publication date: March 6, 2014Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Koichi TANAKA, Nobuyuki KURASHIMA, Hajime IIZUKA, Satoshi SHIRAKI
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Publication number: 20140063768Abstract: An electronic component incorporated substrate includes a first substrate and a second substrate electrically connected to each other by a spacer unit. An electronic component is mounted on the first substrate and arranged between the first substrate and the second substrate. A first encapsulating resin is formed between the first substrate and the second substrate to encapsulate the electronic component. A second encapsulating resin is formed on a first surface of the first encapsulating resin to fill a space between the first encapsulating resin and the second substrate. The spacer unit includes a stacked structure of a first solder ball, a metal post, and a second solder ball stacked in a stacking direction of the first substrate and the second substrate.Type: ApplicationFiled: August 16, 2013Publication date: March 6, 2014Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Koichi Tanaka, Nobuyuki KURASHIMA, Hajime IIZUKA, Tetsuya KOYAMA
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Publication number: 20140054773Abstract: An electronic component built-in substrate, includes a lower wiring substrate, an electronic component mounted on the lower wiring substrate, an intermediate wiring substrate including an opening portion in which the electronic component is mounted, and arranged in a periphery of the electronic component, and connected to the lower wiring substrate via a first conductive ball, an upper wiring substrate arranged over the electronic component and the intermediate wiring substrate, and connected to the intermediate wiring substrate via a second conductive ball, and a resin filled into respective areas between the lower wiring substrate, the intermediate wiring substrate, and the upper wiring substrate, and sealing the electronic component, wherein the first conductive ball and the second conductive ball are arranged in displaced positions mutually.Type: ApplicationFiled: July 17, 2013Publication date: February 27, 2014Inventors: Nobuyuki KURASHIMA, Tetsuya KOYAMA, Hajime IIZUKA, Koichi TANAKA
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Patent number: 8575030Abstract: According to one embodiment, a semiconductor device manufacturing method is disclosed. The method can include polishing a film on a semiconductor substrate by pressing the film against a polishing pad. Polishing the film comprises performing first polishing in which an entrance temperature of the polishing pad is adjusted to 40° C. (inclusive) to 50° C. (inclusive), and an exit temperature of the polishing pad is adjusted to be higher by 5° C. or more than the entrance temperature. Polishing the film comprises performing second polishing in which the entrance temperature is adjusted to 30° C. or less, and the exit temperature is adjusted to be higher by 5° C. or more than the entrance temperature.Type: GrantFiled: August 2, 2011Date of Patent: November 5, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Gaku Minamihaba, Yukiteru Matsui, Nobuyuki Kurashima, Hajime Eda
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Patent number: 8337715Abstract: A CMP slurry for metallic film is provided, which includes water, 0.01 to 0.3 wt %, based on a total quantity of the slurry, of polyvinylpyrrolidone having a weight average molecular weight of not less than 20,000, an oxidizing agent, a protective film-forming agent containing a first complexing agent for forming a water-insoluble complex and a second complexing agent for forming a water-soluble complex, and colloidal silica having a primary particle diameter ranging from 5 to 50 nm.Type: GrantFiled: November 12, 2010Date of Patent: December 25, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Gaku Minamihaba, Dai Fukushima, Nobuyuki Kurashima, Susumu Yamamoto, Hiroyuki Yano
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Publication number: 20120319274Abstract: A circuit substrate having a mounting surface on which a semiconductor chip is mounted and at least one connection pad formed on the mounting surface is connected to a support plate having at least one mounting portion with a diameter larger than a diameter of the connection pad, through a truncated-cone-shaped solder layer which is formed from at least one solder ball on the basis of a difference between the diameter of the mounting portion and the diameter of the connection pad. The resin layer is formed between the mounting surface of the circuit substrate and the support plate and the support plate is subsequently removed, whereby a truncated-cone-shaped via is formed in the resin layer along the truncated-cone-shaped solder layer. A reflow process is thereafter performed, whereby the truncated-cone-shaped solder layer is formed into a spherical solder layer within the truncated-cone-shaped via.Type: ApplicationFiled: June 19, 2012Publication date: December 20, 2012Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Koichi TANAKA, Nobuyuki KURASHIMA, Hajime IIZUKA, Tetsuya KOYAMA
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Patent number: 8174125Abstract: A manufacturing method of a semiconductor device comprises: providing a first insulating film whose relative dielectric constant is at most a predetermined value above a substrate; providing a second insulating film whose relative dielectric constant is greater than the predetermined value on a surface of the first insulating film; forming a recess for a wire through the second insulating film and extending into the first insulating film, and also forming a recess for a dummy wire through the second insulating film and extending into the first insulating film spaced from a formed area of the recess for the wire; providing a conductive material inside the recess for the wire and the recess for the dummy wire; and providing a wire inside the recess for the wire and providing a dummy wire inside the recess for the dummy wire by polishing and removing the conductive material.Type: GrantFiled: March 27, 2009Date of Patent: May 8, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Nobuyuki Kurashima, Gaku Minamihaba, Dai Fukushima, Yoshikuni Tateyama, Hiroyuki Yano
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Publication number: 20120034846Abstract: According to one embodiment, a semiconductor device manufacturing method is disclosed. The method can include polishing a film on a semiconductor substrate by pressing the film against a polishing pad. Polishing the film comprises performing first polishing in which an entrance temperature of the polishing pad is adjusted to 40° C. (inclusive) to 50° C. (inclusive), and an exit temperature of the polishing pad is adjusted to be higher by 5° C. or more than the entrance temperature. Polishing the film comprises performing second polishing in which the entrance temperature is adjusted to 30° C. or less, and the exit temperature is adjusted to be higher by 5° C. or more than the entrance temperature.Type: ApplicationFiled: August 2, 2011Publication date: February 9, 2012Inventors: Gaku MINAMIHABA, Yukiteru Matsui, Nobuyuki Kurashima, Hajime Eda
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Publication number: 20110192420Abstract: In one embodiment, a cleaning apparatus, including, supporting bodies supporting and rotating a substrate, each of a first and a second cleaning member, having a circular shape and rotating around a rotational symmetry axis, periphery portions of the cleaning members being able to contact to opposed surfaces of the substrate, each of a first brush-cleaning member and a second brush-cleaning member having a groove with a V-shape cross section being widened upwards, a brush with a cleaning function being formed on a slope plane of the groove, the cleaning members being able to shift to contact to the slope planes, respectively, first cleaning solution supply portions supplying a first cleaning solution dispersed resin particles to the surfaces, and second cleaning solution supply portions supplying a second cleaning solution to peripheries of the cleaning members and which are arranged to contact to the slope planes, respectively.Type: ApplicationFiled: February 3, 2011Publication date: August 11, 2011Inventors: Nobuyuki KURASHIMA, Gaku Minamihaba