Abstract: A semiconductor device includes a semiconductor layer formed on an insulating layer; a gate electrode disposed on said semiconductor layer via a gate insulating film; a source/drain layer composed by including an alloy layer or a metal layer with a bottom surface in contact with the insulating layer, with joint surfaces to a channel region disposed along crystal orientation faces of said semiconductor layer; and impurity-doped layers formed in a self-aligned manner along interfaces of the alloy layer or the metal layer, and said semiconductor layer.

Abstract: After forming a first gate electrode and a second gate electrode on a semiconductor substrate, a silicon oxide film is formed to cover an n-channel MISFET forming region, and a p-channel MISFET forming region is exposed. Subsequently, after a first element supply film made of, for example, an aluminum oxide film is formed on the whole surface of the semiconductor substrate, a heat treatment is performed. By this means, a high-concentration HfAlO film and a low-concentration HfAlO film are formed by diffusing aluminum into the first insulating film just below the second gate electrode. Thereafter, by using a magnesium oxide film as a second element supply film, magnesium is diffused into the first insulating film just below the first gate electrode, thereby forming a high-concentration HfMgO film and a low-concentration HfMgO film.

Abstract: In a MIS transistor of which gate length is 10 nm or less, a gate insulator comprising a silicon oxide film formed on a silicon substrate and a high-k film formed on the silicon oxide film has a nitrided region including more nitrogen at the lateral side than at the central side in the gate-length direction, and including more nitrogen at the upper side than at the lower side in the film thickness direction. The reliability and characteristics of a MIS transistor using a gate insulator including a high-k (high dielectric constant) film is enhanced.

Abstract: In a MIS transistor of which gate length is 10 nm or less, a gate insulator comprising a silicon oxide film formed on a silicon substrate and a high-k film formed on the silicon oxide film has a nitrided region including more nitrogen at the lateral side than at the central side in the gate-length direction, and including more nitrogen at the upper side than at the lower side in the film thickness direction. The reliability and characteristics of a MIS transistor using a gate insulator including a high-k (high dielectric constant) film is enhanced.

Abstract: In a MIS transistor of which gate length is 10 nm or less, a gate insulator comprising a silicon oxide film formed on a silicon substrate and a high-k film formed on the silicon oxide film has a nitrided region including more nitrogen at the lateral side than at the central side in the gate-length direction, and including more nitrogen at the upper side than at the lower side in the film thickness direction. The reliability and characteristics of a MIS transistor using a gate insulator including a high-k (high dielectric constant) film is enhanced.

Abstract: It is an object of the present invention to provide a technology which can form a sidewall without deteriorating device characteristics. A gate insulating film formed of a high dielectric constant film and a polysilicon film are formed on a semiconductor substrate. By patterning the polysilicon film, silicon gate electrodes are formed. Subsequently, a laminated film of an aluminum oxide film and a silicon nitride film is formed on the semiconductor substrate. Thereafter, the silicon nitride film is anisotropically dry-etched to leave silicon nitride films only on sidewalls of the silicon gate electrodes. At this time, the aluminum oxide film formed under the silicon nitride film functions as an etching stopper. Then, the exposed aluminum oxide film is wet-etched using diluted hydrofluoric acid.

Abstract: A method for forming silicide includes the steps of: forming a nickel film on a silicon layer (or a silicon substrate); introducing nitrogen into at least one of the nickel film and the interface between the nickel film and the silicon layer (or the silicon substrate); and after the introduction of the nitrogen, applying heat treatment to the nickel film and the silicon layer (or the silicon substrate) under predetermined conditions to form a nickel disilicide layer.

Abstract: A semiconductor device includes a semiconductor layer formed on an insulating layer; a gate electrode disposed on said semiconductor layer via a gate insulating film; a source/drain layer composed by including an alloy layer or a metal layer with a bottom surface in contact with the insulating layer, with joint surfaces to a channel region disposed along crystal orientation faces of said semiconductor layer; and impurity-doped layers formed in a self-aligned manner along interfaces of the alloy layer or the metal layer, and said semiconductor layer.

Abstract: A semiconductor device includes a gate electrode disposed on a semiconductor layer via a gate insulating film; a source layer formed in the semiconductor layer to be separated by a first offset length from one end of said gate electrode; a drain layer formed in the semiconductor layer to be separated by a second offset length from the other end of said gate electrode; a first side wall formed at a side wall of said gate electrode at a side of said source layer; and a second side wall formed at the side wall of said gate electrode at a side of said drain layer, wherein the first offset length is shorter than the second offset length, and a length of said first side wall is shorter than a length of said second side wall.

Abstract: A sample processing method for processing a sample by introducing a gas into a vacuum vessel and generating plasma in the vacuum vessel. The sample processing method includes the steps of measuring an intensity of light emitted from a light-emitting diode in the vacuum vessel, at the outside of the vacuum vessel, and monitoring a status of the plasma in accordance with the measured intensity of the light.

Abstract: A method and apparatus for measuring a potential difference for plasma processing with a plasma processing apparatus that processes a sample by introducing a gas into a vacuum chamber and generates plasma. A light-emitting portion is formed on a measurement-use sample of the sample to be processed and a current flows into the light-emitting portion according to a potential difference that has been generated across the light-emitting portion. An intensity of light emitted from the light-emitting portion according to a predetermined light intensity is measured and a potential difference on the measurement-use sample according to a predetermined light intensity is measured.

Abstract: A film of hardly-etched material formed on a substrate is etched using a mask formed on the film of hardly-etched material and a plasma, wherein the film of hardly-etched material is etched using the mask formed with a side wall angled at 90 degrees or less with respect to the surface of the substrate, thereby forming the etched film with a taper angle to the surface of the substrate equal to or larger than the taper angle of the mask.

Abstract: A method and apparatus for measuring a potential difference for plasma processing with a plasma processing apparatus that processes a sample by introducing a gas into a vacuum chamber and generates plasma. A light-emitting portion is formed on a measurement-use sample of the sample to be processed and a current flows into the light-emitting portion according to a potential difference that has been generated across the light-emitting portion. An intensity of light emitted from the light-emitting portion according to a predetermined light intensity is measured and a potential difference on the measurement-use sample according to a predetermined light intensity is measured.

Abstract: The intensity of the light emitted from the light-emitting diode on wafer is measured and then the potential difference between the terminals of the light-emitting element, and the plasma current flowing thereinto are derived from measured light intensity. Since the use of a camera enables non-contact measurement of emitted light intensity, the lead-in terminals for lead wires that are always required in conventional probing methods become unnecessary. In addition, since the target wafer does not require lead wire connection, wafers can be changed in the same way as performed for etching.

Abstract: In a semiconductor device manufacturing method, an ion current density distribution is measured in a plasma processing apparatus. It is then ascertained whether or not the measured distribution is in compliance with an ion current density distribution that becomes a criterion.

Abstract: A wafer is exposed to a plasma. Here, the wafer includes a semiconductor or a conductor 1 provided on an insulator 6, an insulator 2 formed thereon and having a region the thickness of which has been made locally thin, and a 2nd conductor 4 provided on the insulator 2, one of the semiconductor or the conductor 1 and the 2nd conductor 4 having a 1st region from the surface of which a substantially total solid angle is formed, the other having a 2nd region a solid angle formed from the surface of which is made smaller than the 1st region. Then, a voltage is applied to the semiconductor or the conductor 1 and the 2nd conductor 4 so as to measure a time elapsing until the insulator 2 undergoes a dielectric breakdown. Moreover, the ion current density is determined from an electric charge required therefor and an area exposed onto the surface of the 2nd conductor 4.

Abstract: A film of hardly-etched material formed on a substrate is etched using a mask formed on the film of hardly-etched material and a plasma, wherein the film of hardly-etched material is etched using the mask formed with a side wall angled at 90 degrees or less with respect to the surface of the substrate, thereby forming the etched film with a taper angle to the surface of the substrate equal to or larger than the taper angle of the mask.

Abstract: A semiconductor wafer processing apparatus comprises a reaction furnace capable of heating inside thereof, a wafer mount for mounting a semiconductor wafer thereon and a transfer device. The wafermount includes an opening which is greater than the semiconductor wafer and which has a circle shape or a shape substantially similar to an outer periphery of the semiconductor wafer, and includes a wafer supporting portion projecting inwardly of the opening for supporting the semiconductor wafer. The transfer device is capable of holding the wafer mount outside the semiconductor wafer as viewed from a vertical direction, and transferring the wafer mount carrying the semiconductor wafer thereon substantially horizontally into and/or out from the reaction furnace.

Abstract: The intensity of the light emitted from the light-emitting diode 201 on wafer 105 is measured and then the potential difference between the terminals of the light-emitting element, and the plasma current flowing thereinto are derived from measured light intensity. Since the use of a camera enables non-contact measurement of emitted light intensity, the lead-in terminals for lead wires that are always required in conventional probing methods become unnecessary. In addition, since the target wafer does not require lead wire connection, wafers can be changed in the same way as performed for etching.

Abstract: A plasma treatment method and apparatus utilize various gas inlet and outlet structure arrangements to optimize treatment characteristics for a semiconductor wafer. A buffer zone is created between gas inlets and the discharge zone of the vacuum treatment chamber to enhance uniformity of gas flow. The evacuation arrangement enables reactant gas to be exhausted uniformly to reduce gas residence time below a threshold while maintaining optimum flow rates and etch uniformity at low effective exhaust speeds.