Patents by Inventor Nobuyuki Mizunoya

Nobuyuki Mizunoya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6316116
    Abstract: The present invention provides a ceramic circuit board comprising: a ceramic substrate comprising ceramic crystal grains and liquid phase component grains; and a conductive layer to be formed as a circuit integrally formed to the ceramic substrate, wherein the ceramic substrate has a thermal conductivity of 180 W/m·K or more and the ceramic crystal grains have an average grain size of 10 &mgr;m or less. According to the structure described above, there can be provided a ceramic circuit board which has a high thermal conductivity of 180 W/m·K or more, an excellent heat radiating property and a high strength which is capable of reducing crack formation during the assembling and operation of the circuit board, and is capable of reducing short-circuit accident to be occurred in the conductive layer.
    Type: Grant
    Filed: April 12, 2000
    Date of Patent: November 13, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Miho Nakamura, Hideki Sato, Keiichi Yano, Nobuyuki Mizunoya, Tadashi Ishii, Seiko Nagano
  • Patent number: 6284985
    Abstract: The present invention provides a ceramic circuit board including: a ceramic substrate; a plurality of metal circuit plates bonded to a surface of the ceramic substrate; and parts including semiconductor element integrally bonded to a surface of the metal circuit plates through a solder layer, wherein at least peripheral portion of one metal metal circuit plate to which the parts are solder-bonded and is adjacent to the other metal circuit plates is formed with a projection for preventing solder-flow. According to the structure described above, there can be provided a ceramic circuit board which is free from short-circuit due to the solder-flow or bonding defects of the parts thereby to have an excellent operating reliability, and is capable of being easily mass-produced with a high production yield.
    Type: Grant
    Filed: March 24, 2000
    Date of Patent: September 4, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takayuki Naba, Nobuyuki Mizunoya
  • Patent number: 6040039
    Abstract: This invention provides a silicon nitride circuit board in which a metal circuit plate is bonded to a high thermal conductive silicon nitride substrate having a thermal conductivity of not less than 60 W/m K, wherein a thickness D.sub.S of the high thermal conductive silicon nitride substrate and a thickness D.sub.M of the metal circuit plate satisfy a relational formula D.sub.S .ltoreq.2D.sub.M. The silicon nitride circuit board is characterized in that, when a load acts on the central portion of the circuit board which is held at a support interval of 50 mm, a maximum deflection is not less than 0.6 mm until the silicon nitride substrate is broken. The silicon nitride circuit board is characterized in that, when an anti-breaking test is performed to the circuit board which is held at a support interval of 50 mm, an anti-breaking strength is not less than 500 MPa.
    Type: Grant
    Filed: November 14, 1997
    Date of Patent: March 21, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuo Ikeda, Hiroshi Komorita, Yoshitoshi Sato, Michiyasu Komatsu, Nobuyuki Mizunoya
  • Patent number: 5998000
    Abstract: This invention provides a silicon nitride circuit board in which a metal circuit plate is bonded to a high thermal conductive silicon nitride substrate having a thermal conductivity of not less than 60 W/m K, wherein a thickness D.sub.s of the high thermal conductive silicon nitride substrate and a thickness D.sub.M of the metal circuit plate satisfy a relational formula D.sub.s .ltoreq.2D.sub.M. The silicon nitride circuit board is characterized in that, when a load acts on the central portion of the circuit board which is held at a support interval of 50 mm, a maximum deflection is not less than 0.6 mm until the silicon nitride substrate is broken. The silicon nitride circuit board is characterized in that, when an anti-breaking test is performed to the circuit board which is held at a support interval of 50 mm, an anti-breaking strength is not less than 500 MPa.
    Type: Grant
    Filed: November 14, 1997
    Date of Patent: December 7, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuo Ikeda, Hiroshi Komorita, Yoshitoshi Sato, Michiyasu Komatsu, Nobuyuki Mizunoya
  • Patent number: 5928768
    Abstract: This invention provides a silicon nitride circuit board in which a metal circuit plate is bonded to a high thermal conductive silicon nitride substrate having a thermal conductivity of not less than 60 W/m K, wherein a thickness D.sub.s of the high thermal conductive silicon nitride substrate and a thickness D.sub.M of the metal circuit plate satisfy a relational formula D.sub.s .ltoreq.2D.sub.M. The silicon nitride circuit board is characterized in that, when a load acts on the central portion of the circuit board which is held at a support interval of 50 mm, a maximum deflection is not less than 0.6 mm until the silicon nitride substrate is broken. The silicon nitride circuit board is characterized in that, when an anti-breaking test is performed to the circuit board which is held at a support interval of 50 mm, an anti-breaking strength is not less than 500 MPa.
    Type: Grant
    Filed: September 4, 1996
    Date of Patent: July 27, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuo Ikeda, Hiroshi Komorita, Yoshitoshi Sato, Michiyasu Komatsu, Nobuyuki Mizunoya
  • Patent number: 5744410
    Abstract: A high thermal conductive silicon nitride sintered body of this invention is characterized by containing more than 7.5 wt % to at most 17.5 wt % of a rare earth element in terms of the amount of an oxide thereof, if necessary, at most 1.0 wt % of at least one of aluminum nitride and alumina, if necessary, 0.1-3.0 wt % of at least one compound selected from the group consisting of oxides, carbides, nitrides, silicides and borides of Ti, Zr, Hf, V, Nb, Ta, Cr, Mo and W, and at most 0.3 wt % of Li, Na, K, Fe, Ca, Mg, Sr, Ba, Mn and B as impurity cationic elements in terms of total amount thereof, containing a .beta.-type silicon nitride crystal and a grain boundary phase. The sintered body has a ratio of a crystal compound phase in the grain boundary phase to the entire grain boundary phase of at least 20%, a porosity of at most 2.5% by volume, a thermal conductivity of at least 80 W/m.multidot.K and a three-point bending strength of at least 650 MPa at a room temperature.
    Type: Grant
    Filed: October 4, 1996
    Date of Patent: April 28, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Michiyasu Komatsu, Kazuo Ikeda, Nobuyuki Mizunoya, Yoshitoshi Sato, Tatsuya Imaizumi, Kazuyuki Kondo
  • Patent number: 5363278
    Abstract: A bonded ceramic-metal composite substrate comprising a ceramic substrate having opposite surfaces and a copper sheet having a face directly bonded to one of the surfaces of the ceramic substrate, characterized in that the Vickers hardness of the copper sheet lies in the range from 40 kg/mm.sup.2 to 100 kg/mm.sup.2.
    Type: Grant
    Filed: May 28, 1992
    Date of Patent: November 8, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Komorita, Nobuyuki Mizunoya
  • Patent number: 5328751
    Abstract: This invention provides a ceramic circuit board comprising: a ceramic base board; a metal circuit plate integrally bonded onto a surface of the ceramic base board; a terminal connecting port formed by bending a part of the metal circuit plate for connecting a terminal of a module, the terminal connecting port being formed so that the terminal connecting port is raised from a surface of the ceramic base board, and a curvature radius of the bent portion provided on the terminal connecting port is set to 0.2 mm or more. An empty communication hole such as groove or through hole may also be formed at a bonding surface between the metal circuit plate and the ceramic base board.
    Type: Grant
    Filed: July 10, 1992
    Date of Patent: July 12, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Komorita, Nobuyuki Mizunoya, Kazuo Matsumura, Kazuo Ikeda, Takayuki Naba, Tadashi Tanaka
  • Patent number: 5165983
    Abstract: When molded plates of aluminum nitride obtained by molding a ceramic powder formed preponderantly of aluminum nitride powder are superposed on a support base with a ceramic powder interposed between the support base and the superposed plates and between the superposed plates and are fired in a non-oxidative atmosphere, the sintered plates consequently produced are prevented from sustaining crack or fracture.When warped and undulated sintered plates of aluminum nitride are superposed on a support base with a ceramic powder interposed between the support base and the superposed plates and between the superposed plates and are heated in a non-oxidative atmosphere, the heated plates are relieved of warp and undulation.The sintered plates of aluminum nitride are enabled to acquire improved adhesiveness to a metal film or foil when they are subjected to a heat treatment adapted to reduce the surface roughness to or below 10 .mu.m (Rmax).
    Type: Grant
    Filed: January 28, 1991
    Date of Patent: November 24, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuyuki Sugiura, Nobuyuki Mizunoya
  • Patent number: 5155665
    Abstract: A bonded ceramic-metal composite substrate comprising a ceramic substrate having opposite surfaces and a copper sheet having a face directly bonded to one of the surfaces of the ceramic substrate, characterized in that the Vickers hardness of the copper sheet lies in the range from 40 kg/mm.sup.2 to 100 kg/mm.sup.2.
    Type: Grant
    Filed: March 16, 1989
    Date of Patent: October 13, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Komorita, Nobuyuki Mizunoya
  • Patent number: 5063121
    Abstract: Disclosed is:i) a nitride type ceramic substrate comprises; a nitride type ceramic sintered sheet; a conductive metallized layer formed on the nitride type ceramic sintered sheet; and a layer of a compound containing yttria and alumina, present in the vicinity of the interface between the nitride type ceramic sintered sheet and the metallized layer;ii) a circuit substrate comprises; a substrate comprising a nitride type ceramic sintered sheet; a metallized layer comprising molybdenum and tungsten as a main component and an activation metal added thereto formed on the substrate; and a layer of a compound containing yttria and alumina, present inside of the metallized layer and in the vicinty of the interface between the substrate and the metallized layer;iii) a surface conductive ceramic substrate which is characterized by comprising; a nitride type ceramic substrate; and a conductive metallized layer chiefly comprised of at least one of Mo and W, a group IVa active metal element and a fourth period transition
    Type: Grant
    Filed: September 22, 1989
    Date of Patent: November 5, 1991
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideki Sato, Nobuyuki Mizunoya, Hironori Asai, Kazuo Anzai, Tsuyoshi Hatano
  • Patent number: 4987677
    Abstract: A bonded ceramic-metal composite substrate comprising a ceramic substrate having opposite surfaces and a copper sheet having a face directly bonded to one of the surfaces of the ceramic substrate, wherein the median surface roughness (R.sub.a) of the outer surface of the copper sheet is not greater than 3 .mu.m, and the maximum surface roughness (R.sub.max) of the outer surface of the copper sheet is not greater than 18 .mu.m. The invention improves the manufacturing reliability of various electronic devices such as semiconductor modules.
    Type: Grant
    Filed: February 26, 1990
    Date of Patent: January 29, 1991
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tadashi Tanaka, Kazuo Matsumura, Hiroshi Komorita, Nobuyuki Mizunoya
  • Patent number: 4959507
    Abstract: A bonded ceramic-metal composite substrate comprising a ceramic substrate having opposite surfaces and a copper sheet having a face directly bonded to one of the surfaces of the ceramic substrate, wherein the median surface roughness (R.sub.a) of the outer surface of the copper sheet is not greater than 3 .mu.m, and the maximum surface roughness (R.sub.max) of the outer surface of the copper sheet is not greater than 18 .mu.m. The invention improves the manufacturing reliability of various electronic devices such as semiconductor modules.
    Type: Grant
    Filed: April 25, 1989
    Date of Patent: September 25, 1990
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tadashi Tanaka, Kazuo Matsumura, Hiroshi Komorita, Nobuyuki Mizunoya
  • Patent number: 4954386
    Abstract: A joined ceramic-metal composite substrate having a copper sheet directly joined to a ceramic substrate and a method for the production thereof. The composite substrate is characterized by having at least one through hole in the copper sheet which is connected to at least one groove formed at a distance from the edge of the copper sheet on the surface of the copper sheet to be joined to the ceramic substrate.
    Type: Grant
    Filed: December 8, 1988
    Date of Patent: September 4, 1990
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuyuki Mizunoya, Hiroshi Komorita, Tadashi Tanaka, Kazuo Matsumura
  • Patent number: 4906511
    Abstract: Disclosed is an aluminum nitride circuit board which is advantageously used as a carrier for a part emitting a large volume of heat, the substrate of the circuit board is a sintered aluminum nitride substrate which comprises a basal part and projection rising from the basal part and offering a surface for application of a metallizing composition, a metallized layer thereof is formed on the upper side of the projection by applying the metallizing composition thereon and forming the applied layer of the composition by firing, the metallizing composition applied on the upper side of the projection is prevented from sagging down the lateral side of the basal part owing to the step formed with the projection and the basal part, the preclusion of the otherwise inevitable sagging of the composition contributes greatly to improving the circuit board's voltage withstanding property.
    Type: Grant
    Filed: September 29, 1988
    Date of Patent: March 6, 1990
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideki Sato, Masakazu Hatori, Nobuyuki Mizunoya
  • Patent number: 4901137
    Abstract: Disclosed is an electronic apparatus wherein a large power consumption type semiconductor device is mounted on a ceramic substrate of sintered aluminum nitride with high thermal conductivity for improving a heat dissipation effect. The electronic apparatus is, for example, an ignitor. The aluminum nitride-made ceramic substrate having the semiconductor device is provided in a metallic vessel made of aluminum or the like. Employed is a thermal stress strain-resistant adhesive agent with high thermal conductivity such as a silicone type adhesive agent for bonding. The thermal stress strain-resistant adhesive agent layer serves as a cushioning layer for a heating and cooling cycle and therefore improves a heat cycle resistance.
    Type: Grant
    Filed: July 28, 1988
    Date of Patent: February 13, 1990
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideki Sato, Nobuyuki Mizunoya
  • Patent number: 4883704
    Abstract: One aspect of the present invention is directed to an aluminum nitride ceramic substrate which comprises an aluminum nitride ceramic sheet and a conductive metallized layer formed thereon. The metallized layer comprises molybdenum and/or tungsten and contains a compound containing yttria and alumina in the vicinity of the interface between the aluminum nitride ceramic sintered sheet and the conductive metallized layer.
    Type: Grant
    Filed: March 29, 1988
    Date of Patent: November 28, 1989
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideki Sato, Nobuyuki Mizunoya, Hironori Asai, Kazuo Anzai, Tsuyoshi Hatano
  • Patent number: 4873151
    Abstract: Disclosed is an aluminum nitride circuit substrate comprising an aluminum nitride plate and a conductive material bonded to the aluminum nitride plate through a metallized layer formed on the bonding surface of the aluminum nitride plate, the conductive material being of a metallic material which has a thermal expansion coefficient of 2.times.10.sup.-6 to 6.times.10.sup.-6 /.degree.C.The aluminum nitride circuit substrate according to this invention is free from the generation of crack caused by the difference of the thermal expansion coefficients of AlN plate and a conductive material bonded to the AlN plate to improve the reliability of the elements.
    Type: Grant
    Filed: July 8, 1987
    Date of Patent: October 10, 1989
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideki Sato, Nobuyuki Mizunoya
  • Patent number: 4849292
    Abstract: A laminated body comprising a ceramic member and a metal member, and a method of forming the laminated body are described. The laminated body is characterized in that the ceramic member contains in its surface portion a bonding agent and the metal member is directly bonded to the surface of the ceramic member. The method of forming the laminated body is characterized in that a bonding agent-containing layer is first formed in the surface of the ceramic member and then the bonding agent-containing layer is heated while being contacted with the metal member.
    Type: Grant
    Filed: April 22, 1987
    Date of Patent: July 18, 1989
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Nobuyuki Mizunoya, Hajime Kohama, Yasuyuki Sugiura
  • Patent number: 4835065
    Abstract: Disclosed is a circuit substrate comprising an alumina plate and an aluminum nitride plate bonded to the alumina plate through metallized layers formed on the respective bonding surfaces of the alumina plate and the aluminum nitride plate and a buffering layer provided between the metallized layers, the buffering layer being of a metallic material(a) which undergoes plastic deformation by recrystallization at a temperature of not higher than 500.degree. C.,(b) which has a tensile strength of not higher than 35 kg.f/mm.sup.2 at a temperature of 500.degree. C., and(c) which has an elongation of not less than 10% at a temperature of 500.degree. C.The circuit substrate of this invention can provide a circuit substrate being excellent in heat dissipating characteristic and free from the generation of crack on an operation.
    Type: Grant
    Filed: July 8, 1987
    Date of Patent: May 30, 1989
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideki Sato, Nobuyuki Mizunoya