Patents by Inventor Nobuyuki Mizunoya

Nobuyuki Mizunoya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4770953
    Abstract: For higher thermal conductivity, stronger adhesion strength, excellent insulating characteristics, and multilayer interconnection, an aluminium sintered body for circuit substrates comprises a novel conductive metallized layer on the surface of the sintered body. The metallized layer comprises at least one element selected from the first group of Mo, W and Ta and at least one element selected from the second group of IIa, III, IVa group elements, lanthanide elements, and actinide elements in the periodic table, as the conductive phase element. The first group element serves to improve the heat conductivity and resistance, while the second group serves to increase the wetness and adhesion strength between the insulating body and the metallized layer. Further, the plural insulating ceramic bodies and the plural metallized conductive layers can be sintered simultaneously being stacked one above the other to permit a multilayer interconnection.
    Type: Grant
    Filed: February 19, 1987
    Date of Patent: September 13, 1988
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akihiro Horiguchi, Mituo Kasori, Fumio Ueno, Hideki Sato, Nobuyuki Mizunoya, Mitsuyoshi Endo, Shun-ichiro Tanaka, Kazuo Shinozaki
  • Patent number: 4761345
    Abstract: There is disclosed an aluminum nitride substrate which comprises a substrate composed of an aluminum nitride sintered product; an electroconductive metallized layer composed of titanium nitride and at least one selected from the group consisting of molybdenum, tungsten, tantalum, an element in group III of the periodic table, an element in group IVa of the same, a rare earth element, an actinide element and a compound containing these elements; and an electroconductive protective layer laminated in this order on the aluminum nitride sintered product.
    Type: Grant
    Filed: February 20, 1987
    Date of Patent: August 2, 1988
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideki Sato, Nobuyuki Mizunoya, Mitsuhiro Nagata
  • Patent number: 4704320
    Abstract: This invention resides in a substrate structure comprising a ceramic tile, a conductor layer of copper or copper alloy directly joined to the surface of the ceramic tile, and an outgoing terminal connected to the conductor layer, which substrate structure is characterized by the fact that the part of the conductor layer to which the aforementioned outgoing terminal is joined is raised from the ceramic tile so as to bridge an empty space.
    Type: Grant
    Filed: January 31, 1986
    Date of Patent: November 3, 1987
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuyuki Mizunoya, Yasuyuki Sugiura, Masakazu Hatori
  • Patent number: 4693409
    Abstract: A laminated body comprising a ceramic member and a metal member, and a method of forming the laminated body are described. The laminated body is characterized in that the ceramic member contains in its surface portion a bonding agent and the metal member is directly bonded to the surface of the ceramic member. The method of forming the laminated body is characterized in that a bonding agent-containing layer is first formed in the surface of the ceramic member and then the bonding agent-containing layer is heated while being contacted with the metal member.
    Type: Grant
    Filed: February 4, 1985
    Date of Patent: September 15, 1987
    Assignee: Tokyo Shibarua Denki Kabushiki Kaisha
    Inventors: Nobuyuki Mizunoya, Hajime Kohama, Yasuyuki Sugiura
  • Patent number: 4542073
    Abstract: A ceramic bonded structure with a high bonding strength has a first member of a ceramic, a ceramic-modified bonding layer formed on at least a bonding surface of the first member by a thermal treatment, a metal layer formed on the ceramic-modified bonding layer, and a second member of a ceramic or metal bonded with the first member through the metal layer.
    Type: Grant
    Filed: April 12, 1984
    Date of Patent: September 17, 1985
    Assignees: Thomson CSF, Compagnie d'Electronique et de Piezo-Electricite
    Inventors: Shun-ichiro Tanaka, Nobuyuki Mizunoya, Shigeo Abe
  • Patent number: 4540462
    Abstract: A method for manufacturing a semiconductor substrate. A copper sheet is placed on a surface of a ceramic plate and bonded thereto. A circuit pattern is then formed on the copper sheet by an etching process.
    Type: Grant
    Filed: December 6, 1983
    Date of Patent: September 10, 1985
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Nobuyuki Mizunoya, Hajime Kohama, Yasuyuki Sugiura