Abstract: A semiconductor device having a multi-layered wiring structure containing a copper layer, comprises a first insulating film formed over a semiconductor substrate, a first copper pattern buried in the first insulating film, a cap layer formed on the first copper pattern and the first insulating film and made of a substance a portion of which formed on the first copper pattern has a smaller electrical resistance value than a portion formed on the first insulating film, second insulating films formed on the cap layer, and a second copper pattern buried in a hole or a trench, which is formed in the second insulating films on the first copper pattern, and connected electrically to the first copper pattern via the cap layer.

Abstract: A method of manufacturing a semiconductor device including the steps of: (a) preparing a semiconductor substrate formed with an insulating layer having a wiring recess; and (b) forming a conductive layer by chemical vapor deposition on a surface of the semiconductor substrate including an inner surface of the wiring recess, while lamp light is applied to the semiconductor substrate, the conductive layer being substantially made of copper. With this method, Cu wiring having a high adhesion force is formed by chemical vapor deposition.

Abstract: A semiconductor device comprises of an insulating film (14) formed over a semiconductor substrate (1), a trench (14b) and a hole (14a) formed in the insulating film (14), a first underlying layer (16) formed in at least one of the trench (14b) and the hole (14a) and made of conductive material to prevent diffusion of copper, a main conductive layer (19) formed in at least one of the trench (14b) and the hole (14a) on the first underlying layer (19) and made of copper or copper alloy, and a second underlying layer (17) formed between the main conductive layer (19) and the first underlying layer (16) and having a metal element that is solid-solved in the main conductive layer at an interface between the second underlying layer (17) and the main conductive layer (19), and formed on the first underlying layer (16) by a CVD method.

Abstract: A multilayer interconnection structure that offers a fast semiconductor operation is realized by employing copper wiring, electro migration of which is prevented from occurring by providing a via plug that includes a layer of a high melting-point metal, such as tungsten.

Abstract: A semiconductor device having a multi-layered wiring structure containing a copper layer, comprises a first insulating film formed over a semiconductor substrate, a first copper pattern buried in the first insulating film, a cap layer formed on the first copper pattern and the first insulating film and made of a substance a portion of which formed on the first copper pattern has a smaller electrical resistance value than a portion formed on the first insulating film, second insulating films formed on the cap layer, and a second copper pattern buried in a hole or a trench, which is formed in the second insulating films on the first copper pattern, and connected electrically to the first copper pattern via the cap layer.

Abstract: A curable resin composition comprising: (1) a compound having a structure of the formula (A) and/or (B): R2—OOC—R1—COO—R2′  (A)  wherein R1 is —(CH2)n— (wherein n is from 4 to 6), or an o-, m- or p-phenylene group, and each of R2 and R2′ is a C1-10 alkyl group,  wherein R3 is a C1-4 alkyl group, (2) a polymerizable vinyl monomer, (3) an organic peroxide, (4) a reducing agent, and (5) an elastomer component.

Abstract: A method of manufacturing a semiconductor device has the steps of: (a) preparing a semiconductor substrate formed with an insulating layer having a wiring recess; and (b) forming a conductive layer by chemical vapor deposition on a surface of the semiconductor substrate including an inner surface of the wiring recess, while lamp light is applied to the semiconductor substrate, the conductive layer being substantially made of copper. With this method, Cu wiring having a high adhesion force is formed by chemical vapor deposition.

Abstract: An interlayer insulation film is deposited on a substrate in which a semiconductor element has been formed. A wiring groove is formed in the interlayer insulation film. A barrier layer, made of a material which prevents the diffusion of Cu atoms, is formed on at least the inner surface of the wring groove and the upper surface of the interlayer insulation film. A seed layer, made of Cu which contains an impurity, -is deposited on the barrier layer. By way of plating, a conductive layer made of Cu is deposited on the seed layer so as to fill the wiring groove. The substrate is heated to precipitate the impurity, contained in the seed layer, on at least an interface between the seed layer and the barrier layer. The conductive layer, the seed layer and the barrier layer are removed until the upper surface of the interlayer insulation film appears, thus performing surface planarization.

Abstract: A process of growing a conductive layer on a substrate by a chemical reaction of a source gas on the substrate includes preparing a substrate having an area covered with a coating layer of a material different from a material of the substrate and an area not covered with the coating layer; supplying a first source gas onto the substrate and causing a chemical reaction of the first source gas to occur on the substrate only in the area not covered with the coating layer, thereby selectively growing a first conductive layer on the substrate only in the area not covered with the coating layer; terminating the supplying of the first source gas; and supplying a second source gas onto the substrate and causing a chemical reaction of the second source gas to occur on both of the first conductive layer and the coating layer, thereby unselective growing a second conductive layer of the same conductive material as the first conductive layer, on both of the first conductive layer and the coating layer.

Abstract: A semiconductor device having: an underlie having a semiconductor surface capable of growing thereon single crystal; and a first semiconductor layer, the first semiconductor layer including: a first region of group III-V compound semiconductor epitaxially grown on generally the whole area of the semiconductor surface; and second regions of group III-V compound semiconductor disposed and scattered in the first region, the second region having a different composition ratio of constituent elements from the first region, wherein lattice constants of the first and second regions in no strain state differ from a lattice constant of the semiconductor surface, and a difference between the lattice constant of the second region in no strain state and the lattice constant of the semiconductor surface is greater than a difference between the lattice constant of the first region in no strain state and the lattice constant of the semiconductor surface.

Abstract: A semiconductor device having: an underlie having a semiconductor surface capable of growing thereon single crystal; and a first semiconductor layer, the first semiconductor layer including: a first region of group III-V compound semiconductor epitaxially grown on generally the whole area of the semiconductor surface; and second regions of group III-V compound semiconductor disposed and scattered in the first region, the second region having a different composition ratio of constituent elements from the first region, wherein lattice constants of the first and second regions in no strain state differ from a lattice constant of the semiconductor surface, and a difference between the lattice constant of the second region in no strain state and the lattice constant of the semiconductor surface is greater than a difference between the lattice constant of the first region in no strain state and the lattice constant of the semiconductor surface.

Abstract: A method of growing a gallium arsenide single crystal layer on a silicon substrate comprises steps of growing a buffer layer of aluminium arsenide on the silicon substrate by atomic layer epitaxy, and growing the gallium arsenide single crystal layer on the buffer layer epitaxially.

Abstract: A method of growing a gallium arsenide single crystal layer on a silicon substrate comprises steps of growing a buffer layer of aluminium arsenide on the silicon substrate by atomic layer epitaxy, and growing the gallium arsenide single crystal layer on the buffer layer epitaxially.

Abstract: A compound semiconductor crystal growing method includes the steps of (a) setting a substrate having a substrate surface in a reaction chamber, and (b) supplying a material gas of a compound semiconductor which is to be grown in the form of a crystal on the substrate surface within the reaction chamber and a control gas to the reaction chamber under a predetermined condition, and controlling the supply of the control gas to control an adsorption rate of the material gas on the substrate surface. The control gas makes competitive adsorption with the material gas on the substrate surface but makes no chemical reaction such that no continual accumulation on the substrate surface occurs under the predetermined condition. The competitive adsorption is defined as a phenomenon in which the material gas and the control gas compete and become adsorped on the substrate surface.

Abstract: A method of growing compound semiconductor epitaxial layer by an atomic layer epitaxy, comprises the steps of blowing on a predetermined surface a compound source material gas constituted by atoms having an ion polarity different from atoms constituting the predetermined surface so that the compound source material is adsorped on the predetermined surface in a non-decomposed state, and decomposing the adsorped compound source material on the predetermined surface into atoms constituting crystals at the predetermined surface so as to grow an atomic layer of atoms having the same ion polarity as the compound source material gas. The ion polarity of the atomic layer prevents adsorption of the compound source material after the atomic layer is grown.

Abstract: A method of growing a gallium arsenide single crystal layer on a silicon substrate comprises steps of growing a buffer layer of aluminum arsenide on the silicon substrate by atomic layer epitaxy, and growing the gallium arsenide single crystal layer on the buffer layer epitaxially.

Abstract: A method of growing a group III-V compound semiconductor epitaxial layer on a substrate by use of atomic layer epitaxy grows an aluminum layer on one of {100}, (111)B, ( 111)B, (111)B, and (111)B planes of the substrate by supplying a quantity of aluminum amounting to at least two times a surface density in a group III-V compound semiconductor epitaxial layer or grows an aluminum layer on one of {110} planes of the substrate by supplying a quantity of aluminum amounting to at least three times the surface density in the group III-V compound semiconductor epitaxial layer, and grows a layer of a group V material on the aluminum layer by supplying a quantity of the group V material amounting to at least two or three times a surface density in the group III-V compound semiconductor epitaxial layer. The layer of the group V material and the aluminum layer constituting the group III-V compound semiconductor epitaxial layer.