Patents by Inventor Nobuyuki Sato

Nobuyuki Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140242653
    Abstract: A method for producing pyruvic acid from polysaccharide alginic acid that is contained in large amounts in brown algae using the ability to assimilate alginic acid possessed by a lactate-dehydrogenase-gene-deficient Sphingomonas sp. A1 strain (ldh strain) is provided. The method for producing pyruvic acid comprises culturing the lactate-dehydrogenase-gene-deficient Sphingomonas sp. A1 strain (ldh strain) in a medium containing alginic acid, and causing the strain to produce pyruvic acid from alginic acid and then to secrete pyruvic acid into the medium.
    Type: Application
    Filed: February 25, 2014
    Publication date: August 28, 2014
    Applicants: MARUHA NICHIRO FOODS, INC., KYOTO UNIVERSITY
    Inventors: KOUSAKU MURATA, SHIGEYUKI KAWAI, NOBUYUKI SATO
  • Patent number: 8801829
    Abstract: Process for the production of valve metal powders, in particular niobium and tantalum powder, by reduction of corresponding valve metal oxide powders by means of vaporous reducing metals and/or hydrides thereof, preferably in the presence of an inert carrier gas, wherein the reduction is performed at a vapor partial pressure of the reducing metal/metal hydride of 5 to 110 hPa and an overall pressure of less than 1000 hPa, and tantalum powder obtainable in this way having a high stability of the powder agglomerate particles.
    Type: Grant
    Filed: October 22, 2010
    Date of Patent: August 12, 2014
    Assignee: H. C. Starck GmbH & Co. KG
    Inventors: Helmut Haas, Ulrich Bartmann, Tadashi Komeya, Nobuyuki Sato
  • Publication number: 20140209999
    Abstract: A semiconductor device includes a first conductivity-type drain layer, a first conductivity-type drift layer formed on the drain layer, a second conductivity-type base layer formed on the drift layer, a first conductivity-type source layer which is selectively formed on a surface of the base layer, a trench region formed through a surface of the source layer such that the trench region reaches the drift layer from the surface of the source layer, a gate electrode formed adjacent to the base layer and inside the trench region, and surrounded by a first insulation film, a field plate electrode formed in the trench region below the gate electrode and surrounded by a second insulation film having a higher dielectric constant than the first insulation film, a drain electrode which is electrically connected to the drain layer, and a source electrode electrically connected to the source layer.
    Type: Application
    Filed: June 26, 2013
    Publication date: July 31, 2014
    Inventors: Nobuyuki SATO, Kentaro ICHINOSEKI
  • Publication number: 20140170379
    Abstract: The present invention provides a film for forming which exhibits both excellent dimensional stability in processing and excellent formability as well as excellent appearance of surfaces and can thus be suitably applied to a variety of forming members through forming and used in forming decoration applications. Provided is a film for forming comprising a cyclic olefin-based resin as a main component, wherein the storage modulus at 120° C. is 101 MPa to 3,000 MPa and the storage modulus at 170° C. is 100 MPa or less.
    Type: Application
    Filed: August 1, 2012
    Publication date: June 19, 2014
    Applicant: TORAY INDUSTRIES, INC.
    Inventors: Isao Manabe, Mitsutaka Sakamoto, Kozo Takahashi, Toshiya Ieki, Nobuyuki Sato, Shinji Takauchi
  • Publication number: 20140126922
    Abstract: An image forming apparatus includes a heating element that generates heat, a temperature detector that detects a temperature of the heating element, a resistor that divides a detection result of the temperature detector and a predetermined reference voltage, a disconnection detector that detects a disconnection of the temperature detector, a converter that converts the divided voltage value into a digital signal and outputs the digital signal to a controller, a comparing unit that inverts its output on the basis of a predetermined threshold, a delay circuit that delays an increase in an output voltage of the comparing unit, a discharge circuit that quickly discharges the output voltage of the comparing unit, a latch circuit connected to an output of the discharge circuit, and a power supply path connecting and disconnecting unit that is connected to the latch circuit and connects and disconnects a power supply path to the heating element.
    Type: Application
    Filed: May 15, 2013
    Publication date: May 8, 2014
    Applicant: Fuji Xerox Co., Ltd.
    Inventors: Kazuki IMAHORI, Nobuyuki SATO
  • Publication number: 20130273251
    Abstract: An annealing and manufacturing method of hot-dip galvanized steel strips includes suppression of oxide formation of elements in the steel strips. An annealing furnace includes a heating zone, a soaking zone, and a cooling zone in which a portion of gas is introduced to decrease the gas dew point. A gas suction rate Qo1 in a portion of the cooling zone, a gas suction rate Qo2 in an upper portion and a gas feed rate Qi2 in a lower portion of the soaking zone, a gas feed rate Qi1 in a connection part between the soaking and cooling zones, an atmosphere gas supply rate Qf1 into the cooling zone and its subsequent zone, an atmosphere gas supply rate Qf2 into the soaking zone, an internal volume Vs of the soaking zone, and an average furnace temperature Ts of the soaking zone satisfy relationships including 0.3×Qf1<Qo1.
    Type: Application
    Filed: December 13, 2011
    Publication date: October 17, 2013
    Applicant: JFE STEEL CORPORATION
    Inventors: Hideyuki Takahashi, Nobuyuki Sato, Kazuki Nakazato, Masato Iri
  • Publication number: 20130113039
    Abstract: A semiconductor device provides a MOSFET having first and second regions. In the first region, a plurality of unit cells of the MOSFET device are provided. At the end of the plurality of the unit cells, a termination cell is provided. An n type layer underlies the unit cells, between the unit cells and an underlying electrode. In the unit cell region, this n doped layer is dually doped with impurities at two different densities, whereas, adjacent the termination cell, a different paradigm is provided. In one aspect, only one of the two n doped layers extends along a side of the termination cell. In a second aspect, the termination unit is in contact with an oppositely doped layer as compared to the impurities in the dual doped layer. In this way, breakdown voltage may be maintained while on-resistance is simultaneously reduced.
    Type: Application
    Filed: September 7, 2012
    Publication date: May 9, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Takeru MATSUOKA, Kentaro ICHINOSEKI, Shigeaki HAYASE, Nobuyuki SATO
  • Patent number: 8435413
    Abstract: A method of controlling the concentration of P of cleaning solution waste water starts by providing a waste water buffer tank capable of either sending the waste water to a waste water treatment plant or storing the waste water after the waste water is accepted. The concentration of P in the cleaning solution is set within a target concentration range, and matter to be treated is treated. The concentration of P in the waste water is measured in the waste water buffer tank. When the measured value of the concentration of P is less than a selected upper limit, the waste water is sent from the waste water buffer tank to the waste water treatment plant. When the measured value of the concentration of P is higher than the selected upper limit, sending the waste water to the waste water treatment plant is stopped, and the waste water is stored in the waste water buffer tank. The concentration of P is reduced to a value within the target concentration range, and the matter to be treated is treated.
    Type: Grant
    Filed: July 24, 2008
    Date of Patent: May 7, 2013
    Assignee: JFE Steel Corporation
    Inventors: Satoshi Yoneda, Takahiro Sugano, Nobuyuki Sato
  • Patent number: 8410546
    Abstract: A semiconductor device includes: a semiconductor substrate of a first conductivity type; a semiconductor region provided in the semiconductor substrate; a first trench formed in the semiconductor region; a second trench formed in the semiconductor substrate; a trench gate electrode provided in the first trench; and a trench source electrode provided in the second trench. The trench source electrode is shaped like a stripe and connected to the source electrode through its longitudinal portion.
    Type: Grant
    Filed: March 20, 2009
    Date of Patent: April 2, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yusuke Kawaguchi, Miwako Akiyama, Yoshihiro Yamaguchi, Nobuyuki Sato, Shigeaki Hayase
  • Publication number: 20130069150
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor layer; a plurality of semiconductor regions; second semiconductor region; a first electrode being positioned between the plurality of first semiconductor regions, the first electrode contacting with the semiconductor layer, each of the plurality of first semiconductor regions, and the second semiconductor region via a first insulating film; a second electrode provided below the first electrode, and contacting with the semiconductor layer via a second insulating film; an insulating layer interposed between the first electrode and the second electrode; a third electrode electrically connected to the semiconductor layer; and a fourth electrode connected to the second semiconductor region. The first electrode has a first portion and a pair of second portions. And each of the pair of second portions is provided along the first insulating film.
    Type: Application
    Filed: September 13, 2012
    Publication date: March 21, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takeru MATSUOKA, Nobuyuki Sato, Shigeaki Hayase, Kentaro Ichinoseki
  • Patent number: 8237812
    Abstract: Imaging signal obtained through exposure for divided exposure times is A/D converted to digital imaging signal. Dark current component is subtracted from the digital imaging signal. The result of subtraction is accumulated and stored in a first memory. Next, exposure for divided exposure times is performed with the imaging device shielded from light. The obtained imaging signal is A/D converted to digital imaging signal. Dark current component is subtracted from the digital imaging signal. The result of subtraction is accumulated and stored sequentially in a second memory. The digital imaging signal stored in the second memory is subtracted from the digital imaging signal stored in the first memory. Then the result of subtraction is output. The word length allocated to one pixel in the first and second memories is longer than the word length of one A/D converted pixel.
    Type: Grant
    Filed: June 5, 2008
    Date of Patent: August 7, 2012
    Assignee: Sony Corporation
    Inventors: Mitsuaki Kita, Nobuyuki Sato, Masashi Wakatsuki, Shinya Ishibashi, Jun Minakuti, Takahiro Koyama
  • Patent number: 8120921
    Abstract: A device having electronic components mounted therein has a first electronic component having an external terminal on a first surface and a heat spreader on a second surface, at least one second electronic component that is placed in the direction of a second surface of the first electronic component, a flexible circuit board that is electrically connected to the first electronic component and at least one second electronic component, and at least the part to which at least one second electronic component is connected is located on the second surface side of the first electronic component, and a spacer that is located between at least part of the flexible circuit board and the second surface of the first electronic component. The spacer can prevent heat from the first electronic component from being directly transferred to the second electronic component.
    Type: Grant
    Filed: July 18, 2008
    Date of Patent: February 21, 2012
    Assignees: NEC Corporation, NEC Access Technica, Ltd.
    Inventors: Takao Yamazaki, Shinji Watanabe, Tomoo Murakami, Yuuki Fujimura, Ryoji Osu, Katsuhiko Suzuki, Shizuaki Masuda, Nobuyuki Sato, Kikuo Wada
  • Patent number: 8111306
    Abstract: An image pickup apparatus includes an image pickup device including plural imaging planes each having different dark current characteristics, each of the imaging planes having an effective image area and an corresponding optical black (OPB) area. The image pickup apparatus also includes a memory that stores a dark current data table including difference data between dark current values pre-measured at upper and lower areas of the effective image area of each of the imaging planes and dark current values pre-measured at corresponding upper and lower areas of the OPB area. The image pickup apparatus further includes an image processing unit to calculate estimate dark current values for the effective image area based on the dark current data table and actual dark current values measured in the OPB area for each of the imaging planes, and eliminates the dark current components for the effective imaging areas.
    Type: Grant
    Filed: June 25, 2008
    Date of Patent: February 7, 2012
    Assignee: Sony Corporation
    Inventors: Daisuke Kuruma, Nobuyuki Sato
  • Patent number: 8102434
    Abstract: An imaging apparatus capturing and recording a moving image and a static image at the same time includes a converter converting an optical image of a subject into a pixel signal, performing decimation on the pixel signal and outputting the pixel signal that has been subjected to decimation when recording of the moving image is performed but recording of the static image is not performed, and outputting the pixel signal that has not been subjected to decimation when recording of the moving image and the static image is performed; an eliminating section performing decimation on the pixel signal output from the converter only when recording of the moving image and the static image is performed; a moving image data generator generating moving image data; a static image data generator generating static image data; and a recorder recording the moving image data and the static image data.
    Type: Grant
    Filed: November 3, 2006
    Date of Patent: January 24, 2012
    Assignee: Sony Corporation
    Inventors: Tsuyoshi Yoshida, Nobuyuki Sato, Ken Nakajima
  • Patent number: 7948659
    Abstract: A halftoning device that converts an input pixel signal of 8 bits per pixel into an output pixel signal of r bits per pixel(r<8), the halftoning device includes: a gradation correction unit that expands the input pixel signal into an expanded pixel signal of n bits per pixel(n>8); a threshold value array storage that stores a threshold value array having a threshold value of 8 bits; and a threshold value expansion unit that expands the threshold value of 8 bits to expanded threshold value of n bits per pixel. A range of the expanded pixel signal output from the gradation correction unit is matched with a range of the expanded threshold value. The output pixel signal is set according to a comparison of the expanded pixel signal with the expanded threshold value corresponding to the threshold value that is selected for each input pixel signal.
    Type: Grant
    Filed: August 22, 2006
    Date of Patent: May 24, 2011
    Assignee: Ricoh Company, Ltd.
    Inventors: Takeshi Shibuya, Nobuyuki Sato, Naoyuki Urata, Shiro Kofuji
  • Patent number: 7926376
    Abstract: A rack and pinion steering device has a pinion rotatable in the R-direction, a rack bar having rack teeth meshing with the pinion and rectilinearly movable in the A-direction, a housing for rotatably supporting the pinion, a rack guide for slidably supporting the rack bar, and an elastic means for pressing the rack guide toward the pinion.
    Type: Grant
    Filed: May 17, 2006
    Date of Patent: April 19, 2011
    Assignees: Oiles Corporation, JTEKT Corporation
    Inventors: Masahiko Hirose, Masaaki Hashimoto, Nobuyuki Sato, Masao Shimura, Yoshiro Kuzumi
  • Patent number: 7916191
    Abstract: An image processing apparatus includes: imaging means for capturing an image of an object of shooting; defective-position storing means for storing a position of a defective pixel of the imaging means; arraying means for arraying a plurality of pixels in a certain range of the vicinity of a noticed pixel of the image of the object of shooting output by the imaging means; when the noticed pixel is the defective pixel, prediction-pixel obtaining means for obtaining prediction pixels located at relative positions predetermined with respect to the noticed pixel and to be used for correcting the defective pixel out of the arrayed pixels; prediction-coefficient supplying means for supplying prediction coefficients corresponding to the prediction pixels; and calculation means for calculating a correction value of the noticed pixel by the sum of the products of the prediction pixels and the prediction coefficients.
    Type: Grant
    Filed: July 18, 2007
    Date of Patent: March 29, 2011
    Assignee: Sony Corporation
    Inventors: Hiroyuki Kiba, Nobuyuki Sato
  • Publication number: 20110067527
    Abstract: Process for the production of valve metal powders, in particular niobium and tantalum powder, by reduction of corresponding valve metal oxide powders by means of vaporous reducing metals and/or hydrides thereof, preferably in the presence of an inert carrier gas, wherein the reduction is performed at a vapour partial pressure of the reducing metal/metal hydride of 5 to 110 hPa and an overall pressure of less than 1000 hPa, and tantalum powder obtainable in this way having a high stability of the powder agglomerate particles.
    Type: Application
    Filed: October 22, 2010
    Publication date: March 24, 2011
    Applicants: H. C. Starck GmbH, H. C. Starck Ltd.
    Inventors: Helmut HAAS, Ulrich BARTMANN, Tadashi KOMEYA, Nobuyuki SATO
  • Publication number: 20110027860
    Abstract: Nucleic acid sequences coding for the chondroitinase ABC gene and isolated chondroitinase ABC protein produced in a host cell transformed with a nucleic acid vector directing the expression of a nucleotide sequence coding for chondroitinase ABC protein are described. Chondroitinase ABC prepared by chemical synthesis is also described. Monoclonal and polyclonal antibodies which are specifically reactive with chondroitinase ABC protein are disclosed. The isolated chondroitinase ABC can be used in methods of treating intervertebral disc displacement, promoting neurite regeneration, and detecting galactosaminoglycans.
    Type: Application
    Filed: February 25, 2010
    Publication date: February 3, 2011
    Applicant: MARUHA NICHIRO SEAFOODS, INC.
    Inventors: Nobuyuki SATO, Masahiko SHIMADA, Hiroshi ODA
  • Patent number: RE43166
    Abstract: Nucleic acid sequences coding for the chondroitinase ABC gene and isolated chondroitinase ABE protein produced in a host cell transformed with a nucleic acid vector directing the expression of a nucleotide sequence coding for chondroitinase ABE protein described. Chondroitinase ABC prepared by chemical synthesis also described. Monoclonal and polyclonal antibodies which are specifically reactive with chondroitinase ABC protein are disclosed. The isolated chondroitinase ABC can be used in methods of treating intervertebral disc replacement, promoting neurite regeneration, and detecting galactosaminoglycans.
    Type: Grant
    Filed: November 5, 2009
    Date of Patent: February 7, 2012
    Assignee: Maruha Nichiro Foods, Inc.
    Inventors: Nobuyuki Sato, Masahiko Shimada, Hiroshi Oda