Patents by Inventor Noel Anderson

Noel Anderson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6207500
    Abstract: An improved method for forming a DRAM chip is disclosed. According to this method, a memory cell gate is deposited in a memory cell array area of the DRAM chip. The memory cell gate overlies a first channel area of a substrate. A peripheral gate is deposited in a peripheral area of the DRAM chip. The peripheral gate overlies a second channel area of the substrate. A first dopant is implanted with a first concentration in a first plurality of source and drain regions of the substrate lying predominantly outside the first and second channel areas of the substrate. A sidewall is then formed adjacent to the peripheral gate. Simultaneously, an insulating layer is formed over the memory cell array area of the DRAM chip. A second dopant is implanted with a second concentration in a second plurality of source and drain regions of the substrate within the peripheral area of the DRAM chip. The implant of the second dopant is blocked by the sidewall and the insulating layer.
    Type: Grant
    Filed: August 26, 1998
    Date of Patent: March 27, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Yin Hu, Dirk Noel Anderson
  • Patent number: 6136700
    Abstract: A self-aligned contact (122) to a substrate (12) of a semiconductor device (100) is formed using a stopping layer (110) overlying the substrate (12). The stopping layer (110) comprising a material selected from the group consisting of silicon-rich nitride, silicon-rich oxide, carbon-rich nitride, silicon carbide, boron nitride, organic spin-on-glass, graphite, diamond, carbon-rich oxide, nitrided oxide, and organic polymer. The stopping layer (110) promotes better semiconductor device (100) performance by contributing to greater selectivity with respect to an etch process used to remove an insulating layer (112) formed overlying the stopping layer (110).
    Type: Grant
    Filed: December 17, 1997
    Date of Patent: October 24, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Peter S. McAnally, Jeffrey Alan McKee, Dirk Noel Anderson
  • Patent number: 6033975
    Abstract: A semiconductor device (60) may comprise a semiconductor layer (12) having an outer surface (20). A plurality of gates (18) may be disposed over the outer surface (20) of the semiconductor layer (12). An isolation cover (30) may be disposed over the gates (18). An implant screen (40) may be grown on the outer surface (20) of the semiconductor layer (12) between the isolation covers (30) of the gates (18).
    Type: Grant
    Filed: December 17, 1997
    Date of Patent: March 7, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Siang Ping Kwok, William F. Richardson, Dirk Noel Anderson, Jiann Liu