Patents by Inventor Noriaki Kawamoto
Noriaki Kawamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20130309877Abstract: A silicon carbide semiconductor device (90), includes: 1) a silicon carbide substrate (1); 2) a gate electrode (7) made of polycrystalline silicon; and 3) an ONO insulating film (9) sandwiched between the silicon carbide substrate (1) and the gate electrode (7) to thereby form a gate structure, the ONO insulating film (9) including the followings formed sequentially from the silicon carbide substrate (1): a) a first oxide silicon film (O) (10), b) an SiN film (N) (11), and c) an SiN thermally-oxidized film (O) (12, 12a, 12b). Nitrogen is included in at least one of the following places: i) in the first oxide silicon film (O) (10) and in a vicinity of the silicon carbide substrate (1), and ii) in an interface between the silicon carbide substrate (1) and the first oxide silicon film (O) (10).Type: ApplicationFiled: July 29, 2013Publication date: November 21, 2013Applicants: ROHM CO., LTD., NISSAN MOTOR CO., LTD.Inventors: Satoshi TANIMOTO, Noriaki KAWAMOTO, Takayuki KITOU, Mineo MIURA
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Publication number: 20130309859Abstract: A silicon carbide semiconductor device (90), includes: 1) a silicon carbide substrate (1); 2) a gate electrode (7) made of polycrystalline silicon; and 3) an ONO insulating film (9) sandwiched between the silicon carbide substrate (1) and the gate electrode (7) to thereby form a gate structure, the ONO insulating film (9) including the followings formed sequentially from the silicon carbide substrate (1): a) a first oxide silicon film (O) (10), b) an SiN film (N) (11), and c) an SiN thermally-oxidized film (O) (12, 12a, 12b). Nitrogen is included in at least one of the following places: i) in the first oxide silicon film (0) (10) and in a vicinity of the silicon carbide substrate (1), and ii) in an interface between the silicon carbide substrate (1) and the first oxide silicon film (O) (10).Type: ApplicationFiled: July 29, 2013Publication date: November 21, 2013Applicants: ROHM CO., LTD., NISSAN MOTOR CO., LTD.Inventors: Satoshi TANIMOTO, Noriaki KAWAMOTO, Takayuki KITOU, Mineo MIURA
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Patent number: 8497218Abstract: A silicon carbide semiconductor device (90), includes: 1) a silicon carbide substrate (1); 2) a gate electrode (7) made of polycrystalline silicon; and 3) an ONO insulating film (9) sandwiched between the silicon carbide substrate (1) and the gate electrode (7) to thereby form a gate structure, the ONO insulating film (9) including the followings formed sequentially from the silicon carbide substrate (1): a) a first oxide silicon film (O) (10), b) an SiN film (N) (11), and c) an SiN thermally-oxidized film (O) (12, 12a, 12b). Nitrogen is included in at least one of the following places: i) in the first oxide silicon film (O) (10) and in a vicinity of the silicon carbide substrate (1), and ii) in an interface between the silicon carbide substrate (1) and the first oxide silicon film (O) (10).Type: GrantFiled: November 17, 2011Date of Patent: July 30, 2013Assignee: Nissan Motor Co., Ltd.Inventors: Satoshi Tanimoto, Noriaki Kawamoto, Takayuki Kitou, Mineo Miura
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Publication number: 20130009256Abstract: The semiconductor device according to the present invention includes a semiconductor layer of a first conductivity type, body regions of a second conductivity type plurally formed on a surface layer portion of the semiconductor layer at an interval, a source region of the first conductivity type formed on a surface layer portion of each body region, a gate insulating film provided on the semiconductor layer to extend between the body regions adjacent to each other, a gate electrode provided on the gate insulating film and opposed to the body regions, and a field relaxation portion provided between the body regions adjacent to each other for relaxing an electric field generated in the gate insulating film.Type: ApplicationFiled: March 30, 2011Publication date: January 10, 2013Applicant: ROHM CO LTDInventors: Keiji Okumura, Mineo Miura, Yuki Nakano, Noriaki Kawamoto
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Patent number: 8310028Abstract: A semiconductor device includes a semiconductor substrate that is made of either of silicon carbide (SiC) and gallium nitride (GaN), and has a defect region containing a crystal defect; a first insulating film that coats the defect region and is arranged on the semiconductor substrate; and a conductor film that electrically connects to a principal surface of the semiconductor substrate, the principal surface being exposed to a region that is not coated with the first insulating film.Type: GrantFiled: January 9, 2009Date of Patent: November 13, 2012Assignee: Rohm Co., Ltd.Inventors: Tatsuya Kiriyama, Noriaki Kawamoto
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Patent number: 8222648Abstract: A silicon carbide semiconductor device (90), includes: 1) a silicon carbide substrate (1); 2) a gate electrode (7) made of polycrystalline silicon; and 3) an ONO insulating film (9) sandwiched between the silicon carbide substrate (1) and the gate electrode (7) to thereby form a gate structure, the ONO insulating film (9) including the followings formed sequentially from the silicon carbide substrate (1): a) a first oxide silicon film (O) (10), b) an SiN film (N) (11), and c) an SiN thermally-oxidized film (O) (12, 12a, 12b). Nitrogen is included in at least one of the following places: i) in the first oxide silicon film (O) (10) and in a vicinity of the silicon carbide substrate (1), and ii) in an interface between the silicon carbide substrate (1) and the first oxide silicon film (O) (10).Type: GrantFiled: August 22, 2006Date of Patent: July 17, 2012Assignees: Nissan Motor Co., Ltd., Rohm Co., Ltd.Inventors: Satoshi Tanimoto, Noriaki Kawamoto, Takayuki Kitou, Mineo Miura
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Publication number: 20120064731Abstract: A silicon carbide semiconductor device (90), includes: 1) a silicon carbide substrate (1); 2) a gate electrode (7) made of polycrystalline silicon; and 3) an ONO insulating film (9) sandwiched between the silicon carbide substrate (1) and the gate electrode (7) to thereby form a gate structure, the ONO insulating film (9) including the followings formed sequentially from the silicon carbide substrate (1): a) a first oxide silicon film (O) (10), b) an SiN film (N) (11), and c) an SiN thermally-oxidized film (O) (12, 12a, 12b). Nitrogen is included in at least one of the following places: i) in the first oxide silicon film (O) (10) and in a vicinity of the silicon carbide substrate (1), and ii) in an interface between the silicon carbide substrate (1) and the first oxide silicon film (O) (10).Type: ApplicationFiled: November 17, 2011Publication date: March 15, 2012Applicants: Rohm Co., Ltd., Nissan Motor Co., Ltd.Inventors: Satoshi TANIMOTO, Noriaki KAWAMOTO, Takayuki KITOU, Mineo MIURA
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Publication number: 20100283126Abstract: A semiconductor device includes a semiconductor substrate that is made of either of silicon carbide (SiC) and gallium nitride (GaN), and has a defect region containing a crystal defect; a first insulating film that coats the defect region and is arranged on the semiconductor substrate; and a conductor film that electrically connects to a principal surface of the semiconductor substrate, the principal surface being exposed to a region that is not coated with the first insulating film.Type: ApplicationFiled: January 9, 2009Publication date: November 11, 2010Applicant: ROHM CO., LTDInventors: Tatsuya Kiriyama, Noriaki Kawamoto
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Publication number: 20100092666Abstract: A disclosed film deposition apparatus includes a process chamber inside which a reduced pressure space is maintained; a gas supplying portion that supplies a film deposition gas to the process chamber; a substrate holding portion that is made of a material including carbon as a primary constituent and holds a substrate in the process chamber; a coil that is arranged outside the process chamber and inductively heats the substrate holding portion; and a thermal insulation member that covers the substrate holding portion and is arranged to be separated from the process chamber, wherein the reduced pressure space is separated into a film deposition gas supplying space to which the film deposition gas is supplied and a thermal insulation space defined between the substrate holding portion and the process chamber, and wherein a cooling medium is supplied to the thermal insulation space.Type: ApplicationFiled: November 29, 2007Publication date: April 15, 2010Applicant: Tokyo Electron LimitedInventors: Eisuke Morisaki, Hirokatsu Kobayashi, Jun Yoshikawa, Ikuo Sawada, Tsunenobu Kimoto, Noriaki Kawamoto, Masatoshi Aketa
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Publication number: 20090050898Abstract: A silicon carbide semiconductor device (90), includes: 1) a silicon carbide substrate (1); 2) a gate electrode (7) made of polycrystalline silicon; and 3) an ONO insulating film (9) sandwiched between the silicon carbide substrate (1) and the gate electrode (7) to thereby form a gate structure, the ONO insulating film (9) including the followings formed sequentially from the silicon carbide substrate (1): a) a first oxide silicon film (O) (10), b) an SiN film (N) (11), and c) an SiN thermally-oxidized film (O) (12, 12a, 12b). Nitrogen is included in at least one of the following places: i) in the first oxide silicon film (O) (10) and in a vicinity of the silicon carbide substrate (1), and ii) in an interface between the silicon carbide substrate (1) and the first oxide silicon film (O) (10).Type: ApplicationFiled: August 22, 2006Publication date: February 26, 2009Inventors: Satoshi Tanimoto, Noriaki Kawamoto, Takayuki Kitou, Mineo Miura
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Publication number: 20090026497Abstract: A method for producing a semiconductor device (20) is disclosed. The semiconductor device (20) includes: 1) a semiconductor substrate (1, 2), 2) a hetero semiconductor area (3) configured to contact a first main face (1A) of the semiconductor substrate (1, 2) and different from the semiconductor substrate (1, 2) in band gap, 3) a gate electrode (7) contacting, via a gate insulating film (6), a part of a junction part (13) between the hetero semiconductor area (3) and the semiconductor substrate (1, 2), 4) a source electrode (8) configured to connect to the hetero semiconductor area (3), and 5) a drain electrode (9) configured to make an ohmic connection with the semiconductor substrate (1, 2). The method includes the following sequential operations: i) forming the gate insulating film (6); and ii) nitriding the gate insulating film (6).Type: ApplicationFiled: June 26, 2006Publication date: January 29, 2009Applicants: NISSAN MOTOR CO., LTD., ROHM CO., LTD.Inventors: Yoshio Shimoida, Hideaki Tanaka, Tetsuya Hayashi, Masakatsu Hoshi, Shigeharu Yamagami, Noriaki Kawamoto, Takayuki Kitou, Mineo Miura, Takashi Nakamura
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Publication number: 20050046566Abstract: A monitoring device for security in automatic teller machine, wherein a security monitoring unit and a security data recording unit are robust in structure so that they are not easily destructed. Even if the automatic teller machine itself is stolen and a commercial power source is shut down, the security monitoring unit and the security data recording unit can be operated with a backup power supply unit to wirelessly transmit security information, thereby making it possible to keep track of where the automatic teller machine is located.Type: ApplicationFiled: September 24, 2004Publication date: March 3, 2005Inventors: Yoshiaki Hamamoto, Noriaki Kawamoto
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Patent number: 6839083Abstract: A monitoring device for security in automatic teller machine, wherein a security monitoring unit and a security data recording unit are robust in structure so that they are not easily destructed. Even if the automatic teller machine itself is stolen and a commercial power source is shut down, the security monitoring unit and the security data recording unit can be operated with a backup power supply unit to wirelessly transmit security information, thereby making it possible to keep track of where the automatic teller machine is located.Type: GrantFiled: May 16, 2001Date of Patent: January 4, 2005Assignee: Hitachi, Ltd.Inventors: Yoshiaki Hamamoto, Noriaki Kawamoto
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Publication number: 20020000913Abstract: A monitoring device for security in automatic teller machine, wherein a security monitoring unit and a security data recording unit are robust in structure so that they are not easily destructed. Even if the automatic teller machine itself is stolen and a commercial power source is shut down, the security monitoring unit and the security data recording unit can be operated with a backup power supply unit to wirelessly transmit security information, thereby making it possible to keep track of where the automatic teller machine is located.Type: ApplicationFiled: May 16, 2001Publication date: January 3, 2002Inventors: Yoshiaki Hamamoto, Noriaki Kawamoto