Abstract: A semiconductor memory device has column selecting switches in a hierarchical structure. A plurality of local column selecting switches (LYSW) for controlling connections between bit lines (BLT/BLB) and local I/O lines (LIO). A global column selecting switch (GYSW) connects column selecting lines and four local column selecting switches (LYSW) when a bit precharging signal (BLEQT) becomes low in level for stopping precharging the bit lines. As the column selecting switches is in a hierarchical structure including the global column selecting switch (GYSW) that is directly controlled by the column selecting lines and the local column selecting switches (LYSW) that are controlled by the global column selecting switch (GYSW), a load on the column selecting lines is reduced for high-speed operation.

Abstract: When a command is input to a semiconductor memory device, a sub-threshold current is reduced to a predetermined value corresponding to the command. After the reduction of the sub-threshold current is completed, the semiconductor memory device starts to operate corresponding to the command.