Patents by Inventor Noriaki Setoguchi
Noriaki Setoguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20140300590Abstract: A method is provided for driving a plasma display panel having parallel first and second electrodes, third electrodes crossing the first and second electrodes, and discharge cells with electrodes crossing mutually in the form of a matrix. The method includes a reset period during which distribution of wall charges in the discharge cells is uniformed, an addressing period during which wall charges are produced in the discharge cells according to display data, and a sustain discharge period during which sustain discharge is induced in discharge cells in which wall charges are produced during the addressing period. The driving method includes during the reset period, in lines defined by the first and second electrodes, applying a first pulse, in which an applied voltage varies with time to induce first discharge, and applying a second pulse in which an applied voltage varies with time to induce second discharge as an erase discharge.Type: ApplicationFiled: June 19, 2014Publication date: October 9, 2014Applicant: HITACHI MAXELL, LTD.Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
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Patent number: 8791933Abstract: A method is provided for driving a plasma display panel having parallel first and second electrodes, third electrodes crossing the first and second electrodes, and discharge cells with electrodes crossing mutually in the form of a matrix. The method includes a reset period during which distribution of wall charges in the discharge cells is uniformed, an addressing period during which wall charges are produced in the discharge cells according to display data, and a sustain discharge period during which sustain discharge is induced in discharge cells in which wall charges are produced during the addressing period. The driving method includes during the reset period, in lines defined by the first and second electrodes, applying a first pulse, in which an applied voltage varies with time to induce first discharge, and applying a second pulse in which an applied voltage varies with time to induce second discharge as an erase discharge.Type: GrantFiled: September 25, 2013Date of Patent: July 29, 2014Assignee: Hitachi Maxell, Ltd.Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
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Publication number: 20140022224Abstract: A method is provided for driving a plasma display panel having parallel first and second electrodes, third electrodes crossing the first and second electrodes, and discharge cells with electrodes crossing mutually in the form of a matrix. The method includes a reset period during which distribution of wall charges in the discharge cells is uniformed, an addressing period during which wall charges are produced in the discharge cells according to display data, and a sustain discharge period during which sustain discharge is induced in discharge cells in which wall charges are produced during the addressing period. The driving method includes during the reset period, in lines defined by the first and second electrodes, applying a first pulse, in which an applied voltage varies with time to induce first discharge, and applying a second pulse in which an applied voltage varies with time to induce second discharge as an erase discharge.Type: ApplicationFiled: September 25, 2013Publication date: January 23, 2014Applicant: HITACHI CONSUMER ELECTRONICS CO., LTD.Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
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Patent number: 8558761Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.Type: GrantFiled: August 21, 2007Date of Patent: October 15, 2013Assignee: Hitachi Consumer Electronics Co., Ltd.Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
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Patent number: 8344631Abstract: A method for driving a plasma display panel in which a plurality of first and second electrodes are arranged adjacently each other, a plurality of third electrodes are arranged to cross the first and second electrodes, the plasma display panel having a reset period, an address period, and a sustain discharge period is provided. The method includes in the reset period, applying to the second electrodes a first waveform voltage, whose applied potential increases with time, then applying to the second electrodes a second waveform voltage, whose applied potential decreases with time.Type: GrantFiled: August 8, 2011Date of Patent: January 1, 2013Assignee: Hitachi Plasma Patent Licensing Co., Ltd.Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
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Patent number: 8247970Abstract: A PDP (Plasma Display Panel) comprising a front substrate structure (first substrate structure) in which two pairs of an X electrode and a Y electrode and a non-emission area therebetween are formed, and a plurality of light-shielding films formed with spacing from the X electrode and the Y electrode in the non-emission area. The light-shielding film contains a metal material common with a metal material forming the X electrode and the Y electrode. And, the light-shielding film is formed in an island-shape having spacing from a neighboring barrier rib formed to a rear substrate structure (second substrate structure). According to the above structure, the area of the light-shielding film which may cause a capacitance-coupled portion with the X electrode, the Y electrode, or an address electrode can be made small, thereby suppressing capacitance coupling even when a conductive material is used to the light-shielding film.Type: GrantFiled: July 31, 2008Date of Patent: August 21, 2012Assignee: Hitachi, Ltd.Inventors: Noriaki Setoguchi, Masahiro Sawa, Yuji Kobayashi
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Publication number: 20120032602Abstract: A method for driving a plasma display panel in which a plurality of first and second electrodes are arranged adjacently each other, a plurality of third electrodes are arranged to cross the first and second electrodes, the plasma display panel having a reset period, an address period, and a sustain discharge period is provided. The method includes in the reset period, applying to the second electrodes a first waveform voltage, whose applied potential increases with time, then applying to the second electrodes a second waveform voltage, whose applied potential decreases with time.Type: ApplicationFiled: August 8, 2011Publication date: February 9, 2012Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
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Patent number: 8022897Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.Type: GrantFiled: August 21, 2007Date of Patent: September 20, 2011Assignee: Hitachi Plasma Licensing Co., Ltd.Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
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Patent number: 8018168Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.Type: GrantFiled: August 21, 2007Date of Patent: September 13, 2011Assignee: Hitachi Plasma Patent Licensing Co., Ltd.Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
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Patent number: 8018167Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.Type: GrantFiled: August 21, 2007Date of Patent: September 13, 2011Assignee: Hitachi Plasma Licensing Co., Ltd.Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
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Patent number: 7906914Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.Type: GrantFiled: August 21, 2007Date of Patent: March 15, 2011Assignee: Hitachi, Ltd.Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
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Patent number: 7825875Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.Type: GrantFiled: January 19, 2006Date of Patent: November 2, 2010Assignee: Hitachi Plasma Patent Licensing Co., Ltd.Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
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Patent number: 7639213Abstract: A driving circuit of a plasma display panel is provided in which a display cell including a first electrode and a second electrode is selected to light up, for applying a first voltage Vs1 to the first electrode and a second voltage Vs2 to the second electrode adjacent to the first electrode to cause a sustain discharge between the first and second electrodes. The driving circuit generates a sustain discharge voltage such that, during the sustain discharge between the first and second electrodes, an applied voltage Vc to a third electrode adjacent to the first electrode opposite to the second electrode falls within a range Vs2?Vc<Vs1, and, in this case, when a display cell including the third electrode is selected to light up, the polarity of a wall charge formed on the third electrode becomes positive.Type: GrantFiled: April 25, 2006Date of Patent: December 29, 2009Assignee: Fujitsu Hitachi Plasma Display LimitedInventors: Akihiro Takagi, Takashi Shiizaki, Takayuki Shimizu, Noriaki Setoguchi, Hitoshi Hirakawa, Tomokatsu Kishi
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Publication number: 20090309495Abstract: A plasma display panel (1, 2, 3) is provided with first display electrodes (X, Xb), second display electrodes (Y, Yb), address electrodes (A, Ab), and a partition (23) that is mesh-like in a plan view. The partition (23) is configured from a plurality of vertical wall portions (24), a plurality of first horizontal wall portions (25) that partially overlap the first display electrodes (X, Xb), and a plurality of second horizontal wall portions (26) that partially overlap the second display electrodes (Y, Yb). In the plasma display panel (1, 2, 3), gaps (32, 33) that pass through a discharge gas space (31) of a plurality of cells (51) are present between the partition (23) and the first display electrodes (X, Xb), and a plan view distance (D2) between the second horizontal wall portion (26) and a surface discharge gap (60) is greater than a plan view distance (D1) between the first horizontal wall portion (25) and the surface discharge gap (60).Type: ApplicationFiled: June 7, 2006Publication date: December 17, 2009Inventors: Koji Ohira, Noriaki Setoguchi
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Patent number: 7548024Abstract: A plasma display panel includes first and second substrates opposed to each other for defining a space filled with discharge gas, a screen made up of cells arranged in the row and column directions, display electrodes arranged on the first substrate, the display electrodes extending in the row direction, band-like partitions arranged in parallel on the second substrate for dividing the gas filled space into columns, and fluorescent material layers sticking to side faces of the partitions and inner surfaces between the partitions on the columns, each of the fluorescent material layers extending across cells. The thickness of the fluorescent material layer at a part sticking to the side face of the partition and overlapping with the display electrodes is designed to be smaller than the thickness at a part sticking to the side face of the partition in the vicinity of the surface discharge gap.Type: GrantFiled: November 6, 2006Date of Patent: June 16, 2009Assignee: Fujitsu Hitachi Plasma Display LimitedInventors: Noriaki Setoguchi, Koji Ohira
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Publication number: 20090146567Abstract: A PDP (Plasma Display Panel) comprising a front substrate structure (first substrate structure) in which two pairs of an X electrode and a Y electrode and a non-emission area therebetween are formed, and a plurality of light-shielding films formed with spacing from the X electrode and the Y electrode in the non-emission area. The light-shielding film contains a metal material common with a metal material forming the X electrode and the Y electrode. And, the light-shielding film is formed in an island-shape having spacing from a neighboring barrier rib formed to a rear substrate structure (second substrate structure). According to the above structure, the area of the light-shielding film which may cause a capacitance-coupled portion with the X electrode, the Y electrode, or an address electrode can be made small, thereby suppressing capacitance coupling even when a conductive material is used to the light-shielding film.Type: ApplicationFiled: July 31, 2008Publication date: June 11, 2009Inventors: Noriaki SETOGUCHI, Masahiro Sawa, Yuji Kobayashi
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Publication number: 20090140951Abstract: A technology capable of stably maintaining the address discharge characteristics even in a long-term drive of a PDP is provided. A PDP has a structure where projecting portions are provided to a display electrode pair used for surface discharge so as to extend toward a reverse slit side in a cell region. Address discharge is performed between a scan electrode having the projecting portion and an address electrode. Since surface discharge in the display electrode pair and address discharge using the projecting portion are positionally separated from each other in this structure, address discharge characteristics are stabilized even if a protective layer is degraded due to the surface discharge.Type: ApplicationFiled: August 7, 2008Publication date: June 4, 2009Inventors: Noriaki SETOGUCHI, Masahiro Sawa, Yoshimi Kawanami
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Patent number: 7345667Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.Type: GrantFiled: September 14, 2005Date of Patent: March 18, 2008Assignee: Hitachi, Ltd.Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
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Publication number: 20070296649Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.Type: ApplicationFiled: August 21, 2007Publication date: December 27, 2007Applicant: HITACHI, LTD.Inventors: Noriaki SETOGUCHI, Shigeharu ASAO, Yoshikazu KANAZAWA
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Publication number: 20070290949Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.Type: ApplicationFiled: August 21, 2007Publication date: December 20, 2007Applicant: HITACHI, LTD.Inventors: Noriaki SETOGUCHI, Shigeharu Asao, Yoshikazu Kanazawa