Patents by Inventor Noriko OKUNISHI

Noriko OKUNISHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device with sense terminal
    Patent number: 12113041
    Abstract: In order to reduce on-resistance in a semiconductor device to be used for high current applications, the semiconductor device includes a source terminal lead located between a gate terminal lead and a Kelvin terminal lead in plan view and electrically connected with a source terminal via a plurality of wires.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: October 8, 2024
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Noriko Okunishi, Toshiyuki Hata
  • SEMICONDUCTOR DEVICE
    Publication number: 20220392865
    Abstract: In order to reduce on-resistance in a semiconductor device to be used for high current applications, the semiconductor device includes a source terminal lead located between a gate terminal lead and a Kelvin terminal lead in plan view and electrically connected with a source terminal via a plurality of wires.
    Type: Application
    Filed: April 11, 2022
    Publication date: December 8, 2022
    Inventors: Noriko OKUNISHI, Toshiyuki HATA
  • Semiconductor device
    Patent number: 10910337
    Abstract: A performance of a semiconductor device is improved. The semiconductor device according to one embodiment includes a wire that is bonded to one bonding surface at a plurality of parts in an opening formed in an insulating film of a semiconductor chip. The semiconductor device includes also a sealer that seals the semiconductor chip and the wire so that the sealer is in contact with the bonding surface. An area of a part of the bonding surface, the part not overlapping the wire, is small.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: February 2, 2021
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Noriko Okunishi, Toshinori Kiyohara
  • SEMICONDUCTOR DEVICE
    Publication number: 20200035638
    Abstract: A performance of a semiconductor device is improved. The semiconductor device according to one embodiment includes a wire that is bonded to one bonding surface at a plurality of parts in an opening formed in an insulating film of a semiconductor chip. The semiconductor device includes also a sealer that seals the semiconductor chip and the wire so that the sealer is in contact with the bonding surface. An area of a part of the bonding surface, the part not overlapping the wire, is small.
    Type: Application
    Filed: October 7, 2019
    Publication date: January 30, 2020
    Inventors: Noriko OKUNISHI, Toshinori KIYOHARA
  • SEMICONDUCTOR DEVICE
    Publication number: 20180122766
    Abstract: A performance of a semiconductor device is improved. The semiconductor device according to one embodiment includes a wire that is bonded to one bonding surface at a plurality of parts in an opening formed in an insulating film of a semiconductor chip. The semiconductor device includes also a sealer that seals the semiconductor chip and the wire so that the sealer is in contact with the bonding surface. An area of a part of the bonding surface, the part not overlapping the wire, is small.
    Type: Application
    Filed: October 11, 2017
    Publication date: May 3, 2018
    Inventors: Noriko OKUNISHI, Toshinori KIYOHARA
  • Semiconductor device
    Patent number: 9922905
    Abstract: A semiconductor device according to an embodiment is a semiconductor device in which a semiconductor chip mounted on a chip mounting part is sealed by resin and a first member is fixed to a chip mounting surface side between a peripheral portion of the semiconductor chip and a peripheral portion of the chip mounting part. Also, the first member is sealed by the resin. Also, a length of the first part of the chip mounting part in the first direction is larger than a length of the semiconductor chip in the first direction, in a plan view.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: March 20, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Yuichi Yato, Hiroi Oka, Noriko Okunishi, Keita Takada
  • SEMICONDUCTOR DEVICE
    Publication number: 20170170100
    Abstract: A semiconductor device according to an embodiment is a semiconductor device in which a semiconductor chip mounted on a chip mounting part is sealed by resin and a first member is fixed to a chip mounting surface side between a peripheral portion of the semiconductor chip and a peripheral portion of the chip mounting part. Also, the first member is sealed by the resin. Also, a length of the first part of the chip mounting part in the first direction is larger than a length of the semiconductor chip in the first direction, in a plan view.
    Type: Application
    Filed: February 28, 2017
    Publication date: June 15, 2017
    Inventors: Yuichi YATO, Hiroi OKA, Noriko OKUNISHI, Keita TAKADA
  • Semiconductor device
    Patent number: 9607940
    Abstract: A semiconductor device according to an embodiment is a semiconductor device in which a semiconductor chip mounted on a chip mounting part is sealed by resin and a first member is fixed to a chip mounting surface side between a peripheral portion of the semiconductor chip and a peripheral portion of the chip mounting part. Also, the first member is sealed by the resin. Also, a length of the first part of the chip mounting part in the first direction is larger than a length of the semiconductor chip in the first direction, in a plan view.
    Type: Grant
    Filed: July 5, 2013
    Date of Patent: March 28, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Yuichi Yato, Hiroi Oka, Noriko Okunishi, Keita Takada
  • SEMICONDUCTOR DEVICE
    Publication number: 20160204057
    Abstract: A semiconductor device according to an embodiment is a semiconductor device in which a semiconductor chip mounted on a chip mounting part is sealed by resin and a first member is fixed to a chip mounting surface side between a peripheral portion of the semiconductor chip and a peripheral portion of the chip mounting part. Also, the first member is sealed by the resin. Also, a length of the first part of the chip mounting part in the first direction is larger than a length of the semiconductor chip in the first direction, in a plan view.
    Type: Application
    Filed: July 5, 2013
    Publication date: July 14, 2016
    Inventors: Yuichi YATO, Hiroi OKA, Noriko OKUNISHI, Keita TAKADA