Abstract: A method for improving a performance of a heterojunction bipolar transistor is provided. The method includes steps of providing a substrate; forming a first at least one semiconductor layer on the substrate; forming a second at least one semiconductor layer on the first at least one semiconductor layer; and inserting a thermal treatment process within the second at least one semiconductor layer so as to improve a performance of the heterojuntion bipolar transistor. Furthermore, the thermal treatment process is performed at a temperature ranged from 300° C. to 800° C.

Abstract: In a method for producing a semiconductor device, a compound semiconductor cap layer including no aluminum is grown on a compound semiconductor layer including aluminum, a mask pattern insulating film is formed on a part of the compound semiconductor cap layer, the compound semiconductor wafer with the insulating mask pattern is immersed in an ammonium sulfide solution, the compound semiconductor wafer is selectively etched away using a chlorine containing gas in a reaction chamber, and a groove formed in the etching process is filled with a compound semiconductor layer grown in the reaction chamber by MOCVD. Therefore, a regrowth interface on which no impurity is segregated is attained, improving the quality of the regrown crystal layer.

Abstract: A method of preparing an AlInAs/GaAs hetero-structure includes forming an Al.sub.1-x In.sub.x As (0<x<1) buffer layer in an amorphous state on a GaAs substrate, annealing the amorphous buffer layer to crystallize the buffer layer into a single crystal buffer layer, and forming a single crystal Al.sub.1-x' In.sub.x' As (0<x'<1) active layer on the single crystal buffer layer.

Abstract: In a field effect transistor including active layers having a heterojunction structure with at least two different semiconductor materials, a layer for supplying electrons is disposed opposite a drain electrode, in contact with a region of the active layers including a dopant impurity producing n type conductivity. Therefore, degradation of the electrical characteristics caused by trapping of electrons in a drain ohmic contact layer due to fluorine diffusing into the semiconductor layers is suppressed by supplying electrons from the layer opposite the drain electrode, thereby improving reliability of the field effect transistor including the heterojunction structure.

Abstract: A field effect transistor includes a semi-insulating III-V compound semiconductor substrate; a channel layer disposed on the substrate; an n type electron supply layer disposed on the channel layer and comprising a mixed crystalline compound semiconductor layer including AlAs; an n type ohmic contact layer disposed on the electron supply layer; source and drain electrodes disposed on the ohmic contact layer; an opening in a region between the source and drain electrodes penetrating the ohmic contact layer; a gate electrode disposed in the opening and making a Schotty contact; and a surface protection film of a semiconductor material free of Al, In, and As, covering the opening except where the gate electrode is present. Fluorine is prevented from getting into the electron supply layer with no increase in transconductance or source resistance by providing a layer between the source and a channel, and between the gate and the channel.

Abstract: A semiconductor laser device includes a semiconductor substrate of a first conductivity type; opposed light emitting facets; a double heterojunction structure disposed on the semiconductor substrate and including an optical waveguide that extends between the facets and comprises a light emitting region and a lens region, the lens region being between the light emitting region and one of the facets, the double heterojunction structure including a plurality of AlGaAs series compound semiconductor layers which are thicker in the light emitting region than in the lens region; and a current blocking structure disposed on both sides of the double heterojunction structure and including a lower AlGaAs series compound semiconductor layer of the first conductivity type, an intermediate AlGaAs series compound semiconductor layer of a second conductivity type, opposite the first conductivity type, and an upper AlGaAs series compound semiconductor layer of the first conductivity type.

Abstract: A method of fabricating a semiconductor device includes forming a first mixed crystal semiconductor layer of AlAs and InAs; applying a solution containing a material easily combining with fluorine to the surface of the first mixed crystal semiconductor layer exposed to the atmosphere so that the material combines with fluorine that sticks to the surface of the first mixed crystal semiconductor layer; and annealing the first mixed crystal semiconductor layer in a vacuum. In this method, since the fluorine on the surface of the first mixed crystal semiconductor layer exposed to the atmosphere combines with the material included in the solution and is removed together with the material, a first mixed crystal semiconductor layer having no fluorine is produced. Therefore, unwanted infiltration of fluorine into the first mixed crystal semiconductor layer is avoided, resulting in a highly reliable semiconductor device with desired characteristics.

Abstract: A semiconductor light emitting device includes an Si substrate having opposed front and rear surfaces; an amorphous or polycrystalline first buffer layer disposed on the front surface of the Si substrate; and GaN series compound semiconductor layers successively disposed on the first buffer layer and including a light emitting region where light is produced by recombination of electrons and holes. In this light emitting device, since the Si substrate is cleavable, it is possible to produce resonator facets by cleaving. In addition, since the Si substrate is electrically conductive, a structure in which a pair of electrodes are respectively located on opposed upper and lower surfaces of the light emitting device is realized. Further, since the Si substrate is inexpensive, the light emitting device is obtained at low cost.

Abstract: A semiconductor device includes an Si substrate, a stress absorbing layer of GaAs and disposed on the Si substrate, a buffer layer having a composition of Al.sub.x Ga.sub.1-x-y In.sub.y N (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1) and disposed on the stress absorbing layer, and a compound semiconductor layer having a composition of Al.sub.x Ga.sub.1-x-y In.sub.y N (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1) and disposed on the buffer layer. Therefore, the buffer layer protects the GaAs stress absorbing layer from high temperatures during the formation of the compound semiconductor layer, whereby the stress absorbing layer is prevented from decomposition. As a result, a stress due to lattice mismatch or thermal stress between the Si substrate and the compound semiconductor layer is absorbed in the GaAs stress absorbing layer having a lowest bulk modulus, whereby a compound semiconductor layer with reduced dislocations may be grown on the buffer layer and bending of the Si substrate prevented.

Abstract: A semiconductor device includes an InP substrate; a channel layer in which electrons, as charge carriers, travel; and an Al.sub.x1 Ga.sub.1-x1 As.sub.y1 P.sub.z1 Sb.sub.1-y1-z1 (0.ltoreq.x1.ltoreq.1, 0.ltoreq.y1<1, 0<z1.ltoreq.1) electron supply layer for supplying electrons to the channel layer. The electron supply layer has an electron affinity smaller than that of the channel layer and is doped with a dopant impurity producing n type conductivity. Since n type AlGaAsPSb is thermally stable, its electrical characteristics are not changed by heat treatment at about 350.degree. C., resulting in a thermally stable and highly reliable HEMT in which the characteristics hardly change with the passage of time during fabrication and operation. Further, a heterostructure including an electron supply layer and a channel layer and having a desired energy band structure is easily produced with a wide degree of freedom in designing the device.

Abstract: A method for forming a film by selective area growth by MDCVD technique includes forming a mask on a semiconductor substrate having a (100) plane, the mask having a mask opening to selectively growing a compound semiconductor layer, and a slit which is narrower than the mask opening in width and controls the growth rate of the compound semiconductor layer at the mask opening; and selectively growing the compound semiconductor layer at a growth rate which is on the mask in the mask opening and the slit.

Abstract: A semiconductor laser includes an electrically insulating substrate having an opening; a first conductivity type first contact layer within the opening; a laminated semiconductor layer structure on the first contact layer and comprising a first cladding layer, an active layer, a second cladding layer, and a second contact layer wherein the first contact layer includes an aperture within the opening; a first electrode disposed on the electrically insulating substrate and extending to and contacting the first contact layer; and a second electrode in electrical contact with the second contact layer. The substrate is preferably sapphire, MgO, and spinel and the semiconductor layers are preferably GaN materials so that the laser emits short wavelength light. An electrode makes direct, reliable contact to the first cladding layer through an opening in the electrically insulating substrate without the need of mechanically working or etching the substrate.

Abstract: An Si-doped AlInAs layer and an intrinsic AlInAs layer are successively grown on a semi-insulating InP substrate in a molecular beam epitaxy chamber. The sample is then heat-treated in a nitrogen ambient at 400.degree. C. for 18 minutes so that electrical characteristics of the sample are deteriorated because of the infiltration of fluorine into the Si-doped AlInAs layer. The sample is then placed in the molecular beam epitaxy chamber and reheat-treated in an ultra-high vacuum at 400.degree. C. for seven minutes and the fluorine is removed.

Abstract: A semiconductor laser according to the invention includes a compound semiconductor substrate having a surface with a first crystalline orientation; crystalline semiconductor layers including a first cladding layer, an active layer, and a second cladding layer successively disposed on the surface of the semiconductor substrate and including first and second window surfaces transverse to the surface of the semiconductor substrate and having a second crystalline orientation; a doped crystalline semiconductor window layer disposed on the window surfaces; and electrodes respectively disposed on the crystalline layers and the semiconductor substrate.

Abstract: In a method for fabricating an infrared detector, initially, a CdHgTe layer of a first conductivity type is produced on a front surface of a semiconductor substrate, a plurality of spaced apart CdHgTe regions of a second conductivity type, opposite the first conductivity type, are produced at the surface of the first conductivity type CdHgTe layer, and part of the surface of the first conductivity type CdHgTe layer between the second conductivity type CdHgTe regions is selectively irradiated with a charged particle beam to evaporate Hg atoms from that part, whereby a CdHgTe separation region of the first conductivity type and having a Cd composition larger than that of the first conductivity type CdHgTe layer is produced penetrating through the first conductivity type CdHgTe layer and surrounding each of the second conductivity type CdHgTe regions. Therefore, a highly-integrated high-resolution infrared detector with no crosstalk between pixels is achieved.

Abstract: A method of manufacturing a semiconductor layer includes preparing a first semiconductor substrate; forming an etching stop layer on the surface of the first substrate; forming an active layer on the etching stop layer; forming a crystal defect reducing layer on the active layer; preparing a second semiconductor substrate having a heat conductivity higher than the heat conductivity of the first substrate; bonding the crystal defect reducing layer to the second substrate; selectively etching the first substrate to expose the etching stop layer; selectively etching the etching stop layer to expose the active layer, whereby the active layer is disposed on the second substrate with the crystal defect reducing layer therebetween. The heat dissipation property is significantly improved by the second substrate having a high heat conductivity and by reducing the thicknesses of the active layer and the crystal defect reducing layer.

Abstract: A method for producing a semiconductor structure including a semiconductor film formed on a semiconductor substrate body via an insulating film includes: laminating a first insulating film, a first semiconductor film, and a second insulating film on the semiconductor substrate successively; forming stripe-shaped second semiconductor films of predetermined width on the second insulating film arranged periodically at a predetermined interval and covering these second semiconductor films with a third insulating film; performing zone melting recrystallization of the first semiconductor film from one end of the substrate to the opposite end along the stripe direction of the stripe-shaped second semiconductor film; etching the third insulating film and portions of the second insulating film not sandwiched by the first and second semiconductor films; oxidizing portions of the second semiconductor film and the first semiconductor film exposed in the etching step and etching and removing the second insulating film rem

Abstract: A semiconductor wafer includes a notch or a hole used in preparing an orientation flat on the wafer. The notch in the wafer includes a side that is perpendicular to the surfaces of the wafer and aligned along a cleavage plane of the wafer for forming the orientation flat by cleaving. A hole in a wafer preferably includes an axis aligned along the cleaving plane. A sharp, non-rounded cleavage is formed by preparing the notch or hole after the completion of any etching processes or other steps that may round the edges of the flat. The sharp edges aid in achieving a precision alignment using the orientation flat.

Abstract: A semiconductor laser device including a semiconductor substrate; a plurality of semiconductor layers including an AlGaAs layer epitaxially grown on said semiconductor substrate; a ridge having a reverse mesa shape and opposed sides formed of said plurality of semiconductor layers; an Al.sub.x Ga.sub.1-x As low temperature buffer layer (0.ltoreq..times..ltoreq.1) disposed on said AlGaAs layer at opposite sides of said ridge; a first semiconductor layer epitaxially disposed on said low temperature buffer layer at opposite sides of said ridge; and a second semiconductor layer epitaxially disposed on said ridge and said first semiconductor layer.

Abstract: In accordance with the invention, after a crystal growth is carried out successively to produce at least a first conductivity type lower cladding layer, an active layer, a second conductivity type first upper cladding layer of AlGaAs having an AlAs composition ratio of 0.38 to 0.6, an etching stopper layer of AlGaAs having an AlAs composition ratio of more than 0.6, and a second conductivity type second upper cladding layer of AlGaAs having an AlAs composition ratio of 0.38 to 0.6, the second upper cladding layer is selectively etched using an etchant including an organic acid and hydrogen peroxide, thereby forming a ridge. As a result, a ridge-type semiconductor laser device which has a desirable laser structure and an oscillation wavelength below 830 nm can be produced easily with improved controllability and reproducibility.