Patents by Inventor Norio Shoji

Norio Shoji has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5926936
    Abstract: In a joint between welded end portions of corrosion-protectively coated steel pipes, a heat-shrinkable tube is positioned so as to cover the outer circumference of a welded portion and the outer circumferences of its adjacent portions, and the heat-shrinkable tube is thermally shrunk in a state in which a gap between the heat-shrinkable tube and the aforementioned portions is kept in a vacuum so that the aforementioned portions are corrosion-protectively coated with the heat-shrinkable outer layer of the heat-shrinkable tube thus thermally shrunk.
    Type: Grant
    Filed: October 11, 1996
    Date of Patent: July 27, 1999
    Assignees: Nitto Denko Corporation, Nippon Kokan Co., Ltd., Nippon Kokan Koji Kabushiki Kaisha
    Inventors: Ryouichi Ikeda, Minoru Komura, Yoshihiro Okano, Norio Shoji, Toshiyuki Namioka, Akio Kida, Kiyotaka Hirahara
  • Patent number: 5898328
    Abstract: The invention provides a PLL circuit which can form a phase difference between input and output signals with a high degree of accuracy without employing a current source for a very weak current and eliminates dependency of the phase difference upon the input signal frequency. In the PLL circuit, phase difference forming current is added within a term of a fixed period to a selected one of charge-up current and charge-down current, selected by a phase comparison circuit, of a charge pump circuit, which charges up or charges down a loop filter under the control of an output signal of a phase comparison circuit, to form a phase difference between input and output signals of the PLL circuit which are to be compared in phase by the phase comparison circuit. The magnitude of the phase difference depends upon and is controlled by a term within which the phase difference forming current.
    Type: Grant
    Filed: April 10, 1997
    Date of Patent: April 27, 1999
    Assignee: Sony Corporation
    Inventor: Norio Shoji
  • Patent number: 5864249
    Abstract: In a PLL circuit, the phase of the frequency of an input signal is compared with that of an oscillation frequency generated from a voltage-controlled oscillator. Charge pump circuits are provided which outputs currents pulse-width modulated based on information about the error between the two phases, respectively. An output voltage of a capacitor provided at a stage subsequent to one of the charge pump circuits is converted into a current by a gm amplifier. Further, the converted current is added to an output current of the other charge pump circuit. The so-added output is used as a control input for the voltage-controlled oscillator. The oscillation frequency of the voltage-controlled oscillator is produced as an output signal frequency.
    Type: Grant
    Filed: July 17, 1997
    Date of Patent: January 26, 1999
    Assignee: Sony Corporation
    Inventor: Norio Shoji
  • Patent number: 5742199
    Abstract: A filter circuit and an electronic apparatus using the filter circuit in which the manufacturing process can be simplified and the circuit is reduced in its size, and the minimum operating voltage is increasingly lowered and dynamic range is expanded comparing to that of prior art. A capacitor C taking out a signal component in a predetermined band from both ends is connected in series to a first diode, which is constantly in a conducting state by a second current source for diode, of a first differential pair to which the input signal of one differential input signal is supplied, and a second diode, which is constantly in a conducting state by a fourth current source for diode, of a second differential pair to which the other input signal is supplied.
    Type: Grant
    Filed: June 18, 1996
    Date of Patent: April 21, 1998
    Assignee: Sony Corporation
    Inventors: Norio Shoji, Katsuyuki Yonezawa
  • Patent number: 5691663
    Abstract: A single-ended input amplifier circuit for use within a magnetic media storage system includes circuits for concurrently biasing and amplifying signals generated by a magnetoresistive element. The amplifier receives power from a single-ended power supply. A first resistor is included for setting the gain of the amplifier and providing an output signal corresponding to the signals generated by the magnetoresistive element. A first feedback circuit generates a first biasing current provided to the magnetoresistive element. The first feedback circuit includes a first transconductance amplifier which amplifies the difference between the output signal and a reference voltage. A second feedback circuit generates a second biasing current provided to the magnetoresistive element. The second feedback circuit includes a second transconductance amplifier which amplifies the difference between the reference voltage and a voltage signal taken from a node between two resistors.
    Type: Grant
    Filed: March 25, 1996
    Date of Patent: November 25, 1997
    Assignees: Sony Corporation, Sony Electronics, Inc.
    Inventors: Mehrdad Nayebi, Mahmud Musbah, Norio Shoji
  • Patent number: 5525987
    Abstract: An analog/digital converter circuit including a plurality of reference resistance elements dividing a voltage between two reference potentials to provide a plurality of reference voltages; a plurality of switching blocks which are activated by an upper data conversion output signal in units of rows and compare the respective reference voltages with an input signal to be converted to provide a differential output; an upper data encoder which compares the reference voltage supplied to a switching block positioned at a specific position of the switching block matrix with the input signal to provide a plurality of conversion codes of the upper significant bits; a lower data comparator circuit having first and second comparators with weights N.
    Type: Grant
    Filed: February 2, 1994
    Date of Patent: June 11, 1996
    Assignee: Sony Corporation
    Inventors: Kunihiko Izuhara, Norio Shoji
  • Patent number: 5500774
    Abstract: A write current setting circuit of a magnetic recording apparatus which can be reduced in the number of IC pins and enables the increase of the IC pins accompanying an increase in the number of modes to be kept to a minimum. The external resistance elements for generating the sub-mode correction current are connected to a single IC pin. The IC is provided with a current generation circuit and a voltage follower for holding the output voltage at a predetermined value and is provided with a sub-mode switch circuit for switching the connection between the IC pin and the internal power source line and output terminal of the voltage follower in accordance with the input of a correction current control signal. Due to this, while six external resistance elements are required, (2.times.n) modes can be set by (n+1) IC pins of the integrated circuit.
    Type: Grant
    Filed: June 3, 1994
    Date of Patent: March 19, 1996
    Assignee: Sony Corporation
    Inventors: Shinichi Watanabe, Norio Shoji, Michiya Sako
  • Patent number: 4928074
    Abstract: An automatic gain control circuit having a variable gain amplifier circuit, a signal level detecting circuit connected to the variable gain amplifier circuit for generating a detect signal the level of which changes in response to a signal level of an output signal of the variable gain amplifier circuit, and a gain control circuit for controlling the gain of the variable gain amplifier circuit in accordance with the signal level of the detect signal, and the gain control circuit having a differential amplifier circuit having first and second input terminals, the first and second input terminals being connected to the signal level detecting circuit for receiving the detect signal, a first reference voltage source connected to the first input terminal of the differential amplifier so that a first predetermined voltage is provided instead of the signal level of the detect signal in response to the signal level of the detect signal and a second reference voltage source connected to the second input terminal of th
    Type: Grant
    Filed: June 13, 1989
    Date of Patent: May 22, 1990
    Assignee: Sony Corporation
    Inventors: Mitsuru Sato, Tetsuya Iizuka, Kiyoshi Furuya, Norio Shoji, Masato Sekine
  • Patent number: 4843303
    Abstract: A voltage regulator circuit arranged such that a constant current source through which a current of an integral multiple of a current from a reference current source is connected to a collector-emitter path of a transistor in series so that it is possible to suppress a base-emitter voltage of the transistor from being fluctated due to the scattering of the base impurity concentration in the transistor during the manufacturing process.
    Type: Grant
    Filed: July 7, 1988
    Date of Patent: June 27, 1989
    Assignee: Sony Corporation
    Inventor: Norio Shoji
  • Patent number: 4739304
    Abstract: A digital-to-analog convertor divides an input digital signal into a least significant bit group and a most significant bit group. The most significant bit group is converted using pulse amplitude modulation and the least significant bit group is converted using pulse width modulation, in which the pulse widths are varied symmetrically about predetermined time points within a conversion period in order to improve the linearity of the pulse width modulation conversion.
    Type: Grant
    Filed: October 10, 1986
    Date of Patent: April 19, 1988
    Assignee: Sony Corporation
    Inventors: Masashi Takeda, Ikuro Hata, Masayuki Katakura, Norio Shoji
  • Patent number: 4714841
    Abstract: A logic circuit adapted for fabrication as an integrated circuit is formed having a differential amplifier operating with a constant current source and an appropriate voltage source, and having output transistors to provide the necessary output voltages, does not require a reference voltage input to the differential amplifier, thus, reference voltage transistors are not required. The two binary input signals are selected to have the same amplitude difference between the high and low levels thereof and one of the two input signals is shifted relative to the other one by the amount substantially equal to 1/2 the selected amplitude difference, and the output signals are similarly level shifted. Using this basic logic circuit as a building block other, more complex, logic circuits can be obtained.
    Type: Grant
    Filed: June 25, 1985
    Date of Patent: December 22, 1987
    Assignee: Sony Corporation
    Inventors: Norio Shoji, Masashi Takeda