Patents by Inventor Norio Takahashi

Norio Takahashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7230327
    Abstract: An IC card that has improved endurance and demonstrates increased resistance to cracking of the case and peeling of the substrate when a bending force acts upon the IC card. First protrusions and second protrusions are formed in a recess for fitting a LGA. The second protrusions are connected to the side wall of the recess on the card center side. Because the first protrusions maintaining a constant and correct gap between the bottom portion and LGA, that is, a constant and correct thickness of an adhesive, and the second protrusions are provided, the LGA and case can be reliably bonded together. The boundary portion with the thick portion of the recess on the card center side is a portion where stresses are easily concentrated and cracks can easily occur. However, because the second protrusions provided in the bottom portion of the recess are integrally connected to the side wall, the boundary portion is reinforced and stress concentration is relaxed.
    Type: Grant
    Filed: August 11, 2005
    Date of Patent: June 12, 2007
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Norio Takahashi
  • Publication number: 20070096271
    Abstract: A substrate frame includes an insulative board (10a) having a pair of ear portions (13) extending along its longitudinal edges; a plurality of wiring substrate regions (11) arranged on the insulative board (10a) between the ear portions (13) at predetermined intervals; and a plurality of grooves (18) provided around said wiring substrate regions (11) from which wiring patterns are removed.
    Type: Application
    Filed: December 21, 2006
    Publication date: May 3, 2007
    Inventor: Norio Takahashi
  • Publication number: 20070098459
    Abstract: An image forming apparatus includes an image bearing member; a developer carrying member, contactable to the image bearing member, for carrying a developer to a developing position to develop an electrostatic image formed on the image bearing member with the developer; a supplying member for supplying the developer to the developer carrying member, wherein a peripheral speed of the developer carrying member is not less than 1.05 times and not more than 1.20 times a peripheral speed of the image bearing member, and an arithmetic average roughness Ra is not less than 0.20 times and not more than 0.33 times a volume average particle size of the developer, wherein a potential applied to the supplying member is different from a potential applied to the developer carrying member toward a larger potential of a regular charge polarity of the developer.
    Type: Application
    Filed: October 30, 2006
    Publication date: May 3, 2007
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Rie Endo, Shuji Moriya, Katsuhiro Sakaizawa, Norio Takahashi
  • Patent number: 7193329
    Abstract: The semiconductor device includes a tabular base metal having an insulating layer provided on a bottom surface thereof, and the insulating layer includes a plurality of wiring patterns, each of which is provided with a connecting pad at one end thereof. A semiconductor chip is adhered at a substantial center of the insulating layer with an adhesive. Electrodes provided on a bottom surface of the semiconductor chip are connected to the other ends of the wiring patterns by wire bonding via wires. The semiconductor chip is molded with a resin. The connecting pads are connected to solder balls via an interposer substrate provided with conductors.
    Type: Grant
    Filed: October 30, 2002
    Date of Patent: March 20, 2007
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Norio Takahashi
  • Publication number: 20070052313
    Abstract: Included are a ring-shaped stator and a ring-shaped rotor arranged inside the stator; the stator includes a stator core with armature windings; the rotor includes a rotor core in which a plurality of permanent magnets are inserted and cooling holes are formed, a coolant flowing in each of the cooling holes; and each of the cooling holes is formed so as to have a sectional view which is a convex toward the outer periphery thereof.
    Type: Application
    Filed: July 27, 2006
    Publication date: March 8, 2007
    Inventors: Norio Takahashi, Kazuto Sakai, Yoshio Hashidate, Masanori Arata, Wataru Ito, Masakatsu Matsubara, Takashi Hanai, Yasuo Hirano
  • Patent number: 7171744
    Abstract: A substrate frame includes an insulative board (10a) having a pair of ear portions (13) extending along its longitudinal edges; a plurality of wiring substrate regions (11) arranged on the insulative board (10a) between the ear portions (13) at predetermined intervals; and a plurality of slits (15) provided between the wiring substrate regions so as to extend across the ear portions (13) or a plurality grooves (18) around the wiring substrate regions (11).
    Type: Grant
    Filed: August 5, 2004
    Date of Patent: February 6, 2007
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Norio Takahashi
  • Publication number: 20060245775
    Abstract: A charging apparatus includes charging means for being supplied with an AC voltage and for electrically charging a member to be charged; current measuring means for measuring a current flowing between the charging means and the member to be charged when the AC voltage is supplied the charging means; and particular current extraction means for extracting from the current a particular current having a particular frequency.
    Type: Application
    Filed: June 28, 2006
    Publication date: November 2, 2006
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Norio Takahashi, Harumi Ishiyama, Jun Hirabayashi
  • Publication number: 20060220260
    Abstract: An acceleration sensor chip package comprises a frame section, a first semiconductor chip corresponding to an MEMS chip having a plurality of first bumps, a second semiconductor chip having a plurality of second bumps, a substrate on which the first and second semiconductor chips are mounted in parallel with each other and which has a plurality of electrode pads directly connected to the first or second bumps in opposing relationship to the first or second bumps, and external terminals respectively connected to the electrode pads, a closed ring-shaped first sealing section which seals a space defined between the frame section and the substrate so as to surround arrangements of the plurality of first bumps, and a second sealing section which covers the first semiconductor chip, the second semiconductor chip and the first sealing section to seal them.
    Type: Application
    Filed: March 24, 2006
    Publication date: October 5, 2006
    Inventor: Norio Takahashi
  • Patent number: 7116922
    Abstract: A charging apparatus includes a charging section supplied with an AC voltage and for electrically charging a member to be charged; a current measuring section for measuring a current flowing between the charging section and the member to be charged when the AC voltage is supplied to the charging section; and a particular current extraction section for extracting from the current a particular current having a particular frequency.
    Type: Grant
    Filed: May 3, 2004
    Date of Patent: October 3, 2006
    Assignee: Canon Kabushiki Kaisha
    Inventors: Norio Takahashi, Harumi Ishiyama, Jun Hirabayashi
  • Publication number: 20060216837
    Abstract: A method for testing a TMR element includes a step of measuring a plurality of resistances of the TMR element by applying a plurality of voltages with different voltage values each other to the TMR element, respectively, a step of calculating a ratio of change in resistance from the measured plurality of resistances of the TMR element, and a step of evaluating the TMR element using the calculated ratio of change in resistance.
    Type: Application
    Filed: March 13, 2006
    Publication date: September 28, 2006
    Applicant: TDK CORPORATION
    Inventors: Nozomu HACHISUKA, Hiroshi Kiyono, Takeo Kagami, Kenji Inage, Norio Takahashi
  • Publication number: 20060208181
    Abstract: A semiconductor package includes a base plate; a sidewall provided at a periphery of the base plate; a sensor chip retained in a chip accommodation space defined by the sidewall; and a chip installation hole provided in the base plate for installing the sensor chip. The sensor chip is disposed in the chip installation hole provided in the base plate of the case. Accordingly, it is possible to reduce a thickness of the semiconductor package without changing a thickness of the sensor chip. The base plate has a relatively large thickness except for the chip installation hole. Accordingly, even when the semiconductor package is made thinner, rigidity of the base plate is maintained, thereby minimizing a strain in the base plate.
    Type: Application
    Filed: February 10, 2006
    Publication date: September 21, 2006
    Inventor: Norio Takahashi
  • Publication number: 20060191271
    Abstract: Resins 5, 6 are interposed as insulating layers between heat radiation side and heat absorption side heat exchange bodies 2, 3 and heat radiation side and heat absorption side electrodes 41, 42 of a thermoelectric conversion element module 4. The resin 5 is fusion bonded to the heat radiation side heat exchange body 2, and the resin 6 is fusion bonded to the heat radiation side heat exchange body 3. The material of the resins 5, 6 is, for example, a thermosetting plastic. The thermosetting plastic becomes soft when heated and then cures. At the time of fusion bonding of the resins 5, 6 to the heat exchange bodies 2, 3, the heat exchange bodies 2, 3 and the resins 5, 6 are heated and pressed. Then, the resins 5, 6 become soft and enter the cavities and flaws formed in the surfaces of the heat exchange bodies 2, 3. The resins 5, 6 having entered the cavities and flaws cure to fill the cavities in the surfaces of the heat exchange bodies 2, 3.
    Type: Application
    Filed: July 29, 2005
    Publication date: August 31, 2006
    Inventors: Norio Takahashi, Wataru Kiyosawa
  • Publication number: 20060113651
    Abstract: An IC card that has improved endurance and demonstrates increased resistance to cracking of the case and peeling of the substrate when a bending force acts upon the IC card. First protrusions and second protrusions are formed in a recess for fitting a LGA. The second protrusions are connected to the side wall of the recess on the card center side. Because the first protrusions maintaining a constant and correct gap between the bottom portion and LGA, that is, a constant and correct thickness of an adhesive, and the second protrusions are provided, the LGA and case can be reliably bonded together. The boundary portion with the thick portion of the recess on the card center side is a portion where stresses are easily concentrated and cracks can easily occur. However, because the second protrusions provided in the bottom portion of the recess are integrally connected to the side wall, the boundary portion is reinforced and stress concentration is relaxed.
    Type: Application
    Filed: August 11, 2005
    Publication date: June 1, 2006
    Inventor: Norio Takahashi
  • Publication number: 20060092579
    Abstract: An MR element comprises: a tunnel barrier layer having two surfaces that face toward opposite directions; a free layer disposed adjacent to one of the surfaces of the tunnel barrier layer and having a direction of magnetization that changes in response to an external magnetic field; and a pinned layer that is a ferromagnetic layer disposed adjacent to the other of the surfaces of the tunnel barrier layer and having a fixed direction of magnetization. The free layer incorporates: a first soft magnetic layer disposed adjacent to the one of the surfaces of the tunnel barrier layer; a high polarization layer disposed such that the first soft magnetic layer is sandwiched between the tunnel barrier layer and the high polarization layer; and a second soft magnetic layer disposed such that the high polarization layer is sandwiched between the first and second soft magnetic layers.
    Type: Application
    Filed: October 20, 2005
    Publication date: May 4, 2006
    Applicant: TDK CORPORATION
    Inventors: Satoshi Miura, Takumi Uesugi, Norio Takahashi
  • Publication number: 20060041492
    Abstract: When a name of an enterprise to be evaluated and a plurality of evaluation definition names entered by a client are received by a server, an overall investment evaluation creation program creates an overall investment evaluation from a plurality of investment evaluations created according to a plurality of XBRL-formatted evaluation definitions corresponding to the plurality of evaluation definition names and displays the overall investment evaluation to the client.
    Type: Application
    Filed: October 13, 2004
    Publication date: February 23, 2006
    Inventors: Norio Takahashi, Toshiyuki Yamagishi, Miyoko Namioka, Mizuhiro Sakai, Shoko Matsushita
  • Publication number: 20060023333
    Abstract: A method for testing a TMR element includes a step of measuring a plurality of resistances of the TMR element by feeding a plurality of sense currents with different current values each other through the TMR element, a step of calculating a ratio of change in resistance from the measured plurality of resistances of the TMR element, and a step of evaluating the TMR element using the calculated ratio of change in resistance.
    Type: Application
    Filed: May 17, 2005
    Publication date: February 2, 2006
    Applicants: TDK Corporation, SAE Magnetics (H.K.) Ltd.
    Inventors: Nozomu Hachisuka, Kenji Inage, Norio Takahashi, Tatsushi Shimizu, Pak Wong
  • Publication number: 20050274541
    Abstract: A module circuit board for a semiconductor device by a solder reflow process includes a plurality of pads on which the semiconductor device to be mounted, a plurality of terminals formed on a side edge of the board, a resist film covering an area between said pads and said terminal on the board, and a barrier formed between said pads and said terminals.
    Type: Application
    Filed: February 11, 2004
    Publication date: December 15, 2005
    Inventor: Norio Takahashi
  • Publication number: 20050139985
    Abstract: The present invention provides a multichip package wherein a plurality of semiconductor chip packages (100) in each of which first electrode pads (16a) provided in a main surface of a semiconductor chip, and first bonding pads (20a) and first central bonding pads (18a) formed in an upper area of the main surface are respectively electrically connected by first redistribution wiring layers (24) in a one-to-one correspondence relationship, and second electrode pads (17b), and second bonding pads (22b) and second central bonding pads (18b) formed in an upper area of the main surface are respectively electrically connected by second redistribution wiring layers (26) in a one-to-one correspondence relationship, are stacked on one another.
    Type: Application
    Filed: May 11, 2004
    Publication date: June 30, 2005
    Inventor: Norio Takahashi
  • Publication number: 20050048259
    Abstract: A substrate frame includes an insulative board (10a) having a pair of ear portions (13) extending along its longitudinal edges; a plurality of wiring substrate regions (11) arranged on the insulative board (10a) between the ear portions (13) at predetermined intervals; and a plurality of slits (15) provided between the wiring substrate regions so as to extend across the ear portions (13) or a plurality grooves (18) around the wiring substrate regions (11).
    Type: Application
    Filed: August 5, 2004
    Publication date: March 3, 2005
    Inventor: Norio Takahashi
  • Publication number: 20050021427
    Abstract: When inconsistency occurs between data presented from individual group enterprises, causes of the inconsistency cannot be specified easily in a conventional consolidated settlement processing method. In the embodiments of the invention, an XBRL conversion module converts inputted account data into data resulting from synthesis of standard data and extended data by using a mapping table and transmits the converted data to a data separation module. The data separation module separates the standard data and extended data of the received data and stores these types of data in corresponding storage tables while adding them with information for mutual relevancy. In this manner, when inconsistency occurs during a consolidated settlement process, causes of the inconsistency can be specified easily by acquiring the extended data.
    Type: Application
    Filed: January 8, 2004
    Publication date: January 27, 2005
    Inventors: Norio Takahashi, Toshiyuki Yamagishi, Taiki Sakata