Patents by Inventor Norio Yamanishi

Norio Yamanishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060148317
    Abstract: A semiconductor device is disclosed that comprises a board, a ground terminal disposed on the board, a connection terminal disposed on the board, a semiconductor chip mounted on the board, and a shield member electrically connected to the ground terminal. The semiconductor chip, the ground terminal, and the connection terminal are disposed on one side of the board, and the shield member is disposed directly on and covers the other side of the board.
    Type: Application
    Filed: December 27, 2005
    Publication date: July 6, 2006
    Inventors: Sadakazu Akaike, Akinobu Inoue, Atsunori Kajiki, Hiroyuki Takatsu, Takashi Tsubota, Norio Yamanishi
  • Publication number: 20060125077
    Abstract: A semiconductor device is provided that includes a semiconductor chip, a substrate on which the semiconductor chip is mounted, a mounting terminal that is arranged on a first side of the substrate, and a testing terminal that is arranged on a second side of the substrate which second side is opposite the first side of the substrate.
    Type: Application
    Filed: December 1, 2005
    Publication date: June 15, 2006
    Inventors: Sadakazu Akaike, Akinobu Inoue, Atsunori Kajiki, Hiroyuki Takatsu, Takashi Tsubota, Norio Yamanishi
  • Publication number: 20060113642
    Abstract: A semiconductor device is disclosed that includes a substrate, electronic components that are arranged at an electronic components mounting area of the substrate, a ground terminal that is arranged within the electronic components mounting area, transfer molded resin that covers the electronic components while exposing the ground terminal, a shield member that covers the electronic components and is connected to the ground terminal, and conductive adhesive that realizes electrical connection between the ground terminal and the shield member.
    Type: Application
    Filed: October 13, 2005
    Publication date: June 1, 2006
    Inventors: Atsunori Kajiki, Hiroyuki Takatsu, Takashi Tsubota, Norio Yamanishi, Sadakazu Akaike, Akinobu Inoue
  • Publication number: 20060113679
    Abstract: A semiconductor device includes a semiconductor chip, wirings, a substrate electrically connected to the semiconductor chip via the wirings and a plurality of discrete parts provided on a part of the substrate. The part is located closer to the center of the substrate than a wiring disposing area where the wirings are disposed.
    Type: Application
    Filed: November 28, 2005
    Publication date: June 1, 2006
    Inventors: Hiroyuki Takatsu, Atsunori Kajiki, Takashi Tsubota, Norio Yamanishi, Sadakazu Akaike, Akinobu Inoue
  • Publication number: 20040235287
    Abstract: A method of manufacturing a semiconductor package includes the steps of: forming, on one side of polyimide film (insulating substrate), a first metal wiring layer (first conductive pattern) having a first pad; forming, on the other side of the polyimide film, a fourth metal wiring layer (second conductive pattern) having a second pad; forming, on the polyimide film, a first solder resist layer having an opening of a size sufficient to expose all side surfaces of the first pad; electrically connecting a semiconductor element to the first pad through a first solder bump; filling insulating adhesive into a space between the polyimide film and the semiconductor element; and bonding a second solder bump with the second pad by heating the second solder bump.
    Type: Application
    Filed: April 30, 2004
    Publication date: November 25, 2004
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Akinobu Inoue, Atsunori Kajiki, Norio Yamanishi, Takashi Tsubota, Hiroyuki Takatsu