Abstract: A lead frame type of semiconductor apparatus includes a die pad on which a semiconductor chip is mounted; ground terminals which are to be grounded; power supply terminals which are connected to a power supply; inner leads connected to the ground terminals and power supply terminals, in which a pair of adjacent inner leads for power supply terminal and ground terminal are extended inwardly; a chip capacitor mounting pad which is provided at inner ends of the extended inner leads; and a chip capacitor which is mounted on the chip capacitor mounting pad so that a decoupling capacitor is provided.

Abstract: A lead frame type of semiconductor apparatus includes a die pad on which a semiconductor chip is mounted; ground terminals which are to be grounded; power supply terminals which are connected to a power supply; inner leads connected to the ground terminals and power supply terminals, in which a pair of adjacent inner leads for power supply terminal and ground terminal are extended inwardly; a chip capacitor mounting pad which is provided at inner ends of the extended inner leads; and a chip capacitor which is mounted on the chip capacitor mounting pad so that a decoupling capacitor is provided.

Abstract: A lead frame type of semiconductor apparatus includes a die pad on which a semiconductor chip is mounted; ground terminals which are to be grounded; power supply terminals which are connected to a power supply; inner leads connected to the ground terminals and power supply terminals, in which a pair of adjacent inner leads for power supply terminal and ground terminal are extended inwardly; a chip capacitor mounting pad which is provided at inner ends of the extended inner leads; and a chip capacitor which is mounted on the chip capacitor mounting pad so that a decoupling capacitor is provided.

Abstract: A semiconductor device includes a semiconductor substrate having a first surface and a second surface opposite to the first surface; a first through wiring penetrating through the semiconductor substrate from the first surface to the second surface; an antenna formed on the first surface and electrically connected to the first through wiring; a semiconductor element formed on the second surface and electrically connected to the first through wiring; a first sealing layer formed on the second surface to cover the semiconductor element; and a first external terminal having one end portion exposed from the first sealing layer and the other end portion electrically connected to the semiconductor element.

Abstract: A semiconductor device includes a semiconductor substrate having a main surface, the main surface including a first and second areas formed with a high-frequency circuit element, and a third area located around the first and second areas and formed with a low-frequency circuit element. The semiconductor device also includes a sealing resin which covers the main surface; a plurality of first external terminals which are formed above the third area and which are electrically connected to the high-frequency circuit element, the first external terminals protruding from the surface of the sealing resin. The semiconductor device further includes a plurality of second external terminals which are formed above the third area and which are electrically connected to the low-frequency circuit element, the second external terminals protruding from the surface of the sealing resin.

Abstract: A semiconductor device includes a semiconductor chip, electrodes pads, first and second insulating layers, first and second conductive patterns and external terminals. The electrode pads are formed on a first area of a main surface of the semiconductor chip. The first insulating layer is formed on the first and second areas of the semiconductor chip and exposes the electrode pads. The first conductive pattern transfers a signal and is formed on the first insulating layer. A second insulating layer is formed on the first conductive pattern and the first insulating layer. The second conductive pattern is formed on the second insulating layer and provides a ground potential. The external terminals are formed on the first and second patterns at the second area.

Abstract: A lead frame type of semiconductor apparatus includes a die pad on which a semiconductor chip is mounted; ground terminals which are to be grounded; power supply terminals which are connected to a power supply; inner leads connected to the ground terminals and power supply terminals, in which a pair of adjacent inner leads for power supply terminal and ground terminal are extended inwardly; a chip capacitor mounting pad which is provided at inner ends of the extended inner leads; and a chip capacitor which is mounted on the chip capacitor mounting pad so that a decoupling capacitor is provided.

Abstract: In a semiconductor device having a WCSP type construction package, to increase inductance without increasing further an area conventionally occupied by a coil. A pseudo-post part 27 comprising a magnetic body is extended in a direction perpendicular to a main surface 12a of a semiconductor chip 12, on a second insulating layer 21 of a WCSP 10. A first conductive part 15a and a second conductive part 15b constructed as square frames are respectively provided so as to surround the pseudo-post part, on respective top surfaces of a second insulation layer and a third insulating layer 22 which are separated parallel to each other, in an extension direction of the pseudo-post part. A coil 100 being a substantially spiral shape conductive path is formed from, the first conductive part, the second conductive part, and a connection part 26 which electrically connects the one ends of the first and second conductive parts.

Abstract: A lead frame type of semiconductor apparatus includes a die pad on which a semiconductor chip is mounted; ground terminals which are to be grounded; power supply terminals which are connected to a power supply; inner leads connected to the ground terminals and power supply terminals, in which a pair of adjacent inner leads for power supply terminal and ground terminal are extended inwardly; a chip capacitor mounting pad which is provided at inner ends of the extended inner leads; and a chip capacitor which is mounted on the chip capacitor mounting pad so that a decoupling capacitor is provided.

Abstract: A lead frame type of semiconductor apparatus includes a die pad on which a semiconductor chip is mounted; ground terminals which are to be grounded; power supply terminals which are connected to a power supply; inner leads connected to the ground terminals and power supply terminals, in which a pair of adjacent inner leads for power supply terminal and ground terminal are extended inwardly; a chip capacitor mounting pad which is provided at inner ends of the extended inner leads; and a chip capacitor which is mounted on the chip capacitor mounting pad so that a decoupling capacitor is provided.

Abstract: A semiconductor device includes a semiconductor substrate having a first surface and a second surface opposite to the first surface; a first through wiring penetrating through the semiconductor substrate from the first surface to the second surface; an antenna formed on the first surface and electrically connected to the first through wiring; a semiconductor element formed on the second surface and electrically connected to the first through wiring; a first sealing layer formed on the second surface to cover the semiconductor element; and a first external terminal having one end portion exposed from the first sealing layer and the other end portion electrically connected to the semiconductor element.

Abstract: A semiconductor device includes a semiconductor chip, electrodes pads, first and second insulating layers, first and second conductive patterns and external terminals. The electrode pads are formed on a first area of a main surface of the semiconductor chip. The first insulating layer is formed on the first and second areas of the semiconductor chip and exposes the electrode pads. The first conductive pattern transfers a signal and is formed on the first insulating layer. A second insulating layer is formed on the first conductive pattern and the first insulating layer. The second conductive pattern is formed on the second insulating layer and provides a ground potential. The external terminals are formed on the first and second patterns at the second area.

Abstract: A semiconductor device includes a semiconductor chip, electrodes pads, an insulating layer, first and second conductive patterns and external terminals. The electrode pads are formed on a first area of a main surface of the semiconductor chip. The insulating layer is formed on a second area of the semiconductor chip so as to expose the electrode pads. The first conductive pattern provides a ground potential and is formed on the insulating layer. The second conductive pattern transfers a signal. The second conductive pattern is formed on the insulating layer and located to partially surround the first conductive pattern. The external terminals are formed on the first and second patterns at the second area.

Abstract: A lead frame type of semiconductor apparatus includes a die pad on which a semiconductor chip is mounted; ground terminals which are to be grounded; power supply terminals which are connected to a power supply; inner leads connected to the ground terminals and power supply terminals, in which a pair of adjacent inner leads for power supply terminal and ground terminal are extended inwardly; a chip capacitor mounting pad which is provided at inner ends of the extended inner leads; and a chip capacitor which is mounted on the chip capacitor mounting pad so that a decoupling capacitor is provided.

Abstract: A semiconductor device includes a semiconductor substrate having a main surface, the main surface including a first and second areas formed with a high-frequency circuit element, and a third area located around the first and second areas and formed with a low-frequency circuit element. The semiconductor device also includes a sealing resin which covers the main surface; a plurality of first external terminals which are formed above the third area and which are electrically connected to the high-frequency circuit element, the first external terminals protruding from the surface of the sealing resin. The semiconductor device further includes a plurality of second external terminals which are formed above the third area and which are electrically connected to the low-frequency circuit element, the second external terminals protruding from the surface of the sealing resin.

Abstract: In a semiconductor device having a WCSP type construction package, to increase inductance without increasing further an area conventionally occupied by a coil. A pseudo-post part 27 comprising a magnetic body is extended in a direction perpendicular to a main surface 12a of a semiconductor chip 12, on a second insulating layer 21 of a WCSP 10. A first conductive part 15a and a second conductive part 15b constructed as square frames are respectively provided so as to surround the pseudo-post part, on respective top surfaces of a second insulation layer and a third insulating layer 22 which are separated parallel to each other, in an extension direction of the pseudo-post part. A coil 100 being a substantially spiral shape conductive path is formed from, the first conductive part, the second conductive part, and a connection part 26 which electrically connects the one ends of the first and second conductive parts.

Abstract: A semiconductor device includes a semiconductor substrate having a principal surface in which a semiconductor integrated circuit is included and a spiral inductor disposed over the principal surface of the semiconductor substrate so as to be coupled to the semiconductor integrated circuit. A region occupied by the spiral inductor is an inductor region. The semiconductor device further includes a shielding film disposed between the principal surface of the semiconductor substrate and the spiral inductor. The shielding film includes a plurality of openings which radially extend in the shielding film from a middle of the inductor region toward a periphery of the inductor region. Alternatively, the semiconductor device includes a meandering inductor and a shielding film with openings extending parallel to each other. The meandering inductor is configured by first and second inductors which are alternatively connected with each other. Also, there is provided a manufacturing method of the semiconductor device.

Abstract: A semiconductor device includes a semiconductor chip, electrodes pads, insulating layer, first and second conductive patterns and external terminals. The electrode pads are formed on a first area of a main surface of the semiconductor chip. The insulating layer is formed on a second area of the semiconductor chip so as to expose the electrode pads. The first conductive patterns provides a ground potential and is formed on the insulating layer. The second conductive pattern transfers a signal. The second conductive pattern and is formed on the insulating layer and located between the first conductive patterns. The external terminals are formed on the first and second patterns at the second area.

Abstract: A semiconductor device includes a semiconductor chip, electrodes pads, an insulating layer, first and second conductive patterns and external terminals. The electrode pads are formed on a first area of a main surface of the semiconductor chip. The insulating layer is formed on a second area of the semiconductor chip so as to expose the electrode pads. The first conductive patterns provide a ground potential and are formed on the insulating layer. The second conductive pattern transfers a signal. The second conductive pattern is formed on the insulating layer and located between the first conductive patterns. The external terminals are formed on the first and second patterns at the second area.

Abstract: In a semiconductor device having a WCSP type construction package, to increase inductance without increasing further an area conventionally occupied by a coil. A pseudo-post part 27 comprising a magnetic body is extended in a direction perpendicular to a main surface 12a of a semiconductor chip 12, on a second insulating layer 21 of a WCSP 10. A first conductive part 15a and a second conductive part 15b constructed as square frames are respectively provided so as to surround the pseudo-post part, on respective top surfaces of a second insulation layer and a third insulating layer 22 which are separated parallel to each other, in an extension direction of the pseudo-post part. A coil 100 being a substantially spiral shape conductive path is formed from, the first conductive part, the second conductive part, and a connection part 26 which electrically connects the one ends of the first and second conductive parts.