Patents by Inventor Noritaka Kishi

Noritaka Kishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9881552
    Abstract: Provided is a driving method whereby it is possible to simultaneously compensate for both degradation of a drive transistor and degradation of a light-emitting element without causing special light emission at the time of detecting characteristics in a display device. In a display device which includes a pixel circuit including an electro-optic element and a drive transistor, a driving method includes: a detecting a characteristic of the drive transistor; detecting a characteristic of the electro-optic element; storing characteristic data obtained based on detection results in the first and second detection of characteristics of the drive transistor and electro-optic element, as correction data; and correcting the video signal based on the correction data.
    Type: Grant
    Filed: February 7, 2017
    Date of Patent: January 30, 2018
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Noritaka Kishi
  • Publication number: 20170372656
    Abstract: The organic EL display device includes: a current monitoring section that measures a current flowing in a circuit element and outputs a digital measured value in accordance with the measured current; and an averaging section (36) that calculates an average value of a plurality of input values. The current monitoring section measures the current flowing in a circuit element in each pixel circuit a plurality of times in a fixed amount of time. For each pixel circuit, the averaging section (36) receives a plurality of measured values outputted from the current monitoring section in a fixed amount of time as a plurality of input values and outputs an average value of the plurality of digital measured values as a value for use in compensation computation to compensate for degradation of the circuit element.
    Type: Application
    Filed: October 2, 2015
    Publication date: December 28, 2017
    Inventors: HIROYUKI FURUKAWA, NORITAKA KISHI, KAZUYOSHI YOSHIYAMA, TAMOTSU SAKAI, NAOKO GOTO, NOBORU NOGUCHI
  • Publication number: 20170365205
    Abstract: A measurement circuit includes a plurality of measurement units, performs, at a same timing, a main measurement for measuring a current or a voltage with respect to a pixel circuit with supplying a measurement voltage to a part of the measurement units and a dummy measurement for measuring a current or a voltage with supplying a dummy signal to remaining measurement units, and performs a calculation on a result of the main measurement and a result of the dummy measurement. As the dummy signal, a signal with which a value to be measured is approximately zero is used. The measurement result of the current or the voltage is used for correcting a video signal. With this, a display device which can remove noise in measurement when measuring the current or the voltage with respect to the pixel circuit is provided.
    Type: Application
    Filed: January 27, 2016
    Publication date: December 21, 2017
    Inventors: NORITAKA KISHI, HIROYUKI FURUKAWA, KATSUYA OTOI, KAZUYOSHI YOSHIYAMA, TAMOTSU SAKAI, NAOKO GOTOH
  • Patent number: 9842545
    Abstract: A display device that can compensate for degradation of circuit elements while suppressing an increase in circuit size is implemented. A data signal line (S(j)) is not only used as a signal line that transfers a signal for allowing an organic EL element (OLED) in each pixel circuit (11) to emit light at a desired luminance, but also used as a signal line for characteristic detection. In addition, a switch (334) is provided between the data signal line (S(j)) and an internal data line (Sin(j)). In such a configuration, during an AD conversion period during which analog data obtained for characteristic detection is converted into digital data, the switch (334) is brought into an off state and a potential of the data signal line (S(j)) obtained immediately before the AD conversion period is supplied from through a predetermined control line (CL) to the data signal line (S(j)).
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: December 12, 2017
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Noritaka Kishi
  • Patent number: 9837023
    Abstract: In a pixel circuit, TFTs are connected and driven such that a threshold voltage Vth of a TFT, which is a drive transistor, can be held in a threshold holding capacitor having a capacitance value c1, voltages, including a data potential Vdata representing an image to be displayed, can be held in a data holding capacitor having a capacitance value c2, and charges in the data holding capacitor and the threshold holding capacitor are redistributed at the time of light emission. As a result, a potential obtained by multiplying the data potential Vdata by c1/(c1+c2) is provided to a gate potential of the TFT.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: December 5, 2017
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Noritaka Kishi, Noboru Noguchi, Masanori Ohara, Shigetsugu Yamanaka
  • Patent number: 9837016
    Abstract: A monitor line electrically connectable with sources of drive transistors and positive electrodes of electro-optical elements is provided. A drive method includes a step of detecting the characteristics of a drive transistor, a step of detecting the characteristics of an electro-optical element, a step of storing characteristics data obtained on the basis of a result of the detection of the characteristics, as correction data for correcting a video signal, and a step of correcting the video signal on the basis of the correction data. Here, the length of a selection period is set to be equal for a monitored row and an unmonitored row. In addition, a potential given to the monitor line for the detection of the characteristics of the drive transistors and a potential given to the monitor line for the detection of the characteristics of the electro-optical elements are made different.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: December 5, 2017
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Noritaka Kishi
  • Patent number: 9824618
    Abstract: When a clock signal pulse number and a compensation-target-line address indicating a compensation-target row match, the following control is carried out with a time point being a starting point of a current measurement period, the time point being one horizontal scanning period after a time point of the match. At a current measurement period starting point and ending point, only the potential of the one of the clock signals applied to a unit circuit corresponding to the compensation-target row is changed. Throughout the current measurement period, the clock operation of the clock signals is stopped. A monitor enable signal, that is applied to a control terminal of an output control transistor for controlling active signal output to a monitor control line, is only set to a high level during the current measurement period.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: November 21, 2017
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Masanori Ohara, Noboru Noguchi, Noritaka Kishi
  • Publication number: 20170316741
    Abstract: In a pixel circuit, TFTs are connected and driven such that a threshold voltage Vth of a TFT, which is a drive transistor, can be held in a threshold holding capacitor having a capacitance value c1, voltages, including a data potential Vdata representing an image to be displayed, can be held in a data holding capacitor having a capacitance value c2, and charges in the data holding capacitor and the threshold holding capacitor are redistributed at the time of light emission. As a result, a potential obtained by multiplying the data potential Vdata by c1/(c1+c2) is provided to a gate potential of the TFT.
    Type: Application
    Filed: June 30, 2017
    Publication date: November 2, 2017
    Inventors: Noritaka KISHI, Noboru NOGUCHI, Masanori OHARA, Shigetsugu YAMANAKA
  • Publication number: 20170316735
    Abstract: A drive circuit classifies frame periods as a drive period and a pause period, and applies a selection voltage to scanning lines in turn and applies voltages according to a video signal (a measurement voltage in the case of measurement targets) to data lines in turn during the drive period. During the pause period, the drive circuit applies the selection voltage to one scanning line corresponding to measurement target pixel circuits, and a measurement circuit measures drive currents outputted to the data lines from the measurement target pixel circuits. The drive circuit may set a write period and a measurement period in the pause period. During the write period, the drive circuit may apply the measurement voltage to the data lines. During the measurement period, the measurement circuit may measure drive currents outputted to the data lines from the measurement target pixel circuits.
    Type: Application
    Filed: July 13, 2017
    Publication date: November 2, 2017
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Masanori OHARA, Noboru NOGUCHI, Noritaka KISHI
  • Patent number: 9792858
    Abstract: A scanning line drive circuit includes a shift register having stages, hold circuits, and scanning signal output circuits. The hold circuit holds a shift register output in accordance with a sampling signal which is in an active level in one line period in a video signal period. The scanning signal output circuit outputs a scanning signal to be applied to scanning lines based on the shift register output, a hold output, a period specifying signal indicating whether it is in the video signal period or in a vertical flyback period, and timing signals. The scanning signal output circuit outputs a scanning signal for measurement and writing when the hold output is in a selection level in the vertical flyback period. It is possible to select a scanning line corresponding to the pixel circuits in one row and measure currents or voltages in the vertical flyback period, using a simple circuit.
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: October 17, 2017
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Daichi Nishikawa, Noritaka Kishi, Masanori Ohara
  • Patent number: 9754535
    Abstract: In a display device that has self light-emitting type display elements and that adopts time-division driving, power consumption is reduced over the conventional one. Each of emission lines is connected to the gate terminals of light-emission control transistors provided for organic EL elements of different light-emitting colors in three pixel circuits arranged side by side in an extension direction of scanning signal lines. When there is no change in image content throughout a period longer than or equal to a predetermined period during a time-division driving mode, an operating mode is switched to a pause driving mode. During the pause driving mode, emission drivers bring only first emission lines into a selected state, by which a still image with a ? resolution of an image displayed during the time-division driving mode is displayed on a display unit. During a pause period, peripheral drivers go into a pause state.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: September 5, 2017
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Masanori Ohara, Noboru Noguchi, Noritaka Kishi
  • Patent number: 9734762
    Abstract: In a pixel circuit (10), TFTs (12) to (16) are connected and driven such that a threshold voltage Vth of a TFT (11), which is a drive transistor, can be held in a threshold holding capacitor (19) having a capacitance value c1, voltages, including a data potential Vdata representing an image to be displayed, can be held in a data holding capacitor (18) having a capacitance value c2, and charges in the data holding capacitor (18) and the threshold holding capacitor (19) are redistributed at the time of light emission. As a result, a potential obtained by multiplying the data potential Vdata by c1/(c1+c2) is provided to a gate potential of the TFT (11).
    Type: Grant
    Filed: October 26, 2012
    Date of Patent: August 15, 2017
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Noritaka Kishi, Noboru Noguchi, Masanori Ohara, Shigetsugu Yamanaka
  • Patent number: 9734754
    Abstract: A drive circuit classifies frame periods as a drive period and a pause period, and applies a selection voltage to scanning lines in turn and applies voltages according to a video signal (a measurement voltage in the case of measurement targets) to data lines in turn during the drive period. During the pause period, the drive circuit applies the selection voltage to one scanning line corresponding to measurement target pixel circuits, and a measurement circuit measures drive currents outputted to the data lines from the measurement target pixel circuits. The drive circuit may set a write period and a measurement period in the pause period. During the write period, the drive circuit may apply the measurement voltage to the data lines. During the measurement period, the measurement circuit may measure drive currents outputted to the data lines from the measurement target pixel circuits.
    Type: Grant
    Filed: July 22, 2014
    Date of Patent: August 15, 2017
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Masanori Ohara, Noboru Noguchi, Noritaka Kishi
  • Patent number: 9711092
    Abstract: Provided is a driving method whereby it is possible to simultaneously compensate for both degradation of a drive transistor and degradation of a light-emitting element without causing special light emission at the time of detecting characteristics in a display device. In a display device which includes a pixel circuit including an electro-optic element and a drive transistor, a driving method includes: a first characteristic detection step for detecting a characteristic of the drive transistor; a second characteristic detection step for detecting a characteristic of the electro-optic element; a correction data storage step for storing characteristic data obtained based on detection results in the first and second characteristic detection steps as correction data; and a video signal correction step for correcting the video signal based on the correction data. The second characteristic detection step is performed in a light emission period.
    Type: Grant
    Filed: March 5, 2014
    Date of Patent: July 18, 2017
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Noritaka Kishi
  • Publication number: 20170200415
    Abstract: When a display mode is a high-resolution mode, image display is performed by time division driving. When the display mode is a low-resolution mode, image display is performed by defining j pixel circuits arranged continuously in a direction in which scanning signal lines extend as one group, bringing only one organic EL element into a light-emitting state in each of the pixel circuits in a frame period, and bringing organic EL elements having respective light emission colors different from one another into a light-emitting state in the j pixel circuits included in each group in the frame period. Pixel circuits in a display unit are configured such that the intervals of organic EL elements which go into a light-emitting state in the frame period when in the low-resolution mode are equalized regarding a direction in which the scanning signal lines extend.
    Type: Application
    Filed: July 8, 2015
    Publication date: July 13, 2017
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Noboru NOGUCHI, Masanori OHARA, Noritaka KISHI
  • Patent number: 9697769
    Abstract: In a display device having a pixel circuit including an electro-optical element in which brightness is controlled by a current, and including a drive transistor for controlling a current to be supplied to the electro-optical element, a drive method therefor includes: a noise measurement step of measuring noise; characteristic detection steps of detecting characteristics of the drive transistor and the electro-optical element; a correction data update step of updating correction data, which serves for correcting a video signal, based on detection results in the characteristic detection step; and a video signal correction step of correcting the video signal based on the correction data. When noise with a standard value or more is detected in the noise measurement step, processing of the correction data update step is not performed.
    Type: Grant
    Filed: July 29, 2014
    Date of Patent: July 4, 2017
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Noritaka Kishi, Noboru Noguchi, Shigetsugu Yamanaka, Masanori Ohara
  • Publication number: 20170186373
    Abstract: In a current measurement period set in a pause period, a display device of the present invention applies measurement voltages to data lines (S1 to Sm) and measures currents outputted to monitoring lines (M1 to Mm) from m pixel circuits (18), and then applies data voltages generated corresponding to video signals to the data lines (S1 to Sm).
    Type: Application
    Filed: June 5, 2015
    Publication date: June 29, 2017
    Inventors: Daichi NISHIKAWA, Yasuyuki OGAWA, Kaoru YAMAMOTO, Noritaka KISHI, Shigetsugu YAMANAKA, Masanori OHARA, Noboru NOGUCHI
  • Publication number: 20170162101
    Abstract: When a clock signal pulse number and a compensation-target-line address indicating a compensation-target row match, the following control is carried out with a time point being a starting point of a current measurement period, the time point being one horizontal scanning period after a time point of the match. At a current measurement period starting point and ending point, only the potential of the one of the clock signals applied to a unit circuit corresponding to the compensation-target row is changed. Throughout the current measurement period, the clock operation of the clock signals is stopped. A monitor enable signal, that is applied to a control terminal of an output control transistor for controlling active signal output to a monitor control line, is only set to a high level during the current measurement period.
    Type: Application
    Filed: August 28, 2014
    Publication date: June 8, 2017
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Masanori OHARA, Noboru NOGUCHI, Noritaka KISHI
  • Publication number: 20170148385
    Abstract: Provided is a driving method whereby it is possible to simultaneously compensate for both degradation of a drive transistor and degradation of a light-emitting element without causing special light emission at the time of detecting characteristics in a display device. In a display device which includes a pixel circuit including an electro-optic element and a drive transistor, a driving method includes: a detecting a characteristic of the drive transistor; detecting a characteristic of the electro-optic element; storing characteristic data obtained based on detection results in the first and second detection of characteristics of the drive transistor and electro-optic element, as correction data; and correcting the video signal based on the correction data.
    Type: Application
    Filed: February 7, 2017
    Publication date: May 25, 2017
    Applicant: Sharp Kabushiki Kaisha
    Inventor: Noritaka KISHI
  • Publication number: 20170140703
    Abstract: A scanning line drive circuit includes a shift register having stages, hold circuits, and scanning signal output circuits. The hold circuit holds a shift register output in accordance with a sampling signal which is in an active level in one line period in a video signal period. The scanning signal output circuit outputs a scanning signal to be applied to scanning lines based on the shift register output, a hold output, a period specifying signal indicating whether it is in the video signal period or in a vertical flyback period, and timing signals. The scanning signal output circuit outputs a scanning signal for measurement and writing when the hold output is in a selection level in the vertical flyback period. It is possible to select a scanning line corresponding to the pixel circuits in one row and measure currents or voltages in the vertical flyback period, using a simple circuit.
    Type: Application
    Filed: June 23, 2015
    Publication date: May 18, 2017
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Daichi NISHIKAWA, Noritaka KISHI, Masanori OHARA