Patents by Inventor Noritaka Kishi

Noritaka Kishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130181969
    Abstract: Provided is a display device that can sufficiently secure a period for threshold value detection with a simple configuration and that can inhibit occurrence of luminance non-uniformity. The display device includes a plurality of pixel circuits; a gate driver circuit connected to a plurality of scanning signal lines and a plurality of control lines; and a power control circuit connected to a plurality of power lines through a common power line. Each pixel circuit includes an organic EL element, a plurality of TFTs, and a capacitor. During each frame period, after initialization and threshold value detection are collectively performed on a plurality of rows, writing and light emission are performed sequentially on a row-by-row basis. Here, in a preceding frame (first frame) of two consecutive frame periods, writing is performed in order from the first row to the nth row (ascending order).
    Type: Application
    Filed: October 17, 2011
    Publication date: July 18, 2013
    Applicant: Sharp Kabushiki Kaisha
    Inventor: Noritaka Kishi
  • Publication number: 20130106823
    Abstract: A display device (100) includes a plurality of pixel circuits (10), a gate driver circuit (2) coupled to a plurality of scanning signal lines Gi and a plurality of control lines Ei, and a power control circuit (4) coupled to a plurality of power lines VPi via a common power line. The pixel circuits (10) each include an organic EL element, a plurality of TFTs, and a capacitor, and are controlled to collectively receive initialization potentials at the beginning of a frame through the power lines VPi, collectively perform threshold detection immediately thereafter, and then perform writing and light-emission operations. Thus, the aperture ratio of the pixel circuits (10) can be kept high, the power control circuit (4) typically has only one output buffer so that the circuit scale thereof is small, drive by potential is performed only once, so that power consumption is low, and threshold detection is performed only once, so that a sufficient amount of time can be ensured for a detection period.
    Type: Application
    Filed: June 1, 2011
    Publication date: May 2, 2013
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Noritaka Kishi, Noboru Noguchi
  • Publication number: 20130021312
    Abstract: A display device 100 includes a plurality of pixel circuits 10 arranged two-dimensionally; a plurality of power lines VPi provided for respective rows of the pixel circuits 10; p common power lines 9, each connected to two or more power lines VPi; and a power control circuit 4. Each pixel circuit 10 includes an organic EL element, a plurality of TFTs, and a capacitor and receives an initialization potential from a corresponding power line VPi. The power control circuit 4applies a power supply potential and the initialization potential to the p common power lines 9 in a switching manner. Accordingly, a display device is provided that has a configuration in which an initialization potential is provided to pixel circuits from power lines and that has a power control circuit small in circuit size.
    Type: Application
    Filed: January 25, 2011
    Publication date: January 24, 2013
    Applicant: Sharp Kabushiki Kaisha
    Inventor: Noritaka Kishi
  • Publication number: 20120249513
    Abstract: A display device of the present invention includes: pixels, each of which is provided with first to fourth transistors (Tr), and a light-emitting element, each pixel being configured so that a control terminal of the first Tr is connected to a first control line, a control terminal of the fourth Tr is connected to a scanning line, (iii) a first electrically-conductive terminal of the fourth Tr is connected to a data line, a first electrically-conductive terminal of the second Tr is connected to a first power supply line via the first Tr, a control terminal of the second Tr is connected to the data line via the fourth Tr and to a terminal of the light-emitting element via a capacitor, the terminal of the light-emitting element, a second electrically-conductive terminal of the second Tr, a first electrically-conductive terminal of the third Tr, and a control terminal of the third Tr are connected to each other; and a second control line (AZC) shared commonly by at least two pixels among the pixels, the at least
    Type: Application
    Filed: December 13, 2010
    Publication date: October 4, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Noritaka Kishi
  • Publication number: 20120248471
    Abstract: A pixel array substrate includes: a first through fourth transistors (Ta through Td); a light-emitting element (OEL); a scanning line connected with a control terminal of the fourth transistor; a data line connected with one conducting terminal of the fourth transistor; a first control line (AZi) connected with one conducting terminal of the third transistor; a second control line (Ei) connected with a control terminal of the first transistor; and a first power source line (Ypj) connected with one conducting terminal of the first transistor. One conducting terminal of the second transistor is connected with the first power source line via the first transistor. A control terminal of the second transistor is connected with the data line via the fourth transistor and with a terminal of the light-emitting element via a capacitor (C).
    Type: Application
    Filed: December 13, 2010
    Publication date: October 4, 2012
    Applicant: Sharp Kabushiki Kaisha
    Inventor: Noritaka Kishi
  • Patent number: 8242985
    Abstract: A pixel circuit (Aij) has a capacitor (Cs) having one of ends connected with a gate terminal of a DTFT (driving TFT) and the other end connected with a capacitance feedback line (CSi), a current-voltage conversion circuit (14) having an input terminal to which a feedback current flowing to a DDTFT (dummy driving circuit) is input when a predetermined potential is supplied to a gate terminal of the DDTFT having TFT characteristics substantially same as those of the DTFT in the pixel circuit (Aij) during a selected period for converting the feedback current into voltage and outputting a potential according to the voltage from an output terminal, and a changeover switch (CSW) for connecting the capacitance feedback line (CSi) corresponding to the pixel circuit (Aij) with the current-voltage conversion circuit (14) during the selected period and connecting the capacitance feedback line (CSi) corresponding to the pixel circuit (Aij) during a non-selected period with a constant potential supply line for supplying a
    Type: Grant
    Filed: September 11, 2008
    Date of Patent: August 14, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Noritaka Kishi, Akira Tagawa
  • Patent number: 8149188
    Abstract: A power source line 1 and a scanning line 3 are arranged on different wiring layers so as to be orthogonal to each other. In the wiring layer on which the scanning line 3 is arranged, a bypass line 111 is arranged on at least a part of a portion obtained by removing a planar position of the scanning line 3 from a planar position of the power source line 1. Contacts 121 and 122 establish electric connection between the power source line 1 and the bypass line 111. As described above, the bypass line 111 is connected to the power source line 1 in parallel, leading to decrease in resistance of the power source line 1 and suppression of unevenness in brightness at a display screen. Moreover, an additional manufacturing step for providing the bypass line 111 is unnecessary. Further, an aperture ratio is not reduced even when the bypass line 111 is provided. When the bypass line 111 is made wider than the power source line 1, a pixel circuit can be prevented from operating erroneously due to external light.
    Type: Grant
    Filed: February 1, 2007
    Date of Patent: April 3, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Noritaka Kishi
  • Publication number: 20120075361
    Abstract: A pixel circuit (6) is driven in an impulse mode in which an organic EL diode (7) emits light only during a selection period, or in a hold mode in which the organic EL diode (7) emits the light not during the selection period but after the selection period. Moreover, the pixel circuit (6) is provided with a programmed current source (I1) for lower-side gray scale display and a programmed current source (I2) for higher-side gray scale display, the pixel circuit (6) being supplied with a programmed current (I) from the programmed current source (I1) when the pixel circuit (6) is driven in the impulse mode, and a programmed current (I?) from the programmed current source (I2) when the pixel circuit (6) is driven in the hold mode.
    Type: Application
    Filed: March 4, 2010
    Publication date: March 29, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Noritaka Kishi
  • Publication number: 20110292025
    Abstract: The present invention achieves a display device capable of quick compensation of charging of parasitic capacitance with a simple configuration and low power consumption. The display device in accordance with the present invention includes (i) pixels, (ii) signal wires (Sj), and (iii) an operational amplifier (OP1) having a non-inverting input terminal connected with a corresponding signal wire (Sj). The operational amplifier (OP1) is configured such that: the non-inverting input terminal is connected with an output terminal (OUT) via a first impedance element (R1); an inverting input terminal is connected with the output terminal (OUT) via a second impedance element (R2); and the inverting input terminal is connected with a reference voltage terminal via a third impedance element (Cn).
    Type: Application
    Filed: March 2, 2010
    Publication date: December 1, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Noritaka Kishi
  • Publication number: 20110141084
    Abstract: A pixel circuit includes an organic EL element, a driving, and a switching provided between the gate and drain of the driving. Upon writing into the pixel circuit, an initial voltage is applied to the gate terminal of the driving, and the switching is temporarily controlled to a conducting state while the driving is in a conducting state, and a data voltage corrected using a gate terminal potential of the driving obtained at that time is applied to the gate terminal of the driving. In at least one embodiment, the human is sensitive to blue chromaticity differences but is insensitive to green chromaticity differences. An initial voltage that increases the accuracy of threshold correction is used for blue pixel circuits, and an initial voltage that reduces power consumption is used for green pixel circuits. By this, a current-driven type color display device with high image quality and low power consumption is provided.
    Type: Application
    Filed: June 2, 2009
    Publication date: June 16, 2011
    Applicant: Sharp Kabushiki Kaisha
    Inventor: Noritaka Kishi
  • Publication number: 20100238149
    Abstract: A pixel circuit (Aij) has a capacitor (Cs) having one of ends connected with a gate terminal of a DTFT (driving TFT) and the other end connected with a capacitance feedback line (CSi), a current-voltage conversion circuit (14) having an input terminal to which a feedback current flowing to a DDTFT (dummy driving circuit) is input when a predetermined potential is supplied to a gate terminal of the DDTFT having TFT characteristics substantially same as those of the DTFT in the pixel circuit (Aij) during a selected period for converting the feedback current into voltage and outputting a potential according to the voltage from an output terminal, and a changeover switch (CSW) for connecting the capacitance feedback line (CSi) corresponding to the pixel circuit (Aij) with the current-voltage conversion circuit (14) during the selected period and connecting the capacitance feedback line (CSi) corresponding to the pixel circuit (Aij) during a non-selected period with a constant potential supply line for supplying a
    Type: Application
    Filed: September 11, 2008
    Publication date: September 23, 2010
    Inventors: Noritaka Kishi, Akira Tagawa
  • Publication number: 20100045646
    Abstract: In a pixel circuit 10, TFTs 12 and 13 are turned on while a TFT 14 is turned off, and a voltage (VDD+Vx) which depends on a threshold voltage Vth of a driving TFT 11 is read onto a data line Sj. Moreover, switches 21 and 22 in a source driver circuit are turned on, and a voltage Vx is held at a capacitor 26. Next, the TFT 13 is turned off, states of switches 21 to 24 are switched, and a voltage (Vdata+Vx) is applied to the data line Sj. Further, the TFT 12 is turned off while the TFT 14 is turned on. An amount of an electric current flowing through an organic EL element 15 after the turn-on of the TFT 14 is determined from the voltage (Vdata+Vx) of a gate terminal of the driving TFT 11. Thus, it is possible to efficiently utilize an amplitude of a data voltage and compensate variations in threshold voltage of the driving TFT 11 with high accuracy, without increasing a scale of the pixel circuit 10.
    Type: Application
    Filed: October 1, 2007
    Publication date: February 25, 2010
    Inventor: Noritaka Kishi
  • Publication number: 20100001932
    Abstract: In one embodiment of the present invention provides a display device in which the occurrence of luminance unevenness in an electro-optical element due to outside temperature variation or local temperature variation within a display panel is reduced without cost increase or increase in mounting area, and a driving method of the display device. In one example embodiment, a driving transistor flows a driving current in accordance with a signal voltage supplied via a data line, so that gray scale display in accordance with the signal voltage is carried out. An electro-optical element emits light in response to the driving current. The driving transistor is provided with a signal voltage at displaying a center gray scale among all display gray scale levels within a voltage region in which the driving current in a temperature range of 0° C. to 40° C. is in a range of 98% to 102% of a driving current that flows at an average driving temperature.
    Type: Application
    Filed: July 24, 2007
    Publication date: January 7, 2010
    Inventor: Noritaka Kishi
  • Publication number: 20090167645
    Abstract: A power source line 1 and a scanning line 3 are arranged on different wiring layers so as to be orthogonal to each other. In the wiring layer on which the scanning line 3 is arranged, a bypass line 111 is arranged on at least a part of a portion obtained by removing a planar position of the scanning line 3 from a planar position of the power source line 1. Contacts 121 and 122 establish electric connection between the power source line 1 and the bypass line 111. As described above, the bypass line 111 is connected to the power source line 1 in parallel, leading to decrease in resistance of the power source line 1 and suppression of unevenness in brightness at a display screen. Moreover, an additional manufacturing step for providing the bypass line 111 is unnecessary. Further, an aperture ratio is not reduced even when the bypass line 111 is provided. When the bypass line 111 is made wider than the power source line 1, a pixel circuit can be prevented from operating erroneously due to external light.
    Type: Application
    Filed: February 1, 2007
    Publication date: July 2, 2009
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Noritaka Kishi
  • Patent number: 7391010
    Abstract: The photoelectric encoder of the present invention has a light-emitting device and light-receiving devices arranged in one direction in a region that light from the light-emitting device can reach. When a moving object that alternately has a light-on portion that produces a state in which light is incident on the light-receiving device and a light-off portion that produces a state in which light is not incident on the light-receiving device passes at a prescribed movement frequency in the one direction, an output of each of the light-receiving devices takes a value corresponding to the incidence or nonincidence of light on the light-receiving device. A logical operating section carries out operation of the logical values expressed by the outputs of the light-receiving devices to form an output signal that has a frequency different from the movement frequency.
    Type: Grant
    Filed: April 5, 2006
    Date of Patent: June 24, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Norikazu Okada, Noritaka Kishi, Keiko Higashi
  • Publication number: 20060226349
    Abstract: The photoelectric encoder of the present invention has a light-emitting device and light-receiving devices arranged in one direction in a region that light from the light-emitting device can reach. When a moving object that alternately has a light-on portion that produces a state in which light is incident on the light-receiving device and a light-off portion that produces a state in which light is not incident on the light-receiving device passes at a prescribed movement frequency in the one direction, an output of each of the light-receiving devices takes a value corresponding to the incidence or nonincidence of light on the light-receiving device. A logical operating section carries out operation of the logical values expressed by the outputs of the light-receiving devices to form an output signal that has a frequency different from the movement frequency.
    Type: Application
    Filed: April 5, 2006
    Publication date: October 12, 2006
    Inventors: Norikazu Okada, Noritaka Kishi, Keiko Higashi