Patents by Inventor Noriyasu Echigo
Noriyasu Echigo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8480804Abstract: A method for forming a thin film includes the steps of: supplying a deposition material in the form of a liquid onto a heated surface; heating and vaporizing the deposition material on the heated surface while the deposition material is undergoing movement; and depositing the deposition material onto a deposition surface. The deposition material is supplied onto a position of the heated surface where the vaporized deposition material does not reach the deposition surface.Type: GrantFiled: April 15, 2010Date of Patent: July 9, 2013Assignee: Panasonic CorporationInventors: Kazuyoshi Honda, Masaru Odagiri, Kiyoshi Takahashi, Noriyasu Echigo, Nobuki Sunagare
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Publication number: 20110175524Abstract: A high definition plasma display panel which can display a video of a higher brightness and yet can be driven at a low power consumption is realized. To this end, a plasma display panel includes front panel including display electrode formed on glass substrate, dielectric layer covering display electrode, and protective layer formed on dielectric layer; and a rear panel opposing to front panel to form a discharge space filled with discharge gas, and including an address electrode formed along a direction intersecting with display electrode, and a barrier rib partitioning the discharge space. Protective layer is formed of a metal oxide made of magnesium oxide and calcium oxide and contains zinc. In an X-ray diffraction analysis on a surface of protective layer, a diffraction angle where a peak of the metal oxide occurs exists between a diffraction angle where a peak of the magnesium oxide occurs and a diffraction angle where a peak of the calcium oxide occurs.Type: ApplicationFiled: December 10, 2009Publication date: July 21, 2011Inventors: Jun Hashimoto, Masashi Gotou, Noriyasu Echigo
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Publication number: 20100192858Abstract: A method for forming a thin film includes the steps of: supplying a deposition material in the form of a liquid onto a heated surface; heating and vaporizing the deposition material on the heated surface while the deposition material is undergoing movement; and depositing the deposition material onto a deposition surface. The deposition material is supplied onto a position of the heated surface where the vaporized deposition material does not reach the deposition surface.Type: ApplicationFiled: April 15, 2010Publication date: August 5, 2010Inventors: Kazuyoshi HONDA, Masaru Odagiri, Kiyoshi Takahashi, Noriyasu Echigo, Nobuki Sunagare
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Patent number: 7501762Abstract: There are provided a PDP having a higher luminous efficiency and a process for producing the same. In a plasma display panel filled with a discharge gas between a front plate and a rear plate opposed to each other, the front plate 100 comprises a glass substrate 1, electrodes 2 (transparent electrodes 2a and bus electrodes 2b) on the glass substrate 1, the first dielectric layer 4 covering the electrodes 2 and the glass substrate 1 and containing a fluorine atom, the second dielectric layer 5 covering the first dielectric layer 4 and containing a fluorine atom at a less amount than that in the first dielectric layer 4, and a protective layer 6 covering the second dielectric layer 5.Type: GrantFiled: July 12, 2006Date of Patent: March 10, 2009Assignee: Panasonic CorporationInventors: Tomohiro Okumura, Hiroyuki Yamakita, Noriyasu Echigo, Mitsuo Saitoh, Junko Asayama, Keisuke Okada
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Publication number: 20080211408Abstract: An object of the present invention is to provide a plasma display panel and a manufacturing method thereof that can prevent a dielectric layer and a protective layer from being deteriorated and give excellent image display performance, by performing a sealing process effectively. The object can be realized by a plasma display panel including a front panel 10 and a back panel 11 arranged in opposing to each other at a certain gap, the front panel and the back panel being sealed by a sealing layer 17 that is provided on entire peripheral portions of main surfaces of the front panel and the back panel, and the sealing layer is composed of at least one material selected from the group consisting of an organic resin material, an inorganic material, and a metal material (more specifically, a silica material as a main component and an epoxy resin material).Type: ApplicationFiled: August 11, 2005Publication date: September 4, 2008Inventors: Hiroyuki Yamakita, Masatoshi Kitagawa, Mikihiko Nishitani, Noriyasu Echigo, Tomohiro Okumura, Hiroaki Ishio, Hikaru Nishitani
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Publication number: 20070013312Abstract: There are provided a PDP having a higher luminous efficiency and a process for producing the same. In a plasma display panel filled with a discharge gas between a front plate and a rear plate opposed to each other, the front plate 100 comprises a glass substrate 1, electrodes 2 (transparent electrodes 2a and bus electrodes 2b) on the glass substrate 1, the first dielectric layer 4 covering the electrodes 2 and the glass substrate 1 and containing a fluorine atom, the second dielectric layer 5 covering the first dielectric layer 4 and containing a fluorine atom at a less amount than that in the first dielectric layer 4, and a protective layer 6 covering the second dielectric layer 5.Type: ApplicationFiled: July 12, 2006Publication date: January 18, 2007Inventors: Tomohiro Okumura, Hiroyuki Yamakita, Noriyasu Echigo, Mitsuo Saitoh, Junko Asayama, Keisuke Okada
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Publication number: 20060292813Abstract: Electrode layers (1, 2) are arranged on both sides of a dielectric layer (3) facing each other so as to configure a capacitor. Lead electrodes (4, 5) are formed in the electrode layers (1, 2). A penetrating electrode (6) that is insulated from the electrode layers (1, 2) is formed. An electronic component (10) configured in this manner is mounted on a wiring board, and a semiconductor chip can be mounted thereon. Along with connecting the semiconductor chip to the wiring board via the penetrating electrode (6), the semiconductor chip or the wiring board is connected to the lead electrodes (4, 5). In this manner, while suppressing the size increase of a mounted area, the capacitor or the like can be arranged near the semiconductor chip. Thus, the semiconductor chip is driven with high frequency more easily.Type: ApplicationFiled: July 27, 2006Publication date: December 28, 2006Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Kazuyoshi Honda, Noriyasu Echigo, Masaru Odagiri, Takanori Sugimoto
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Patent number: 7118984Abstract: Electrode layers (1, 2) are arranged on both sides of a dielectric layer (3) facing each other so as to configure a capacitor. Lead electrodes (4, 5) are formed in the electrode layers (1, 2). A penetrating electrode (6) that is insulated from the electrode layers (1, 2) is formed. An electronic component (10) configured in this manner is mounted on a wiring board, and a semiconductor chip can be mounted thereon. Along with connecting the semiconductor chip to the wiring board via the penetrating electrode (6), the semiconductor chip or the wiring board is connected to the lead electrodes (4, 5). In this manner, while suppressing the size increase of a mounted area, the capacitor or the like can be arranged near the semiconductor chip. Thus, the semiconductor chip is driven with high frequency more easily.Type: GrantFiled: February 14, 2003Date of Patent: October 10, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kazuyoshi Honda, Noriyasu Echigo, Masaru Odagiri, Takanori Sugimoto
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Patent number: 7006344Abstract: The present invention provides a bis(4-mercaptophenyl) sulfide derivative represented by general formula 1. This derivative is a monomer that can form a dielectric film suitable for an electronic component. The present invention further provides a method for producing this derivative and an electronic component having high characteristics under excellent humidity and high temperature.Type: GrantFiled: July 23, 2001Date of Patent: February 28, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Noriyasu Echigo, Kazuyoshi Honda, Yoshiaki Kai, Masaru Odagiri, Hisaaki Tachihara, Hideki Matsuda, Jun Katsube, Kazuo Iwaoka, Takanori Sugimoto, Nobuki Sunagare
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Patent number: 6942903Abstract: A method for forming a thin film includes the steps of: supplying a deposition material in the form of a liquid onto a heated surface; heating and vaporizing the deposition material on the heated surface while the deposition material is undergoing movement; and depositing the deposition material onto a deposition surface. The deposition material is supplied onto a position of the heated surface where the vaporized deposition material does not reach the deposition surface.Type: GrantFiled: March 4, 2003Date of Patent: September 13, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kazuyoshi Honda, Masaru Odagiri, Kiyoshi Takahashi, Noriyasu Echigo, Nobuki Sunagare
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Publication number: 20050129860Abstract: A liquid resin material stored in a resin material cup is sent to a supply tank under pressure through a primary side supply pipe by increasing the pressure in a pressure tank. The supply tank is provided with a piston that is displaced in accordance with the amount of the resin material in the supply tank, and the resin material is quantified by the stroke of the piston. The quantified resin material is sent to a heating member through an evaporation side supply pipe, is evaporated by heating, and condenses on a substrate. The resin material is quantified by filling the supply tank with the resin material temporarily, and only the filling resin material is sent to the heating member. Therefore, an evaporation amount becomes constant, and as a result, the thickness of a resin thin film is stabilized.Type: ApplicationFiled: April 2, 2003Publication date: June 16, 2005Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Noriyasu Echigo, Hiroshi Satani, Hideki Okumura, Hisaaki Tachihara
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Patent number: 6879481Abstract: A layered product comprising a plurality of deposition units, each comprising a thin resin layer and a thin metal layer wherein the surface roughness of the thin resin layer is 0.1 ?m or below, a protrusion forming component is not added to the thin resin layer or the surface roughness of the thin metal layer is 0.1 ?m or below. The surface characteristics are improved regardless of the thickness of the layered product and the requirement of high performance thin film can be satisfied because the layered product contains no foreign matter. The layered product is suitably applicable to electronic parts, e.g., a capacitor, especially a chip capacitor.Type: GrantFiled: April 5, 2002Date of Patent: April 12, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kazuyoshi Honda, Noriyasu Echigo, Masaru Odagiri, Nobuki Sunagare, Shinichi Suzawa
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Patent number: 6838153Abstract: A method for producing a laminate having resin layers and thin metal layers by repeating a process unit comprising a step of laminating a resin layer by applying a resin material, a step of depositing a patterning material on the resin layer and a step of laminating a thin metal layer, predetermined times on a turning support (511), wherein the patterning material is stuck on the surface of the resin layer in a noncontact way. A laminate comprising a large number of laminate units each comprising a resin layer and a thin metal layer divided at an electric insulation stripe part can be produced stably. The laminate is applicable to production of a high performance small capacitor at low cost.Type: GrantFiled: December 6, 2002Date of Patent: January 4, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kazuyoshi Honda, Noriyasu Echigo, Masaru Odagiri, Nobuki Sunagare, Shinichi Suzawa
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Patent number: 6829135Abstract: Resin thin films (12) and metal thin films (11a, 11b) are layered in alternation. The metal thin films are set back from the peripheral edges of the resin thin films (12). Via holes (13a, 13b) penetrating the layered product in the layering direction are formed and filled with conductive material (14a, 14b). The conductive material (14a, 14b) electrically connects the metal thin films (11a, 11b) among one another. The metal thin films are not exposed at the periphery, so that corrosion of the metal thin films is not likely to occur. Furthermore, cutting of the metal thin films during the manufacturing process is avoided.Type: GrantFiled: November 27, 2001Date of Patent: December 7, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kazuyoshi Honda, Noriyasu Echigo, Yoshiaki Kai, Masaru Odagiri, Nobuki Sunagare
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Publication number: 20040123646Abstract: In a gas permeability measurement method according to the present invention, an isotopic gas having a mass number different to that of a target gas for measurement is introduced into one of two spaces divided by a test piece, and the isotopic gas having permeated the test piece and transferred to another space is detected to thereby measure the permeability of the target gas.Type: ApplicationFiled: December 11, 2003Publication date: July 1, 2004Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTDInventors: Noriyasu Echigo, Hideki Okumura, Hiroshi Satani
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Patent number: 6721165Abstract: A layered product comprising a plurality of deposition units, each comprising a thin resin layer and a thin metal layer wherein the surface roughness of the thin resin layer is 0.1 &mgr;m or below, a protrusion forming component is not added to the thin resin layer or the surface roughness of the thin metal layer is 0.1 &mgr;m or below. The surface characteristics are improved regardless of the thickness of the layered product and the requirement of high performance thin film can be satisfied because the layered product contains no foreign matter. The layered product is suitably applicable to electronic parts, e.g., a capacitor, especially a chip capacitor.Type: GrantFiled: April 5, 2002Date of Patent: April 13, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kazuyoshi Honda, Noriyasu Echigo, Masaru Odagiri, Nobuki Sunagare, Shinichi Suzawa
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Patent number: 6714401Abstract: A method for forming a thin film includes the steps of: supplying a deposition material in the form of a liquid onto a heated surface; heating and vaporizing the deposition material on the heated surface while the deposition material is undergoing movement; and depositing the deposition material onto a deposition surface. The deposition material is supplied onto a position of the heated surface where the vaporized deposition material does not reach the deposition surface.Type: GrantFiled: March 4, 2003Date of Patent: March 30, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kazuyoshi Honda, Masaru Odagiri, Kiyoshi Takahashi, Noriyasu Echigo, Nobuki Sunagare
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Patent number: 6710997Abstract: A layered product including a plurality of deposition units, each having a thin resin layer and a thin metal layer wherein the surface roughness of the thin resin layer is 0.1 &mgr;m or below, a protrusion forming component is not added to the thin resin layer or the surface roughness of the thin metal layer is 0.1 &mgr;m or below. The surface characteristics are improved regardless of the thickness of the layered product and the requirement of high performance thin film can be satisfied because the layered product contains no foreign matter. The layered product is suitably applicable to electronic parts, e.g., a capacitor, especially a chip capacitor.Type: GrantFiled: May 1, 2002Date of Patent: March 23, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kazuyoshi Honda, Noriyasu Echigo, Masaru Odagiri, Nobuki Sunagare, Shinichi Suzawa
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Patent number: 6704190Abstract: A layered product comprising a plurality of deposition units, each comprising a thin resin layer and a thin metal layer wherein the surface roughness of the thin resin layer is 0.1 &mgr;m or below, a protrusion forming component is not added to the thin resin layer or the surface roughness of the thin metal layer is 0.1 &mgr;m or below. The surface characteristics are improved regardless of the thickness of the layered product and the requirement of high performance thin film can be satisfied because the layered product contains no foreign matter. The layered product is suitably applicable to electronic parts, e.g., a capacitor, especially a chip capacitor.Type: GrantFiled: April 5, 2002Date of Patent: March 9, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kazuyoshi Honda, Noriyasu Echigo, Masaru Odagiri, Nobuki Sunagare, Shinichi Suzawa
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Publication number: 20030189808Abstract: The present invention provides a bis(4-mercaptophenyl) sulfide derivative represented by general formula 1. This derivative is a monomer that can form a dielectric film suitable for an electronic component. The present invention further provides a method for producing this derivative and an electronic component having high characteristics under excellent humidity and high temperature.Type: ApplicationFiled: April 11, 2003Publication date: October 9, 2003Inventors: Noriyasu Echigo, Kazuyoshi Honda, Yoshiaki Kai, Masaru Odagiri, Hisaaki Tachihara, Hideki Matsuda, Jun Katsube, Kazuo Iwaoka, Takanori Sugimoto, Nobuki Sunagare