Abstract: A system and a method are provided for improving memory management in a multiprocessor system. A direct memory access (DMA) operation is set up for a first processor. A DMA effective address is translated to a virtual address. The virtual address is translated to a physical address, which is used to access a memory hierarchy of the multiprocessor system.

Abstract: A system and method are provided for efficiently processing data with a cache in a computer system. The computer system has a processor, a cache and a system memory. The processor issues a data request for streaming data. The streaming data has one or more small data portions. The system memory is in communication with the processor. The system memory has a specific area for storing the streaming data. The cache is coupled to the processor. The cache has a predefined area locked for the streaming data. A cache controller is coupled to the cache and is in communication with both the processor and the system memory to transmit at least one small data portion of the streaming data from the specific area of the system memory to the predefined area of the cache when the one small data portion is not found in the predefined area of the cache.

Abstract: An apparatus which uses channel counters in combination with channel count read instructions as a means of providing information that data in a given channel is valid or has not been previously read. The counter may also, in the situation of the channel being defined as blocking, be used to prevent the unintentional overwriting of data in a register used by the channel or, alternatively, prevent further communications with the device assigned to that channel when a given count occurs. Intelligent external devices may also use channel count read instructions sent to the counting mechanism for reading from and writing to the channel.

Abstract: The present invention discloses, in one aspect, a microprocessor. In one embodiment, the microprocessor includes a processing element configured to process an application using a bandwidth. The microprocessor also includes an access shaper coupled to the processing element and configured to shape storage requests for the processing of the application. In this embodiment, the microprocessor further includes bandwidth management circuitry coupled to the access shaper and configured to track the bandwidth usage based on the requests. A method of coordinating bandwidth allocation and a processor assembly are also disclosed.

Abstract: A method and an apparatus are provided for enhancing lock acquisition in a multiprocessor system. A lock-load instruction is sent from a first processor to a cache. In response, a reservation flag for the first processor is set, and lock data is sent to the first processor. The lock data is placed in target and shadow registers of the first processor. Upon a determination that the lock is taken, the lock-load instruction is resent from the first processor to the cache. Upon a determination that the reservation flag is still set for the first processor, a status-quo signal is sent to the first processor without resending the lock data to the first processor. In response, the lock data is copied from the shadow register to the target register.

Abstract: A system and a method are provided for improving memory management in a multiprocessor system. A direct memory access (DMA) operation is set up for a first processor. A DMA effective address is translated to a virtual address. The virtual address is translated to a physical address, which is used to access a memory hierarchy of the multiprocessor system.

Abstract: The present invention provides for asynchronous DMA command completion notification in a computer system. A command tag, associated with a plurality DMA command is generated. A DMA data movement command having the command tag is grouped with another DMA data movement command having the command tag. DMA commands belonging to the same tag group are monitored to see whether all DMA commands of the same tag group are completed.

Abstract: The present invention provides for atomic update primitives in an asymmetric single-chip heterogeneous multiprocessor computer system having a shared memory with DMA transfers. At least one lock line command is generated from a set comprising a get lock line command with reservation, a put lock line conditional command, and a put lock line unconditional command.

Abstract: A system and method are provided for improving performance of a computer system by providing a direct data transfer between different processors. The system includes a first and second processor. The first processor is in need of data. The system also includes a directory in communication with the first processor. The directory receives a data request for the data and contains information as to where the data is stored. A cache is coupled to the second processor. An internal bus is coupled between the first processor and the cache to transfer the data from the cache to the first processor when the data is found to be stored in the cache.

Abstract: A system and method are provided for efficiently processing data with a cache in a computer system. The computer system has a processor, a cache and a system memory. The processor issues a data request for streaming data. The streaming data has one or more small data portions. The system memory is in communication with the processor. The system memory has a specific area for storing the streaming data. The cache is coupled to the processor. The cache has a predefined area locked for the streaming data. A cache controller is coupled to the cache and is in communication with both the processor and the system memory to transmit at least one small data portion of the streaming data from the specific area of the system memory to the predefined area of the cache when the one small data portion is not found in the predefined area of the cache.

Abstract: A system and method are provided for improving performance of a computer system by providing a direct data transfer between different processors. The system includes a first and second processor. The first processor is in need of data. The system also includes a directory in communication with the first processor. The directory receives a data request for the data and contains information as to where the data is stored. A cache is coupled to the second processor. An internal bus is coupled between the first processor and the cache to transfer the data from the cache to the first processor when the data is found to be stored in the cache.

Abstract: A system and method are provided for directly accessing a cache for data. A data transfer request is sent to a system bus for transferring data to a system memory. The data transfer request is snooped. A snoop request is sent to a cache. It is determined whether the snoop request has a valid entry in the cache. Upon determining that the snoop request has a valid entry in the cache, the data is caught and sent to the cache for update.

Abstract: Memory management in a computer system is improved by preventing a subset of address translation information from being replaced with other types of address translation information in a cache memory reserved for storing such address translation information for faster access by a CPU. This way, the CPU can identify the subset of address translation information stored in the cache.

Abstract: A power supply method and apparatus of a line interactive UPS utilizes a bi-directional AC/AC power converter in association with the AC delta control concept. When the line voltage coupled to the AC/AC power convert exceeds high/low statuses, the UPS is operated in a line voltage conversion mode, wherein the AC/AC power converter supplies a voltage to compensated the line voltage based on the stability of the line voltage, and then the compensated stable voltage is further provided to the load so as to perform the voltage boost (step-up) and/or voltage buck (step-down).

Abstract: A method and implementing apparatus is provided for transferring data from a first device to a second device through a system coupling call. The coupling methodology is implemented to effect a direct coupling between a data producing device and a data receiving device such that data transfers between devices is passed more directly between devices with only minimal copying of the data during the transfer process. The coupling subsystem enables the construction of coupling modules which provide services and afford the opportunity to optimize the transference of data between two devices and permit the dynamic construction of coupling modules to provide coupling service between any pair of devices. In one example, video calls have been created to interface within the new data coupling environment.

Abstract: A method is described for preloading operating system software onto a computer system. A manufacturing compact disk is provided which stores the complete range of software which may be stored on the computer system. Associated with the computer system is a manufacturing diskette which includes installation files which define which software on the CD is to be transferred to the system. This manufacturing diskette also includes diagnostic and/or other code which is employed at other stages of the system assembly process. In operation, the CD and diskette are inserted into the system and the software defined by the diskette installation files is transferred from the CD to the system hardfile.

Abstract: A method and implementing computer system is provided including a multimedia server connected in a network configuration with client computer systems. The multimedia server includes various functional units which are selectively operable for delivering and effecting the presentation of multimedia files to the client such that a plurality of multimedia files are seamlessly concatenated on the fly to enable a continuous and uninterrupted presentation to the client. In one example, client selected video files are seamlessly joined together at the server just prior to file delivery from the server. The methodology includes the analog to digital encoding of multimedia segments followed by a commonization processing to ensure that all of the multimedia segments have common operating characteristics.

Abstract: A system, method and computer program are provided for a control server in a client/server environment wherein an API framework facilitates scalable, network transparent, integrated multimedia content loading and data streaming. Concurrent real time content loading and data streaming are possible and techniques are included for admitting new streams only when they can be serviced without negatively affecting current system performance.

Abstract: A method of delivering data in an on-time manner across a communicating environment, such as multimedia data in a network or broadcast environment. The data is transmitted from a data pump at a revised transmission time which is a function of a base transmission time and a delay value. The delay value is calibrated by monitoring one or more processes between the data pump and an associated controller which receives requests from clients. The controller may include an application server which handles the requests, and a control server which processes commands from the application server and provides corresponding control functions to the data pump.

Abstract: In order to increase the number of datastreams provided by a multimedia system, a cluster of clusters of multimedia A/V server subsystems is provided. Each cluster in turn is comprised of a plurality of A/V servers, a shared loop architecture plurality of data storage devices interconnected to the A/V servers whereby any storage device is substantially equally accessible by any of the servers in the cluster; and a highly available control server subsystem interconnected to the A/V servers and the data storage devices for controlling the A/V servers and the data storage devices. Each of the clusters is interconnected to a high speed switch for delivery of datastreams from the cluster to the end user. One of the control server subsystems also serves as a master control server assigning a request for a datastream to one of the clusters.