Patents by Inventor Ofer Iny
Ofer Iny has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11811663Abstract: In one embodiment, a load balancing method may comprise: assigning a plurality of packets of a flow to a plurality of segments according to a segmentation criterion, each segment including one or more packets of said plurality of packets, and at least one of the plurality of segments including more than one packet of the plurality of packets; tagging each packet of the plurality of packets with a segment sequence identifier to indicate to which segment the packet is assigned; and arranging the plurality of packets for transmission via an interconnect so that all packets belonging to a same segment will be transmitted via a same path.Type: GrantFiled: January 14, 2022Date of Patent: November 7, 2023Assignee: CISCO TECHNOLOGY, INC.Inventors: Ofer Iny, Eyal Michel Dagan, Aviran Kadosh
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Publication number: 20230283577Abstract: In one embodiment, quasi-Output Queue behavior of a packet switching device is achieved using virtual output queue (VOQ) ordering independently determined for each particular output queue (OQ), including using maintained latency information of the VOQs of the particular OQ. In one embodiment, all packets from all VOQs with a same port-priority destination experience similar latency within specific time-window, which is similar to the packet service provided by an Output Queue switch architecture. In one embodiment, all input ports that send traffic to same output port-priority receive bandwidth which is proportional to their bandwidth demand divided by total bandwidth. Prior approaches that emulate the performance of an OQ switch architecture require complex and time-consuming scheduling determinations and do not scale. Independently determining the order for sending packets from the VOQs associated with each particular OQ provides a scalable and implementable system with quasi-Output Queue behavior.Type: ApplicationFiled: May 15, 2023Publication date: September 7, 2023Inventors: Nadav CHACHMON, Ofer INY, Aviram YERUCHAMI
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Patent number: 11683276Abstract: In one embodiment, quasi-Output Queue behavior of a packet switching device is achieved using virtual output queue (VOQ) ordering independently determined for each particular output queue (OQ), including using maintained latency information of the VOQs of the particular OQ. In one embodiment, all packets from all VOQs with a same port-priority destination experience similar latency within specific time-window, which is similar to the packet service provided by an Output Queue switch architecture. In one embodiment, all input ports that send traffic to same output port-priority receive bandwidth which is proportional to their bandwidth demand divided by total bandwidth. Prior approaches that emulate the performance of an OQ switch architecture require complex and time-consuming scheduling determinations and do not scale. Independently determining the order for sending packets from the VOQs associated with each particular OQ provides a scalable and implementable system with quasi-Output Queue behavior.Type: GrantFiled: May 20, 2021Date of Patent: June 20, 2023Assignee: Cisco Technology, Inc.Inventors: Nadav Chachmon, Ofer Iny, Aviram Yeruchami
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Publication number: 20220377026Abstract: In one embodiment, quasi-Output Queue behavior of a packet switching device is achieved using virtual output queue (VOQ) ordering independently determined for each particular output queue (OQ), including using maintained latency information of the VOQs of the particular OQ. In one embodiment, all packets from all VOQs with a same port-priority destination experience similar latency within specific time-window, which is similar to the packet service provided by an Output Queue switch architecture. In one embodiment, all input ports that send traffic to same output port-priority receive bandwidth which is proportional to their bandwidth demand divided by total bandwidth. Prior approaches that emulate the performance of an OQ switch architecture require complex and time-consuming scheduling determinations and do not scale. Independently determining the order for sending packets from the VOQs associated with each particular OQ provides a scalable and implementable system with quasi-Output Queue behavior.Type: ApplicationFiled: May 20, 2021Publication date: November 24, 2022Applicant: Cisco Technology, Inc., a California corporationInventors: Nadav CHACHMON, Ofer INY, Aviram YERUCHAMI
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Publication number: 20220368635Abstract: In one embodiment, a load balancing method may comprise: assigning a plurality of packets of a flow to a plurality of segments according to a segmentation criterion, each segment including one or more packets of said plurality of packets, and at least one of the plurality of segments including more than one packet of the plurality of packets; tagging each packet of the plurality of packets with a segment sequence identifier to indicate to which segment the packet is assigned; and arranging the plurality of packets for transmission via an interconnect so that all packets belonging to a same segment will be transmitted via a same path.Type: ApplicationFiled: January 14, 2022Publication date: November 17, 2022Inventors: Ofer INY, Eyal Michel DAGAN, Aviran KADOSH
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Patent number: 11258710Abstract: In one embodiment, a load balancing method may comprise: assigning a plurality of packets of a flow to a plurality of segments according to a segmentation criterion, each segment including one or more packets of said plurality of packets, and at least one of the plurality of segments including more than one packet of the plurality of packets; tagging each packet of the plurality of packets with a segment sequence identifier to indicate to which segment the packet is assigned; and arranging the plurality of packets for transmission via an interconnect so that all packets belonging to a same segment will be transmitted via a same path.Type: GrantFiled: October 29, 2019Date of Patent: February 22, 2022Assignee: CISCO TECHNOLOGY, INC.Inventors: Ofer Iny, Eyal Michel Dagan, Aviran Kadosh
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Patent number: 10938724Abstract: Techniques for flow rate based load balancing are described. In one embodiment, a method includes receiving a packet associated with a packet flow at an ingress top-of-rack switch in a spine-leaf network. The method includes determining identification information for the packet flow, including a source and a destination. Based on the identification information, the method includes determining an instantaneous flow rate for a first path through the network from the source to the destination. The method also includes comparing the instantaneous flow rate to an average flow rate. Based on the comparison between the instantaneous flow rate to the average flow rate, the method includes assigning the packet flow to one of the first path or a second path.Type: GrantFiled: July 23, 2018Date of Patent: March 2, 2021Assignee: Cisco Technology, Inc.Inventors: Nadav Tsvi Chachmon, Ofer Iny, Aviran Kadosh
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Publication number: 20200067839Abstract: In one embodiment, a load balancing method may comprise: assigning a plurality of packets of a flow to a plurality of segments according to a segmentation criterion, each segment including one or more packets of said plurality of packets, and at least one of the plurality of segments including more than one packet of the plurality of packets; tagging each packet of the plurality of packets with a segment sequence identifier to indicate to which segment the packet is assigned; and arranging the plurality of packets for transmission via an interconnect so that all packets belonging to a same segment will be transmitted via a same path.Type: ApplicationFiled: October 29, 2019Publication date: February 27, 2020Inventors: Ofer INY, Eyal Michel DAGAN, Aviran KADOSH
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Publication number: 20200028786Abstract: Techniques for flow rate based load balancing are described. In one embodiment, a method includes receiving a packet associated with a packet flow at an ingress top-of-rack switch in a spine-leaf network. The method includes determining identification information for the packet flow, including a source and a destination. Based on the identification information, the method includes determining an instantaneous flow rate for a first path through the network from the source to the destination. The method also includes comparing the instantaneous flow rate to an average flow rate. Based on the comparison between the instantaneous flow rate to the average flow rate, the method includes assigning the packet flow to one of the first path or a second path.Type: ApplicationFiled: July 23, 2018Publication date: January 23, 2020Inventors: Nadav Tsvi Chachmon, Ofer Iny, Aviran Kadosh
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Patent number: 10505849Abstract: In one embodiment, a load balancing method may comprise: assigning a plurality of packets of a flow to a plurality of segments according to a segmentation criterion, each segment including one or more packets of said plurality of packets, and at least one of the plurality of segments including more than one packet of the plurality of packets; tagging each packet of the plurality of packets with a segment sequence identifier to indicate to which segment the packet is assigned; and arranging the plurality of packets for transmission via an interconnect so that all packets belonging to a same segment will be transmitted via a same path.Type: GrantFiled: June 30, 2016Date of Patent: December 10, 2019Assignee: Cisco Technology, Inc.Inventors: Ofer Iny, Eyal Michel Dagan, Aviran Kadosh
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Patent number: 10419965Abstract: In one embodiment, a network node comprising: a memory, including one or more memory entries associated with a meter; a sensor adapted to detect a discrepancy between an allocated bandwidth allocated to the meter and a data bandwidth measured by the meter, the allocated bandwidth being a portion of a total allocated bandwidth allocated to a plurality of meters, and the discrepancy being that the allocated bandwidth compared to the data bandwidth is one of: excessive or insufficient; and a generator, wherein the generator is adapted, upon the sensor detecting that the allocated bandwidth is excessive, to generate a message indicative of at least part of the allocated bandwidth being released from the meter, and wherein the generator is further adapted, upon the sensor detecting that the allocated bandwidth is insufficient, to generate a message indicative of a request for an allocation of additional bandwidth to the meter.Type: GrantFiled: January 4, 2017Date of Patent: September 17, 2019Assignee: Cisco Technology, Inc.Inventors: Aviran Kadosh, Ofer Iny, Eyal Michel Dagan
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Patent number: 9154425Abstract: A method and apparatus for more efficient routing of packets in a network is provided. The apparatus may include dynamic routing of packets or portions of packets which avoids congestion and blocking by making local decisions within the network. The apparatus may further include creating and updating routing tables which map switch outputs to available network output ports. Additionally the header of packets entering the network are processed prior to entry or as part of the entry to the network to produce a processed packet. The processed packets or portions of packets preferably include complete route information or a final destination address that enables rapid routing through the network without further processing of the packet header. One or more aspects of the inventions may be implemented in combination with other aspects of the invention to further improve network efficiency.Type: GrantFiled: January 24, 2014Date of Patent: October 6, 2015Assignee: Broadcom CorporationInventors: Ofer Iny, Eyal Dagan, Golan Schzukin
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Publication number: 20140140214Abstract: A method and apparatus for more efficient routing of packets in a network is provided. The apparatus may include dynamic routing of packets or portions of packets which avoids congestion and blocking by making local decisions within the network. The apparatus may further include creating and updating routing tables which map switch outputs to available network output ports. Additionally the header of packets entering the network are processed prior to entry or as part of the entry to the network to produce a processed packet. The processed packets or portions of packets preferably include complete route information or a final destination address that enables rapid routing through the network without further processing of the packet header. One or more aspects of the inventions may be implemented in combination with other aspects of the invention to further improve network efficiency.Type: ApplicationFiled: January 24, 2014Publication date: May 22, 2014Applicant: Broadcom CorporationInventors: Ofer Iny, Eyal Dagan, Golan Schzukin
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Patent number: 8705544Abstract: A method and apparatus for more efficient routing of packets in a network is provided. The apparatus may include dynamic routing of packets or portions of packets which avoids congestion and blocking by making local decisions within the network. The apparatus may further include creating and updating routing tables which map switch outputs to available network output ports. Additionally the header of packets entering the network are processed prior to entry or as part of the entry to the network to produce a processed packet. The processed packets or portions of packets preferably include complete route information or a final destination address that enables rapid routing through the network without further processing of the packet header. One or more aspects of the inventions may be implemented in combination with other aspects of the invention to further improve network efficiency.Type: GrantFiled: March 7, 2011Date of Patent: April 22, 2014Assignee: Broadcom CorporationInventors: Ofer Iny, Eyal Dagan, Golan Schzukin
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Publication number: 20120243622Abstract: Methods and apparatus that reduce the error rate of a Serial-De-Serial (SerDes) backplane connection are shown. The apparatus may include a receiver verifying a received block of data at the PHY layer. When the received block of data is received correctly, that block can be acknowledged by the receiver to the transmitter, which is also located at the PHY later. Upon detection of an error in a block of data, the receiver may send a negative acknowledge along with the block number, or some other suitable block identifier, of the faulty block to the transmitter. The transmitter may buffer blocks of data, and remove each block from the buffer upon receiving an acknowledgement. Use of the retransmission protocol may be triggered by speed of the connection, the bandwidth of the connection, the detection of too many errors in the connection or any suitable combination of these, or other, parameters.Type: ApplicationFiled: March 23, 2011Publication date: September 27, 2012Applicant: Broadcom CorporationInventors: Ofer Iny, Uri Amit, Itzhak Kiselevsky
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Publication number: 20120230342Abstract: A method and apparatus for more efficient routing of packets in a network is provided. The apparatus may include dynamic routing of packets or portions of packets which avoids congestion and blocking by making local decisions within the network. The apparatus may further include creating and updating routing tables which map switch outputs to available network output ports. Additionally the header of packets entering the network are processed prior to entry or as part of the entry to the network to produce a processed packet. The processed packets or portions of packets preferably include complete route information or a final destination address that enables rapid routing through the network without further processing of the packet header. One or more aspects of the inventions may be implemented in combination with other aspects of the invention to further improve network efficiency.Type: ApplicationFiled: March 7, 2011Publication date: September 13, 2012Applicant: Broadcom CorporationInventors: Ofer Iny, Eyal Dagan, Golan Schzukin
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Patent number: 7990858Abstract: Embodiments of the invention provide systems, devices and methods to schedule data transport across a fabric, e.g., prior to actual transmission of the data across the fabric. In some demonstrative embodiments, a packet switch may include an input controller to schedule transport of at least one data packet to an output controller over a fabric based on permission information received from the output controller. Other embodiments are described and claimed.Type: GrantFiled: November 15, 2009Date of Patent: August 2, 2011Assignee: Dune Networks, Inc.Inventor: Ofer Iny
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Publication number: 20100061392Abstract: Embodiments of the invention provide systems, devices and methods to schedule data transport across a fabric, e.g., prior to actual transmission of the data across the fabric. In some demonstrative embodiments, a packet switch may include an input controller to schedule transport of at least one data packet to an output controller over a fabric based on permission information received from the output controller. Other embodiments are described and claimed.Type: ApplicationFiled: November 15, 2009Publication date: March 11, 2010Inventor: Ofer Iny
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Patent number: 7619970Abstract: Embodiments of the invention provide systems, devices and methods to schedule data transport across a fabric, e.g., prior to actual transmission of the data across the fabric. In some demonstrative embodiments, a packet switch may include an input controller to schedule transport of at least one data packet to an output controller over a fabric based on permission information received from the output controller. Other embodiments are described and claimed.Type: GrantFiled: January 17, 2007Date of Patent: November 17, 2009Assignee: Dune Semiconductor Ltd.Inventor: Ofer Iny
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Patent number: 7525995Abstract: A system for switching variable size packets in a network is disclosed. The system comprises at least one ingress controller which receives a plurality of packets and which segments each of the packets into fixed sized fragments. The at least one ingress controller has a time-clock. The time clocks of all ingress controllers are synchronized to within a tolerance. Each fragment is tagged with at least a unique source of ID, time-stamp, and a fragment-number to form a cell. Each cell belongs to one packet having the same time-stamp value. The ingress controller sends each of the cells through a link such that a cell's destination is reachable through that link. The system includes a fabric element which receives cells from a plurality of inputs links. The cells are ordered. The fabric element sends ordered cells through a plurality of outputs and through which the destination of the cells is reachable.Type: GrantFiled: April 6, 2005Date of Patent: April 28, 2009Assignee: Dune Networks Inc.Inventor: Ofer Iny