Abstract: Embodiments of the invention provide systems, devices and methods to schedule data transport across a fabric, e.g., prior to actual transmission of the data across the fabric. In some demonstrative embodiments, a packet switch may include an input controller to schedule transport of at least one data packet to an output controller over a fabric based on permission information received from the output controller. Other embodiments are described and claimed.

Abstract: A system for switching variable size packets in a network is disclosed. The system comprises at least one ingress controller which receives a plurality of packets and which segments each of the packets into fixed sized fragments. The at least one ingress controller has a time-clock. The time clocks of all ingress controllers are synchronized to within a tolerance. Each fragment is tagged with at least a unique source of ID, time-stamp, and a fragment-number to form a cell. Each cell belongs to one packet having the same time-stamp value. The ingress controller sends each of the cells through a link such that a cell's destination is reachable through that link. The system includes a fabric element which receives cells from a plurality of inputs links. The cells are ordered. The fabric element sends ordered cells through a plurality of outputs and through which the destination of the cells is reachable.

Abstract: A method and system for managing memory in a packet switching device is disclosed. The method and system comprises managing the memory as a single FIFO when inserting packets and managing the memory as a plurality of FIFO queues when removing packets. A memory management scheme in accordance with the present invention takes advantage of the nature of packet switching to give an efficient implementation of multiple independent queues in a memory. The key observation that is made is that in a packet switch it is expected that packets may be stored in the memory for a time no greater than the time it takes to fill up the memory. If a packet due to extreme congestion is delayed longer than that, then deleting that packet is an acceptable result.

Abstract: A system for switching variable size packets in a network is disclosed. The system comprises at least one ingress controller which receives a plurality of packets and which segments each of the packets into fixed sized fragments. The at least one ingress controller has a time-clock. The time clocks of all ingress controllers are synchronized to within a tolerance. Each fragment is tagged with at least a unique source of ID, time-stamp, and a fragment-number to form a cell. Each cell belongs to one packet having the same time-stamp value. The ingress controller sends each of the cells through a link such that a cell's destination is reachable through that link. The system includes a fabric element which receives cells from a plurality of inputs links. The cells are ordered. The fabric element sends ordered cells through a plurality of outputs and through which the destination of the cells is reachable.

Abstract: A switching device and a method for the configuration thereof is disclosed. A first aspect of the present invention comprises a switching device. The switching device comprises at least one line card and at least one switching card. The device includes a mid-plane coupled to the at least one line card and the at least one switching card. The A second aspect of the invention comprises a method for configuring a switching device. The method for configuring a switching device comprises providing a mid-plane, and providing at least one switching card and at least one line card on the mid-plane. The at least one switching card and the at least one line card are perpendicular to each other.

Abstract: A switching device and a method for the configuration thereof is disclosed. A first aspect of the present invention comprises a switching device. The switching device comprises at least one line card and at least one switching card. The device includes a mid-plane coupled to the at least one line card and the at least one switching card. The A second aspect of the invention comprises a method for configuring a switching device. The method for configuring a switching device comprises providing a mid-plane, and providing at least one switching card and at least one line card on the mid-plane. The at least one switching card and the at least one line card are perpendicular to each other. Through the use of the present invention, line cards and/or switch cards can be connected to a mid-plane via a plurality of connectors wherein the line cards and switching cards are perpendicular to each other.

Abstract: A method and system for managing memory in a packet switching device is disclosed. The method and system comprises managing the memory as a single FIFO when inserting packets and managing the memory as a plurality of FIFO queues when removing packets. A memory management scheme in accordance with the present invention takes advantage of the nature of packet switching to give an efficient implementation of multiple independent queues in a memory. The key observation that is made is that in a packet switch it is expected that packets may be stored in the memory for a time no greater than the time it takes to fill up the memory. If a packet due to extreme congestion is delayed longer than that, then deleting that packet is an acceptable result.

Abstract: A system for switching variable size packets in a network is disclosed. The system comprises at least one ingress controller which receives a plurality of packets and which segments each of the packets into fixed sized fragments. The at least one ingress controller has a time-clock. The time clocks of all ingress controllers are synchronized to within a tolerance. Each fragment is tagged with at least a unique source of ID, time-stamp, and a fragment-number to form a cell. Each cell belongs to one packet having the same time-stamp value. The ingress controller sends each of the cells through a link such that a cell's destination is reachable through that link. The system includes a fabric element which receives cells from a plurality of inputs links. The cells are ordered. The fabric element sends ordered cells through a plurality of outputs and through which the destination of the cells is reachable.