Patents by Inventor Ofir Shalvi

Ofir Shalvi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Selective Activation of Programming Schemes in Analog Memory Cell Arrays
    Publication number: 20120262971
    Abstract: A method for data storage includes defining a first programming scheme that programs a group of analog memory cells while reducing interference caused by at least one memory cell that neighbors the group, and a second programming scheme that programs the group of the analog memory cells and does not reduce all of the interference reduced by the first programming scheme. One of the first and second programming schemes is selected based on a criterion defined with respect to the analog memory cells. Data is stored in the group of the analog memory cells using the selected programming scheme.
    Type: Application
    Filed: June 25, 2012
    Publication date: October 18, 2012
    Inventors: Dotan Sokolov, Naftali Sommer, Uri Perlmutter, Ofir Shalvi
  • EFFICIENT RE-READ OPERATIONS IN ANALOG MEMORY CELL ARRAYS
    Publication number: 20120254696
    Abstract: A method for data storage includes storing data, which is encoded with an Error Correction Code (ECC), in a group of analog memory cells by writing respective first storage values to the memory cells in the group. After storing the data, respective second storage values are read from the memory cells in the group, and the read second storage values are processed so as to decode the ECC. Responsively to a failure in decoding the ECC, one or more of the second storage values that potentially caused the failure are identified as suspect storage values. Respective third storage values are re-read from a subset of the memory cells that includes the memory cells holding the suspect storage values. The ECC is re-decoded using the third storage values so as to reconstruct the stored data.
    Type: Application
    Filed: June 14, 2012
    Publication date: October 4, 2012
    Inventors: Uri Perlmutter, Naftali Sommer, Ofir Shalvi
  • Optimized selection of memory chips in multi-chips memory devices
    Patent number: 8270246
    Abstract: A method includes accepting a definition of a type of multi-unit memory device (28) including a set of memory units (24), each having a respective nominal storage capacity, the definition specifying a target memory size of the memory device such that a sum of nominal storage capacities of the memory units in the set is equal to the target memory size. A plurality of the memory units is accepted. The memory units have respective actual storage capacities, at least some of which differ from the respective nominal storage capacity. Multi-unit memory devices including respective sets of the memory units are assembled, such that at least one of the sets includes at least a first memory unit having a first actual capacity that is less than the respective nominal capacity and at least a second memory unit having a second actual capacity that is greater than the nominal capacity.
    Type: Grant
    Filed: November 4, 2008
    Date of Patent: September 18, 2012
    Assignee: Apple Inc.
    Inventor: Ofir Shalvi
  • ENHANCED PROGRAMMING AND ERASURE SCHEMES FOR ANALOG MEMORY CELLS
    Publication number: 20120224404
    Abstract: A method for data storage includes setting a group of analog memory cells to respective analog values by performing an iterative process that applies a sequence of pulses to the memory cells in the group. During the iterative process, a progress of the iterative process is assessed, and a parameter of the iterative process is modified responsively to the assessed progress. The iterative process is continued in accordance with the modified parameter.
    Type: Application
    Filed: May 15, 2012
    Publication date: September 6, 2012
    Applicant: ANOBIT TECHNOLOGIES LTD.
    Inventors: Eyal Gurgi, Yoav Kasorla, Ofir Shalvi
  • PROGRAMMING AND ERASURE SCHEMES FOR ANALOG MEMORY CELLS
    Publication number: 20120224423
    Abstract: A method for data storage, in a memory that includes multiple analog memory cells, includes setting a parameter of an iterative process applied to a group of the memory cells based on one or more data values stored in at least one of the memory cells in the memory. The iterative process is performed in the group of the memory cells in accordance with the set parameter.
    Type: Application
    Filed: May 15, 2012
    Publication date: September 6, 2012
    Applicant: ANOBIT TECHNOLOGIES LTD.
    Inventors: Eyal Gurgi, Yoav Kasorla, Ofir Shalvi
  • Programming schemes for multi-level analog memory cells
    Patent number: 8259497
    Abstract: A method for data storage includes storing first data bits in a set of multi-bit analog memory cells at a first time by programming the memory cells to assume respective first programming levels. Second data bits are stored in the set of memory cells at a second time that is later than the first time by programming the memory cells to assume respective second programming levels that depend on the first programming levels and on the second data bits. A storage strategy is selected responsively to a difference between the first and second times. The storage strategy is applied to at least one group of the data bits, selected from among the first data bits and the second data bits.
    Type: Grant
    Filed: August 6, 2008
    Date of Patent: September 4, 2012
    Assignee: Apple Inc.
    Inventors: Ofir Shalvi, Naftali Sommer, Dotan Sokolov, Yoav Kasorla
  • Decoding of error correction code using partial bit inversion
    Patent number: 8255758
    Abstract: A method includes receiving an Error Correction Code (ECC) code word, which includes multiple encoded bits that represent data and have a bit order. Multiple subsets of the encoded bits are selected using a selection criterion that does not sequentially follow the bit order. For each subset in at least some of the multiple subsets, the bits in the subset are inverted and the code word having the inverted bits is decoded, so as to reconstruct the data.
    Type: Grant
    Filed: January 19, 2009
    Date of Patent: August 28, 2012
    Assignee: Apple Inc.
    Inventors: Micha Anholt, Ofir Shalvi
  • Rejuvenation of analog memory cells
    Patent number: 8248831
    Abstract: A method for data storage in a memory that includes multiple analog memory cells fabricated using respective physical media, includes identifying a group of the memory cells whose physical media have deteriorated over time below a given storage quality level. A rejuvenation process, which causes the physical media of the memory cells in the group to meet the given storage quality level, is applied to the identified group. Data is stored in the rejuvenated group of the memory cells.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: August 21, 2012
    Assignee: Apple Inc.
    Inventors: Barak Rotbard, Naftali Sommer, Shai Winter, Ofir Shalvi, Dotan Sokolov, Or Ordentlich, Micha Anholt
  • Storage at M bits/cell density in N bits/cell analog memory cell devices, M>N
    Publication number: 20120201078
    Abstract: A method for data storage includes accepting data for storage in a memory that includes multiple analog memory cells and supports a set of built-in programming commands. Each of the programming commands programs a respective page, selected from a group of N pages, in a subset of the memory cells. The subset of the memory cells is programmed to store M pages of the data, M>N, by performing a sequence of the programming commands drawn only from the set.
    Type: Application
    Filed: April 18, 2012
    Publication date: August 9, 2012
    Applicant: ANOBIT TECHNOLOGIES LTD.
    Inventors: Ofir Shalvi, Naftali Sommer, Uri Perlmutter, Dotan Sokolov
  • Efficient data storage in storage device arrays
    Patent number: 8239734
    Abstract: A method for data storage includes encoding data with an inter-device Error Correction Code (ECC), and sending the encoded data for storage on two or more storage devices. The data to be stored on each of the storage devices, and which has been encoded with the inter-device ECC, is encoded with an intra-device ECC, and the data encoded with the inter-device and intra-device ECCs is stored on the storage device. After storing the data, at least part of the stored data is retrieved and output by decoding the intra-device and inter-device ECCs, while using information related to one of the intra-device and inter-device ECCs in decoding the other of the intra-device and inter-device ECCs.
    Type: Grant
    Filed: October 15, 2009
    Date of Patent: August 7, 2012
    Assignee: Apple Inc.
    Inventor: Ofir Shalvi
  • Memory Device with adaptive capacity
    Patent number: 8239735
    Abstract: A method for data storage in a memory (28) that includes a plurality of analog memory cells (32) includes estimating respective achievable storage capacities of the analog memory cells. The memory cells are assigned respective storage configurations defining quantities of data to be stored in the memory cells based on the estimated achievable capacities. The data is stored in the memory cells in accordance with the respective assigned storage configurations. The achievable storage capacities of the analog memory cells are re-estimated after the memory has been installed in a host system and used for storing the data in the host system. The storage configurations are modified responsively to the re-estimated achievable capacities.
    Type: Grant
    Filed: May 10, 2007
    Date of Patent: August 7, 2012
    Assignee: Apple Inc.
    Inventors: Ofir Shalvi, Dotan Sokolov, Ariel Maislos, Zeev Cohen, Eyal Gurgi, Gil Semo
  • Data storage with incremental redundancy
    Patent number: 8234545
    Abstract: A method for operating a memory includes encoding input data with an Error Correction Code (ECC) to produce input encoded data including first and second sections, such that the ECC is decodable based on the first section at a first redundancy, and based on both the first and the second sections at a second redundancy that is higher than the first redundancy. Output encoded data is read and a condition is evaluated. The input data is reconstructed using a decoding level selected, responsively to the condition, from a first level, at which a first part of the output encoded data corresponding to the first section is processed to decode the ECC at the first redundancy, and a second level, at which the first part and a second part of the output encoded data corresponding to the second section are processed jointly to decode the ECC at the second redundancy.
    Type: Grant
    Filed: May 12, 2008
    Date of Patent: July 31, 2012
    Assignee: Apple Inc.
    Inventors: Ofir Shalvi, Dotan Sokolov, Eyal Gurgi, Oren Golov, Naftali Sommer
  • Selective activation of programming schemes in analog memory cell arrays
    Patent number: 8228701
    Abstract: A method for data storage includes defining a first programming scheme that programs a group of analog memory cells while reducing interference caused by at least one memory cell that neighbors the group, and a second programming scheme that programs the group of the analog memory cells and does not reduce all of the interference reduced by the first programming scheme. One of the first and second programming schemes is selected based on a criterion defined with respect to the analog memory cells. Data is stored in the group of the analog memory cells using the selected programming scheme.
    Type: Grant
    Filed: February 28, 2010
    Date of Patent: July 24, 2012
    Assignee: Apple Inc.
    Inventors: Dotan Sokolov, Naftali Sommer, Uri Perlmutter, Ofir Shalvi
  • Efficient readout from analog memory cells using data compression
    Patent number: 8230300
    Abstract: A method for data storage includes storing data in a group of analog memory cells by writing respective input storage values to the memory cells in the group. After storing the data, respective output storage values are read from the analog memory cells in the group. Respective confidence levels of the output storage values are estimated, and the confidence levels are compressed. The output storage values and the compressed confidence levels are transferred from the memory cells over an interface to a memory controller.
    Type: Grant
    Filed: March 4, 2009
    Date of Patent: July 24, 2012
    Assignee: Apple Inc.
    Inventors: Uri Perlmutter, Dotan Sokolov, Ofir Shalvi, Oren Golov
  • Efficient re-read operations from memory devices
    Patent number: 8225181
    Abstract: A method for data storage includes storing data, which is encoded with an Error Correction Code (ECC), in a group of analog memory cells by writing respective first storage values to the memory cells in the group. After storing the data, respective second storage values are read from the memory cells in the group, and the read second storage values are processed so as to decode the ECC. Responsively to a failure in decoding the ECC, one or more of the second storage values that potentially caused the failure are identified as suspect storage values. Respective third storage values are re-read from a subset of the memory cells that includes the memory cells holding the suspect storage values. The ECC is re-decoded using the third storage values so as to reconstruct the stored data.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: July 17, 2012
    Assignee: Apple Inc.
    Inventors: Uri Perlmutter, Naftali Sommer, Ofir Shalvi
  • Signal compression for fiber node
    Patent number: 8214871
    Abstract: A method, device and network for compressing cable modem data signals and conserving bandwidth within the network. Cable modems transmit upstream data signals to a fiber node which compresses the data signals and transmits the compressed signals upstream to a headend which decompresses the data signals. The fiber node compression may be by a shaping filter or a fast Fourier transform (FFT) function. The headend decompression may be by an inverse shaping filter or an inverse FFT function.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: July 3, 2012
    Assignee: Intel Corporation
    Inventors: Ofir Shalvi, Mordechai Segal
  • Reducing Distortion Using Joint Storage
    Publication number: 20120163080
    Abstract: A method for data storage includes predefining an order of programming a plurality of analog memory cells that are arranged in rows. The order specifies that for a given row having neighboring rows on first and second sides, the memory cells in the given row are programmed only while the memory cells in the neighboring rows on at least one of the sides are in an erased state, and that the memory cells in the given row are programmed to assume a highest programming level, which corresponds to a largest analog value among the programming levels of the cells, only after programming all the memory cells in the given row to assume the programming levels other than the highest level. Data is stored in the memory cells by programming the memory cells in accordance with the predefined order.
    Type: Application
    Filed: March 6, 2012
    Publication date: June 28, 2012
    Applicant: ANOBIT TECHNOLOGIES LTD
    Inventors: Ofir Shalvi, Eyal Gurgi, Uri Perlmutter, Oren Golov
  • Programming Orders for Reducing Distortion Based on Neighboring Rows
    Publication number: 20120163079
    Abstract: A method for data storage includes predefining an order of programming a plurality of analog memory cells that are arranged in rows. The order specifies that for a given row having neighboring rows on first and second sides, the memory cells in the given row are programmed only while the memory cells in the neighboring rows on at least one of the sides are in an erased state, and that the memory cells in the given row are programmed to assume a highest programming level, which corresponds to a largest analog value among the programming levels of the cells, only after programming all the memory cells in the given row to assume the programming levels other than the highest level. Data is stored in the memory cells by programming the memory cells in accordance with the predefined order.
    Type: Application
    Filed: March 6, 2012
    Publication date: June 28, 2012
    Applicant: ANOBIT TECHNOLOGIES LTD
    Inventors: Ofir Shalvi, Eyal Gurgi, Uri Perlmutter, Oren Golov
  • Storage at M bits/cell density in N bits/cell analog memory cell devices, M>N
    Patent number: 8208304
    Abstract: A method for data storage includes accepting data for storage in a memory that includes multiple analog memory cells and supports a set of built-in programming commands. Each of the programming commands programs a respective page, selected from a group of N pages, in a subset of the memory cells. The subset of the memory cells is programmed to store M pages of the data, M>N, by performing a sequence of the programming commands drawn only from the set.
    Type: Grant
    Filed: November 15, 2009
    Date of Patent: June 26, 2012
    Assignee: Anobit Technologies Ltd.
    Inventors: Ofir Shalvi, Naftali Sommer, Uri Perlmutter, Dotan Sokolov
  • AUTOMATIC DEFECT MANAGEMENT IN MEMORY DEVICES
    Publication number: 20120159281
    Abstract: A method for data storage in a memory including multiple memory cells arranged in blocks, includes storing first and second pages in respective first and second groups of the memory cells within a given block of the memory. A pattern of respective positions of one or more defective memory cells is identified in the first group. The second page is recovered by applying the pattern identified in the first group to the second group of the memory cells.
    Type: Application
    Filed: February 26, 2012
    Publication date: June 21, 2012
    Applicant: ANOBIT TECHNOLOGIES LTD.
    Inventors: Ofir Shalvi, Naftali Sommer, Oren Golov