Patents by Inventor Ofir Shalvi

Ofir Shalvi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Programming orders for reducing distortion in arrays of multi-level analog memory cells
    Patent number: 8174905
    Abstract: A method for data storage includes predefining an order of programming a plurality of analog memory cells that are arranged in rows. The order specifies that for a given row having neighboring rows on first and second sides, the memory cells in the given row are programmed only while the memory cells in the neighboring rows on at least one of the sides are in an erased state, and that the memory cells in the given row are programmed to assume a highest programming level, which corresponds to a largest analog value among the programming levels of the cells, only after programming all the memory cells in the given row to assume the programming levels other than the highest level. Data is stored in the memory cells by programming the memory cells in accordance with the predefined order.
    Type: Grant
    Filed: March 11, 2010
    Date of Patent: May 8, 2012
    Assignee: Anobit Technologies Ltd.
    Inventors: Ofir Shalvi, Eyal Gurgi, Uri Perlmutter, Oren Golov
  • Reliable data storage in analog memory cells subjected to long retention periods
    Patent number: 8169825
    Abstract: A method for data storage in a non-volatile memory includes storing data in the non-volatile memory using a first storage configuration while the non-volatile memory is supplied with electrical power. After storing the data, an indication is accepted, indicating that shut-off of the electrical power is imminent. Responsively to the indication and before the shut-off, at least some of the data is re-programmed in the non-volatile memory using a second storage configuration.
    Type: Grant
    Filed: September 1, 2009
    Date of Patent: May 1, 2012
    Assignee: Anobit Technologies Ltd.
    Inventors: Ofir Shalvi, Naftali Sommer, Barak Rotbard, Oren Golov, Micha Anholt, Uri Perlmutter
  • Combined distortion estimation and error correction coding for memory devices
    Patent number: 8156403
    Abstract: A method for operating a memory device (24) includes encoding data using an Error Correction Code (ECC) and storing the encoded data as first analog values in respective analog memory cells (32) of the memory device. After storing the encoded data, second analog values are read from the respective memory cells of the memory device in which the encoded data were stored. At least some of the second analog values differ from the respective first analog values. A distortion that is present in the second analog values is estimated. Error correction metrics are computed with respect to the second analog values responsively to the estimated distortion. The second analog values are processed using the error correction metrics in an ECC decoding process, so as to reconstruct the data.
    Type: Grant
    Filed: May 10, 2007
    Date of Patent: April 10, 2012
    Assignee: Anobit Technologies Ltd.
    Inventors: Ofir Shalvi, Naftali Sommer, Ariel Maislos, Dotan Sokolov
  • Automatic defect management in memory devices
    Patent number: 8151163
    Abstract: A method for storing data in a memory (28) that includes analog memory cells (32) includes identifying one or more defective memory cells in a group of the analog memory cells. An Error Correction Code (ECC) is selected responsively to a characteristic of the identified defective memory cells. The data is encoded using the selected ECC and the encoded data is stored in the group of the analog memory cells. In an alternative method, an identification of one or more defective memory cells among the analog memory cells is generated. Analog values are read from the analog memory cells in which the encoded data were stored, including at least one of the defective memory cells. The analog values are processed using an ECC decoding process responsively to the identification of the at least one of the defective memory cells, so as to reconstruct the data.
    Type: Grant
    Filed: December 3, 2007
    Date of Patent: April 3, 2012
    Assignee: Anobit Technologies Ltd.
    Inventors: Ofir Shalvi, Dotan Sokolov
  • Reduction of back pattern dependency effects in memory devices
    Patent number: 8151166
    Abstract: A method for operating a memory that includes multiple analog memory cells includes storing data in the memory by writing first storage values to the cells, so as to cause the cells to hold respective electrical charge levels. After storing the data, second storage values are read from at least some of the cells, including at least one interfered cell that belongs to a group of cells. A Back Pattern Dependency (BPD) distortion caused by the electrical charge levels of one or more interfering cells in the group to at least one of the second storage values read from the at least one interfered cell is detected and canceled. The second storage values, including the at least one of the second storage values in which the BPD distortion was canceled, are processed so as to reconstruct the data.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: April 3, 2012
    Assignee: Anobit Technologies Ltd.
    Inventors: Ofir Shalvi, Zeev Cohen
  • Reading memory cells using multiple thresholds
    Patent number: 8145984
    Abstract: A method for operating a memory (28) includes storing data, which is encoded with an Error Correction Code (ECC), in analog memory cells (32) of the memory by writing respective analog input values selected from a set of nominal values to the analog memory cells. The stored data is read by performing multiple read operations that compare analog output values of the analog memory cells to different, respective read thresholds so as to produce multiple comparison results for each of the analog memory cells. At least two of the read thresholds are positioned between a pair of the nominal values that are adjacent to one another in the set of the nominal values. Soft metrics are computed responsively to the multiple comparison results. The ECC is decoded using the soft metrics, so as to extract the data stored in the analog memory cells.
    Type: Grant
    Filed: May 24, 2011
    Date of Patent: March 27, 2012
    Assignee: Anobit Technologies Ltd.
    Inventors: Naftali Sommer, Ofir Shalvi, Dotan Sokolov
  • REJUVENATION OF ANALOG MEMORY CELLS
    Publication number: 20120044762
    Abstract: A method for data storage in a memory that includes multiple analog memory cells fabricated using respective physical media, includes identifying a group of the memory cells whose physical media have deteriorated over time below a given storage quality level. A rejuvenation process, which causes the physical media of the memory cells in the group to meet the given storage quality level, is applied to the identified group. Data is stored in the rejuvenated group of the memory cells.
    Type: Application
    Filed: October 30, 2011
    Publication date: February 23, 2012
    Applicant: ANOBIT TECHNOLOGIES LTD
    Inventors: Barak Rotbard, Naftali Sommer, Shai Winter, Ofir Shalvi, Dotan Sokolov, Or Ordentlich, Micha Anholt
  • DISTORTION ESTIMATION AND CANCELLATION IN MEMORY DEVICES
    Publication number: 20120026788
    Abstract: A method for operating a memory (28) includes storing data in a group of analog memory cells (32) of the memory as respective first voltage levels. After storing the data, second voltage levels are read from the respective analog memory cells. The second voltage levels are affected by cross-coupling interference causing the second voltage levels to differ from the respective first voltage levels. Cross-coupling coefficients, which quantify the cross-coupling interference among the analog memory cells, are estimated by processing the second voltage levels. The data stored in the group of analog memory cells is reconstructed from the read second voltage levels using the estimated cross-coupling coefficients.
    Type: Application
    Filed: September 22, 2011
    Publication date: February 2, 2012
    Applicant: ANOBIT TECHNOLOGIES LTD.
    Inventors: Ofir Shalvi, Naftali Sommer, Eyal Gurgi, Ariel Maislos
  • DISTORTION ESTIMATION AND CANCELLATION IN MEMORY DEVICES
    Publication number: 20120026789
    Abstract: A method for operating a memory (28) includes storing data in a group of analog memory cells (32) of the memory as respective first voltage levels. After storing the data, second voltage levels are read from the respective analog memory cells. The second voltage levels are affected by cross-coupling interference causing the second voltage levels to differ from the respective first voltage levels. Cross-coupling coefficients, which quantify the cross-coupling interference among the analog memory cells, are estimated by processing the second voltage levels. The data stored in the group of analog memory cells is reconstructed from the read second voltage levels using the estimated cross-coupling coefficients.
    Type: Application
    Filed: September 22, 2011
    Publication date: February 2, 2012
    Applicant: ANOBIT TECHNOLOGIES LTD.
    Inventors: Ofir Shalvi, Naftali Sommer, Eyal Gurgi, Ariel Maislos
  • Estimation of non-linear distortion in memory devices
    Patent number: 8060806
    Abstract: A method for operating a memory (24) includes storing data in analog memory cells (32) of the memory by writing respective analog values to the analog memory cells. A set of the analog memory cells is identified, including an interfered cell having a distortion that is statistically correlated with the respective analog values of the analog memory cells in the set. A mapping is determined between combinations of possible analog values of the analog memory cells in the set and statistical characteristics of composite distortion levels present in the interfered memory cell. The mapping is applied so as to compensate for the distortion in the interfered memory cell.
    Type: Grant
    Filed: August 27, 2007
    Date of Patent: November 15, 2011
    Assignee: Anobit Technologies Ltd.
    Inventors: Ofir Shalvi, Naftali Sommer, Eyal Gurgi, Oren Golov, Dotan Sokolov
  • Memory device with multiple-accuracy read commands
    Patent number: 8059457
    Abstract: A method for data storage includes defining at least first and second read commands for reading storage values from analog memory cells. The first read command reads the storage values at a first accuracy, and the second read command reads the storage values at a second accuracy, which is finer than the first accuracy. A condition is evaluated with respect to a read operation that is to be performed over a given group of the memory cells. One of the first and second read commands is selected responsively to the evaluated condition. The storage values are read from the given group of the memory cells using the selected read command.
    Type: Grant
    Filed: March 17, 2009
    Date of Patent: November 15, 2011
    Assignee: Anobit Technologies Ltd.
    Inventors: Uri Perlmutter, Ofir Shalvi, Yoav Kasorla, Naftali Sommer, Dotan Sokolov
  • Distortion estimation and cancellation in memory devices
    Patent number: 8050086
    Abstract: A method for operating a memory (28) includes storing data in a group of analog memory cells (32) of the memory as respective first voltage levels. After storing the data, second voltage levels are read from the respective analog memory cells. The second voltage levels are affected by cross-coupling interference causing the second voltage levels to differ from the respective first voltage levels. Cross-coupling coefficients, which quantify the cross-coupling interference among the analog memory cells, are estimated by processing the second voltage levels. The data stored in the group of analog memory cells is reconstructed from the read second voltage levels using the estimated cross-coupling coefficients.
    Type: Grant
    Filed: May 10, 2007
    Date of Patent: November 1, 2011
    Assignee: Anobit Technologies Ltd.
    Inventors: Ofir Shalvi, Naftali Sommer, Eyal Gurgi, Ariel Maislos
  • READING MEMORY CELLS USING MULTIPLE THRESHOLDS
    Publication number: 20110225472
    Abstract: A method for operating a memory (28) includes storing data, which is encoded with an Error Correction Code (ECC), in analog memory cells (32) of the memory by writing respective analog input values selected from a set of nominal values to the analog memory cells. The stored data is read by performing multiple read operations that compare analog output values of the analog memory cells to different, respective read thresholds so as to produce multiple comparison results for each of the analog memory cells. At least two of the read thresholds are positioned between a pair of the nominal values that are adjacent to one another in the set of the nominal values. Soft metrics are computed responsively to the multiple comparison results. The ECC is decoded using the soft metrics, so as to extract the data stored in the analog memory cells.
    Type: Application
    Filed: May 24, 2011
    Publication date: September 15, 2011
    Applicant: ANOBIT TECHNOLOGIES LTD.
    Inventors: Naftali SOMMER, Ofir SHALVI, Dotan SOKOLOV
  • Compensation for voltage drifts in analog memory cells
    Patent number: 8000141
    Abstract: A method for data storage includes storing data in a group of analog memory cells by writing respective first storage values into the memory cells. After storing the data, respective second storage values are read from the memory cells. A subset of the memory cells, in which the respective second storage values have drifted below a minimum readable value, is identified. The memory cells in the subset are operated on, so as to cause the second storage values of at least one of the memory cells in the subset to exceed the minimum readable value. At least the modified second storage values are re-read so as to reconstruct the stored data.
    Type: Grant
    Filed: October 15, 2008
    Date of Patent: August 16, 2011
    Assignee: Anobit Technologies Ltd.
    Inventors: Ofir Shalvi, Naftali Sommer
  • Data storage using modified voltages
    Patent number: 7995388
    Abstract: A method for data storage includes storing data in a target analog memory cell, which is one of a group of analog memory cells that are connected in series with one another, by writing an input storage value into the target memory cell. A first read operation, which reads a first output storage value from the target memory cell while biasing the other memory cells with respective first pass voltages, is applied to the target memory cell. A second read operation, which reads a second output storage value from the target memory cell while biasing the other memory cells with respective second pass voltages, is applied to the target memory cell. At least one of the second pass voltages is different from a respective first pass voltage. The data is reconstructed responsively to the first and second output storage values.
    Type: Grant
    Filed: August 4, 2009
    Date of Patent: August 9, 2011
    Assignee: Anobit Technologies Ltd.
    Inventors: Shai Winter, Ofir Shalvi
  • Reading memory cells using multiple thresholds
    Patent number: 7975192
    Abstract: A method for operating a memory (28) includes storing data, which is encoded with an Error Correction Code (ECC), in analog memory cells (32) of the memory by writing respective analog input values selected from a set of nominal values to the analog memory cells. The stored data is read by performing multiple read operations that compare analog output values of the analog memory cells to different, respective read thresholds so as to produce multiple comparison results for each of the analog memory cells. At least two of the read thresholds are positioned between a pair of the nominal values that are adjacent to one another in the set of the nominal values. Soft metrics are computed responsively to the multiple comparison results. The ECC is decoded using the soft metrics, so as to extract the data stored in the analog memory cells.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: July 5, 2011
    Assignee: Anobit Technologies Ltd.
    Inventors: Naftali Sommer, Ofir Shalvi, Dotan Sokolov
  • Programming of analog memory cells using a single programming pulse per state transition
    Patent number: 7924587
    Abstract: A method for data storage in analog memory cells includes defining multiple programming states for storing data in the analog memory cells. The programming states represent respective combinations of more than one bit and correspond to respective, different levels of a physical quantity stored in the memory cells. The data is stored in the memory cells by applying to the memory cells programming pulses that cause the levels of the physical quantity stored in the memory cells to transition between the programming states, such that a given transition is caused by only a single programming pulse.
    Type: Grant
    Filed: February 19, 2009
    Date of Patent: April 12, 2011
    Assignee: Anobit Technologies Ltd.
    Inventors: Uri Perlmutter, Shai Winter, Ofir Shalvi, Eyal Gurgi, Naftali Sommer, Oren Golov
  • Memory power and performance management
    Patent number: 7924648
    Abstract: A method for storage includes collecting information regarding respective performance characteristics of a plurality of memory units in a memory array, each memory unit including one or more cells of the memory array. When data are received for storage in the memory array, a memory unit is selected responsively to the respective performance characteristics, and the received data are stored in the selected memory unit.
    Type: Grant
    Filed: November 27, 2007
    Date of Patent: April 12, 2011
    Assignee: Anobit Technologies Ltd.
    Inventors: Dotan Sokolov, Ofir Shalvi
  • Data storage in analog memory cells with protection against programming interruption
    Patent number: 7924613
    Abstract: A method for data storage includes storing first data in analog memory cells using a first programming operation, which writes to the memory cells respective analog values representing respective bit values of the first data. Second data is stored in the analog memory cells in addition to the first data using a second programming operation, which modifies the respective analog values of the memory cells so as to represent bit value combinations of the first and second data. The first and second programming operations are defined such that, at all times during the second programming operation, the analog value of each memory cell remains unambiguously indicative of the respective bit value of the first data stored in that memory cell.
    Type: Grant
    Filed: July 6, 2009
    Date of Patent: April 12, 2011
    Assignee: Anobit Technologies Ltd.
    Inventors: Naftali Sommer, Shai Winter, Ofir Shalvi
  • High-speed programming of memory devices
    Patent number: 7900102
    Abstract: A method for operating a memory that includes a plurality of analog memory cells includes storing data in a first group of the memory cells by writing respective first cell values to the memory cells in the first group. After storing the data, respective second cell values are read from the memory cells in the first group, and differences are found between the respective first and second cell values for each of one or more of the memory cells in the first group. The differences are processed to produce error information, and the error information is stored in a second group of the memory cells.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: March 1, 2011
    Assignee: Anobit Technologies Ltd.
    Inventors: Dotan Sokolov, Ofir Shalvi