Abstract: In a general aspect, an assembly includes a panel of organic substrate core material having a cavity defined therein, a module substrate disposed in the cavity, and a semiconductor die disposed on the module substrate. The assembly also includes a layer of prepreg organic substrate material, and a metal layer. The module substrate and the semiconductor die are embedded in the cavity by the layer of prepreg organic substrate material and the metal layer. The metal layer is electrically coupled with at least one of the semiconductor die or the module substrate.

Abstract: A circuit module includes a substrate with a patterned metal surface. The patterned metal surface includes a conductive terminal pad, a first conductive pad, and a second conductive pad that is non-adjacent to the conductive terminal pad. A first circuit portion is assembled on the first conductive pad and a second circuit portion is assembled on the second conductive pad. A conductive bridge electrically couples the conductive terminal pad and the second conductive pad. The conductive bridge includes an elevated span extending above and across the first conductive pad.

Abstract: Implementations of semiconductor packages may include: a first substrate having a first dielectric layer coupled between a first metal layer and a second metal layer; a second substrate having a second dielectric layer coupled between a third metal layer and a fourth metal layer. A first die may be coupled with a first electrical spacer coupled in a space between and coupled with the first substrate and the second substrate and a second die may be coupled with a second electrical spacer coupled in a space between and coupled with the first substrate and the second substrate.

Abstract: A housing that can be used for a power module in a power system is disclosed. The housing includes features to improve the insulating properties and to reduce or eliminate a mechanical stress on a housing that could crack or break a substrate contained within the housing. The insulating properties are improved by protrusions that surround apertures for press-fit pins. Each protrusion can increase a creepage for the housing by extending the surface of the housing along a press-fit pin. The mechanical stress is reduced by a mounting flange that includes a wedge surface and a flexible structure that react to a force applied when the mounting flange is fastened to a surface by a fastener.

Abstract: Implementations of semiconductor packages may include: a first substrate having a first dielectric layer coupled between a first metal layer and a second metal layer; a second substrate having a second dielectric layer coupled between a third metal layer and a fourth metal layer. A first die may be coupled with a first electrical spacer coupled in a space between and coupled with the first substrate and the second substrate and a second die may be coupled with a second electrical spacer coupled in a space between and coupled with the first substrate and the second substrate.

Abstract: A housing that can be used for a power module in a power system is disclosed. The housing includes features to improve the insulating properties and to reduce or eliminate a mechanical stress on a housing that could crack or break a substrate contained within the housing. The insulating properties are improved by protrusions that surround apertures for press-fit pins. Each protrusion can increase a creepage for the housing by extending the surface of the housing along a press-fit pin. The mechanical stress is reduced by a mounting flange that includes a wedge surface and a flexible structure that react to a force applied when the mounting flange is fastened to a surface by a fastener.

Abstract: Implementations of semiconductor packages may include: a first substrate having a first dielectric layer coupled between a first metal layer and a second metal layer; a second substrate having a second dielectric layer coupled between a third metal layer and a fourth metal layer. A first die may be coupled with a first electrical spacer coupled in a space between and coupled with the first substrate and the second substrate and a second die may be coupled with a second electrical spacer coupled in a space between and coupled with the first substrate and the second substrate.

Abstract: Implementations of semiconductor packages may include: a first substrate having a first dielectric layer coupled between a first metal layer and a second metal layer; a second substrate having a second dielectric layer coupled between a third metal layer and a fourth metal layer. A first die may be coupled with a first electrical spacer coupled in a space between and coupled with the first substrate and the second substrate and a second die may be coupled with a second electrical spacer coupled in a space between and coupled with the first substrate and the second substrate.

Abstract: According to an aspect, a semiconductor power module includes a substrate, a semiconductor device coupled to the substrate, a bond wire coupled to the semiconductor device, and a first molding material layer disposed on the substrate. The first molding material layer encapsulates a first portion of the bond wire. The bond wire has a second portion disposed outside of the first molding material layer. The semiconductor power module includes a second molding material layer disposed on the first molding material layer. The second molding material layer encapsulates the second portion of the bond wire. The second molding material layer has a hardness less than a hardness of the second molding material layer.

Abstract: Implementations of semiconductor packages may include: a first substrate having a first dielectric layer coupled between a first metal layer and a second metal layer; a second substrate having a second dielectric layer coupled between a third metal layer and a fourth metal layer. A first die may be coupled with a first electrical spacer coupled in a space between and coupled with the first substrate and the second substrate and a second die may be coupled with a second electrical spacer coupled in a space between and coupled with the first substrate and the second substrate.

Abstract: A power semiconductor has power terminals arranged in a row at one side of the housing, with control terminals arranged in a row at the other side of the housing. The spacing between adjacent power terminals is greater than the spacing between adjacent control terminals.

Abstract: A power semiconductor has power terminals arranged in a row at one side of the housing, with control terminals arranged in a row at the other side of the housing. The spacing between adjacent power terminals is greater than the spacing between adjacent control terminals.

Abstract: A power semiconductor has power terminals arranged in a row at one side of the housing, with control terminals arranged in a row at the other side of the housing. The spacing between adjacent power terminals is greater than the spacing between adjacent control terminals.

Abstract: A power semiconductor has power terminals arranged in a row at one side of the housing, with control terminals arranged in a row at the other side of the housing. The spacing between adjacent power terminals is greater than the spacing between adjacent control terminals.

Abstract: An arrangement between a power semiconductor module and a printed circuit board is disclosed, A printed circuit board includes strip conductors, and a power semiconductor module includes a module housing and power terminals. The power terminals extend to the exterior of the module housing and into contact with the strip conductors. A heat sink is disposed on a side of the power semiconductor module opposite the circuit board. A deformable means is disposed between the module housing and the circuit board and is configured to relieve a contact pressure load on the power terminals. A contact-pressure element is disposed on a side of the circuit board opposite the power semiconductor module. The contact-pressure element is integral with a first housing part of an arrangement housing, and the heat sink is integral with a second housing part of the arrangement housing. The two housing parts enclose the circuit board.

Abstract: An arrangement between a power semiconductor module and a printed circuit board is disclosed, A printed circuit board includes strip conductors, and a power semiconductor module includes a module housing and power terminals. The power terminals extend to the exterior of the module housing and into contact with the strip conductors. A heat sink is disposed on a side of the power semiconductor module opposite the circuit board. A deformable means is disposed between the module housing and the circuit board and is configured to relieve a contact pressure load on the power terminals. A contact-pressure element is disposed on a side of the circuit board opposite the power semiconductor module. The contact-pressure element is integral with a first housing part of an arrangement housing, and the heat sink is integral with a second housing part of the arrangement housing. The two housing parts enclose the circuit board.