Abstract: A radio frequency front end circuit includes an output signal transmission line, an amplifier circuit with an input connected to a radio frequency signal source and an output connected to the output signal transmission line. A harmonic suppression circuit is connected to the amplifier circuit, and includes an active circuit element having a frequency-dependent impedance and is tuned as a reflective trap with a negative capacitance for one or more rejection frequency ranges each corresponding to a multiple of a fundamental frequency of a signal generated by the radio frequency signal source.

Abstract: A radio frequency amplifier circuit has a signal input and a signal output. A primary amplifier is connected to the signal input and the signal output. A low dropout voltage regulator is connectible to an external power supply and to the primary amplifier, and generates a set voltage to bias the primary amplifier from a variable voltage provided by the external power supply. An equivalent capacitance circuit is connected to the primary amplifier and to the low dropout voltage regulator. The equivalent capacitance circuit defines a low dropout voltage regulator output capacitance in a nano-Farad to micro-Farad range absent any passive capacitor components corresponding thereto to maintain linearity of the primary amplifier.

Abstract: A power detector with a detection signal input connectible to a source of a radio frequency signal and a detected power level output has a differential amplifier detector circuit with an input connected to the detection signal input and an output corresponding to the detected power level output. A feedback network is connected to the input and the output of the differential amplifier detector circuit. A mirror circuit is connected to the differential amplifier detector circuit. A root mean square current corresponding to a power level of the radio frequency signal from the source is mirrored and integrated, with a direct current voltage level being generated therefrom and output to the detected power level output.

Abstract: A speed-up circuit connectable to a capacitive load to reduce charging time thereof from a pulsed current source connected there includes a first circuit node connectable to the capacitive load. An operational amplifier circuit is connected to the first circuit node and configured as a low resistance voltage source. Added current from the operational amplifier flows to the capacitive load for a predetermined duration between the pulsed current source transitioning between a deactivated state and an activated state, and in response to an activation of the pulsed current source. The added current is combined with the current from the pulsed current source to reduce switching time of the load.

Abstract: A radio frequency low noise amplifier circuit with a receive signal input, a receive signal output, and a voltage source include a low noise amplifier and a coupled inductor circuit with a primary inductive chain connected to the output of the low noise amplifier and to the voltage source. The coupled inductor circuit further includes a secondary inductive chain with a first inductor electromagnetically coupled to the primary inductive chain, and a second inductor in series with the first inductor and magnetically coupled to the primary inductive chain. The second inductor is connected to a feedback node of the low noise amplifier. There is an output matching network connected to the first inductor of the secondary inductive chain and to the receive signal output.

Abstract: A metal oxide semiconductor field effect transistor preferably fabricated with a silicon-on-insulator process has a first semiconductor region and a second semiconductor region in a spaced relationship thereto A body structure is defined by a channel segment between the first semiconductor region and the second semiconductor region, and a first extension segment structurally contiguous with the channel segment. A shallow trench isolation structure surrounds the first semiconductor region, the second semiconductor region, and the body structure, with a first extension interface being defined between the shallow trench isolation structure and the first extension segment of the body structure to reduce leakage current flowing from the second semiconductor region to the first semiconductor region through a parasitic path of the body structure.

Abstract: A current mirror circuit connectible to an amplifier circuit to set a bias point thereof includes a current mirror circuit, and a bias resistor connected thereto. The bias resistor is connectible to the amplifier circuit. A first helper circuit is connected in parallel with the bias resistor, and is selectively activated for a first predetermined duration by a first control signal. The activated first helper circuit defines a lower resistance path relative to the bias resistor to shorten a rising transient response of the amplifier circuit as the current mirror circuit is activated.

Abstract: An RF power amplifier circuit and input power limiter circuits are disclosed. A power detector generates a voltage output proportional to a power level of an input signal. There is a directional coupler with a first port connected to a transmit signal input, a second port connected to the input matching network, and a third port connected to the power detector. A first power amplifier stage with an input is connected to the input matching network and an output is connected to the transmit signal output. A control circuit connected to the power detector generates a gain reduction signal based upon a comparison of the voltage output from the power detector to predefined voltage levels corresponding to specific power levels of the input signal. Overall gain of the RF power amplifier circuit is reduced based upon the gain reduction signal that adjusts the configurations of the circuit components.

Abstract: A radio frequency (RF) transmit-receive switch has an antenna port, first and second transmit differential ports and first and second receive differential ports. Transmit transistor switches are connected to the transmit differential ports. Primary and secondary windings of a transmit coupled inductor transformer are connected to the transmit transistor switches. Receive transistor switches are connected to the receive differential ports. Primary and secondary windings of a receive coupled inductor transformer are connected to the receive transistor switches. A first balun inductive winding is connected to the antenna port, and a second balun inductive winding is connected to the transistor switches.

Abstract: An integrated circuit architecture and circuitry is defined by a die structure with a plurality of exposed conductive pads arranged in a grid of rows and columns. The die structure has a first operating frequency region with a first transmit and receive chain, and a second operating frequency region with a second transmit chain and a second receive chain. There is a shared region of the die structure defined by an overlapping segment of the first operating frequency region and the second operating frequency region with a shared power supply input conductive pad connected to the first transmit chain, the second transmit chain, the first receive chain, and the second receive chain, and a shared power detection output conductive pad connected to the first transmit chain and the second transmit chain.

Abstract: A radio frequency (RF) power amplifier circuit includes an input and an output. A power amplifier transistor has a first terminal connected to the input, a second terminal connected to the output, and a third terminal defined by a degeneration inductance. A first capacitor is connected to the third terminal of the power amplifier transistor, along with a negative capacitance circuit connected in series with the first capacitor. The negative capacitance and the first capacitor define a series resonance at a predefined operating frequency band, which shunts the degeneration inductance of the third terminal.

Abstract: A radio frequency (RF) power amplifier circuit with a diode linearizer circuit. The power amplifier circuit has an input and an output, as well as a power amplifier transistor with a first terminal connected to the input, a second terminal connected to the output, and a third terminal. The linearizer circuit is connected to the third terminal and to ground, and has a non-linear current-voltage curve as well as a non-linear capacitance. The linearizer circuit reduces inter-modulation products in a current through the power amplifier transistor from the second terminal to the third terminal that corresponds to an input signal applied to the input.

Abstract: A radio frequency (RF) transmit-receive switch has an antenna port, first and second transmit differential ports and first and second receive differential ports. Transmit transistor switches are connected to the transmit differential ports. Primary and secondary windings of a transmit coupled inductor transformer are connected to the transmit transistor switches. Receive transistor switches are connected to the receive differential ports. Primary and secondary windings of a receive coupled inductor transformer are connected to the receive transistor switches. A first balun inductive winding is connected to the antenna port, and a second balun inductive winding is connected to the transistor switches.

Abstract: An integrated circuit architecture and circuitry is defined by a die structure with a plurality of exposed conductive pads arranged in a grid of rows and columns. The die structure has a first operating frequency region with a first transmit and receive chain, and a second operating frequency region with a second transmit chain and a second receive chain. There is a shared region of the die structure defined by an overlapping segment of the first operating frequency region and the second operating frequency region with a shared power supply input conductive pad connected to the first transmit chain, the second transmit chain, the first receive chain, and the second receive chain, and a shared power detection output conductive pad connected to the first transmit chain and the second transmit chain.

Abstract: An RF power amplifier biasing circuit has a start ramp signal input, a main current source input, an auxiliary current source input, and a circuit output. A ramp-up capacitor is connected to the auxiliary current source input. A ramp-up switch transistor is connected to the start ramp signal input and is selectively thereby to connect the auxiliary current source input to the ramp-up capacitor. A buffer stage has an input connected to the ramp-up capacitor and an output connected to the main current source input at a sum node. A minor transistor has a gate terminal corresponding to the circuit output and a source terminal connected to the sum node and to the gate terminal.

Abstract: A zero insertion loss directional coupler includes an input port, an antenna port, an isolation port, and a detect port. The coupler has a first signal trace, a second signal trace, and an inductive winding. The first signal trace is on one of two layers and is connected to the input port and the antenna port, while the inductive winding is on another one of the two layers. A first terminal of the inductive winding is connected to the isolation port. A first terminal of the second signal trace is connected to the detect port and a second terminal of the second signal trace is connected to a second terminal of the inductive winding.

Abstract: A radio frequency (RF) transmit-receive switch has an antenna port, first and second transmit differential ports and first and second receive differential ports. Transmit transistor switches are connected to the transmit differential ports. Primary and secondary windings of a transmit coupled inductor transformer are connected to the transmit transistor switches. Receive transistor switches are connected to the receive differential ports. Primary and secondary windings of a receive coupled inductor transformer are connected to the receive transistor switches. A first balun inductive winding is connected to the antenna port, and a second balun inductive winding is connected to the transistor switches.

Abstract: An ultra-high coupling factor transformer has a plurality of conductive layers, a primary winding inductor, and a secondary winding inductor. The primary winding inductor is defined by a plurality of turns and disposed on a first one of the plurality of conductive layers and extends to a second one of the plurality of conductive layers. The secondary winding inductor is defined by a plurality of turns and disposed on the first one of the plurality of conductive layers and extends to the second one of the plurality of conductive layers. The primary winding is vertically and horizontally cross coupled with the secondary winding inductor, and defines a mutual coupling inductance from surrounding directions.

Abstract: A front end circuit for coupling a plurality of antennas to a multi-channel time domain duplex RF transceiver is disclosed. The front end circuit has a first transmit port, a first receive chain primary port, a first receive chain secondary ports, and a first antenna port connectible to a first one of the plurality of antennas. The front end circuit also has a second transmit port, a second receive chain primary port, and a second receive chain secondary port connectible to a second one of the plurality of antennas. A first switch has terminals connected to the first transmit port, the first receive chain primary port, and the second receive chain secondary port, as well as a common terminal that is connected to the first antenna port. Additionally, the front end circuit has a second switch that has terminals connected to the second transmit port, the second receive chain primary port and the first receive chain secondary port, and a common terminal connected to the second antenna port.

Abstract: A multiport radio frequency (RF) switch circuit is disclosed. The switch circuit includes a first transistor that is connected to a first port, a common antenna port, and a first enable line. The first transistor is selectively activatable in response to a first enable signal applied to the first enable line. There is also a second transistor connected to a second port, the common antenna port, and a second enable line. The second transistor is selectively activatable in response to a second enable signal applied to the second enable line. A first inductor connected to the first port and the second port compensates for parasitic capacitance between the first port and the second port from an inactive one of the transistors.